riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2016-04-28	Add support to AArch64 disassembler for verifying instructions. Add verifier...	Nick Clifton	1	-0/+8
2016-03-24	More -Wstack-usage warnings: opcodes/aarch64-*	Jan Kratochvil	1	-3/+2
2016-01-01	Copyright update for binutils	Alan Modra	1	-1/+1
2015-12-14	[AArch64][PATCH 11/14] Add support for the 2H vector type.	Matthew Wahab	1	-1/+8
2015-12-11	[AArch64][Patch 4/5] Support HINT aliases taking operands.	Matthew Wahab	1	-0/+27
2015-12-10	[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.	Matthew Wahab	1	-2/+2
2015-11-27	[AArch64] Add ARMv8.2 instructions BFC and REV64.	Matthew Wahab	1	-0/+41
2015-11-27	[AArch64] Let aliased instructions be their preferred form.	Matthew Wahab	1	-1/+1
2015-10-28	Pass noaliases_p to aarch64_decode_insn	Yao Qi	1	-5/+7
2015-10-07	Avoid using 'template' C++ keyword	Yao Qi	1	-2/+2
2015-10-02	[aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn	Yao Qi	1	-4/+5
2015-10-02	[aarch64] Remove argument pc from disas_aarch64_insn	Yao Qi	1	-3/+2
2015-01-02	ChangeLog rotatation and copyright year update	Alan Modra	1	-1/+1
2014-09-03	[PATCH/AArch64] Implement LSE feature	Jiong Wang	1	-0/+18
2014-03-26	[AArch64 disassembler] Add missing checks of undefine encodings on	Yufeng Zhang	1	-3/+9
2014-03-05	Update copyright years	Alan Modra	1	-1/+1
2013-11-05	gas/	Yufeng Zhang	1	-4/+8
2013-08-23	PR binutils/15834	Nick Clifton	1	-2/+2
2013-06-20	bfd/	Yufeng Zhang	1	-5/+0
2013-01-30	include/opcode/	Yufeng Zhang	1	-1/+20
2013-01-17	include/opcode/	Yufeng Zhang	1	-0/+1
2012-08-13	Add support for 64-bit ARM architecture: AArch64	Nick Clifton	1	-0/+2392