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path: root/opcodes/aarch64-asm.c
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2024-07-12aarch64: Add support for sme2.1 movaz instructions.Srinath Parvathaneni1-0/+43
2024-07-12aarch64: Add support for sme2.1 luti2 and luti4 instructions.Srinath Parvathaneni1-0/+4
2024-06-25aarch64: Fix sve2p1 dupq instruction operands.Srinath Parvathaneni1-17/+2
2024-06-24aarch64: Add FP8 Neon and SVE multiplication instructionsAndrew Carlotti1-1/+11
2024-06-24gas, aarch64: Add SME2 lutv2 extensionsaurabh.jha@arm.com1-0/+1
2024-05-28gas, aarch64: Add AdvSIMD lut extensionsaurabh.jha@arm.com1-0/+11
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev1-0/+15
2024-01-24aarch64: Eliminate unused variable warnings with -DNDEBUGAndrew Carlotti1-1/+1
2024-01-15aarch64: rcpc3: Define address operand fields and inserter/extractorsVictor Do Nascimento1-0/+56
2024-01-15Add generated source files and fix thinko in aarch64-asm.cNick Clifton1-1/+1
2024-01-15aarch64: Add SVE2.1 dupq, eorqv and extq instructions.Srinath Parvathaneni1-0/+16
2024-01-15aarch64: Add support for FEAT_SVE2p1.Srinath Parvathaneni1-0/+14
2024-01-15aarch64: Add support for FEAT_SME2p1 instructions.Srinath Parvathaneni1-0/+71
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2023-03-30aarch64: Add the SME2 shift instructionsRichard Sandiford1-0/+14
2023-03-30aarch64: Add the SME2 saturating conversion instructionsRichard Sandiford1-0/+5
2023-03-30aarch64: Add the SME2 MLAL and MLSL instructionsRichard Sandiford1-1/+3
2023-03-30aarch64: Add the SME2 maximum/minimum instructionsRichard Sandiford1-0/+5
2023-03-30aarch64: Add the SME2 ADD and SUB instructionsRichard Sandiford1-0/+2
2023-03-30aarch64: Add the SME2 ZT0 instructionsRichard Sandiford1-0/+12
2023-03-30aarch64: Add the SME2 predicate-related instructionsRichard Sandiford1-4/+29
2023-03-30aarch64: Add the SME2 multivector LD1 and ST1 instructionsRichard Sandiford1-1/+22
2023-03-30aarch64: Add the SME2 MOVA instructionsRichard Sandiford1-1/+49
2023-03-30aarch64: Add support for predicate-as-counter registersRichard Sandiford1-0/+1
2023-03-30aarch64: Add a _10 suffix to FLD_imm3Richard Sandiford1-2/+2
2023-03-30aarch64: Regularise FLD_* suffixesRichard Sandiford1-2/+2
2023-03-30aarch64: Rename za_tile_vector to za_indexRichard Sandiford1-9/+9
2023-03-30aarch64: Make SME instructions use F_STRICTRichard Sandiford1-1/+7
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-10-17Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp}CaiJingtao1-1/+2
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2021-12-02aarch64: Add support for +mopsRichard Sandiford1-0/+13
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton1-13/+13
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus1-0/+67
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus1-0/+25
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus1-0/+47
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus1-0/+55
2021-04-19arm64: add two initializersJan Beulich1-2/+2
2021-03-31Use bool in opcodesAlan Modra1-128/+128
2021-01-08Fix places in the AArch64 opcodes library code where a call to assert() has s...Nick Clifton1-6/+7
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+15
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das1-0/+11
2020-02-26Indent labelsAlan Modra1-2/+2
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson1-0/+1
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson1-2/+2
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson1-0/+6
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson1-2/+4