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2009-03-18bfd/Alan Modra1-0/+1
* vms-hdr.c: Don't include alloca.h. opcodes/ * cgen-opc.c: Include alloca-conf.h rather than alloca.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate.
2009-03-18include/Alan Modra1-0/+6
* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13 documentation. bfd/ * elf32-m68hc1x.c: Include alloca-conf.h. * xsym.c: Likewise. * elf64-hppa.c: Likewise. Remove existing #if's handling alloca. * som.c: Likewise. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. binutils/ * sysdep.h: Include alloca-conf.h instead of config.h and remove existing #if's handling alloca. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ * as.h: Include alloca-conf.h instead of config.h and remove existing #if's handling alloca. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * openrisc-opc.c: Regenerate. ld/ * ld.h: Remove alloca handling.
2009-03-10Add Spanish translation to gold.Nick Clifton1-0/+4
Update Indonesian translation for opcodes.
2009-03-10include/opcode/Alan Modra1-0/+9
* ppc.h (ppc_parse_cpu): Declare. opcodes/ * ppc-dis.c: Include "opintl.h". (struct ppc_mopt, ppc_opts): New. (ppc_parse_cpu): New function. (powerpc_init_dialect): Use it. (print_ppc_disassembler_options): Dump options from ppc_opts. Internationalize message. gas/ * config/tc-ppc.c (parse_cpu): Delete. (md_parse_option, ppc_machine): Use ppc_parse_cpu. gas/testsuite/ * gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec. * gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
2009-03-06Updated Spanish translations.Nick Clifton1-0/+4
2009-03-04bfd/Alan Modra1-0/+7
PR 6768 * configure.in: Test for ld --as-needed support. Link shared libbfd against libm. * configure: Regenerate. opcodes/ PR 6768 * configure.in: Test for ld --as-needed support. Link shared libopcodes against libm. * configure: Regenerate.
2009-03-04missing from make dep-am commitAlan Modra1-0/+7
2009-03-04opcodes/Peter Bergner1-0/+5
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that instructions from newer processors are listed before older ones.
2009-03-02Add support for Score7 architecture.Nick Clifton1-0/+10
2009-03-01 Backport from git Libtool:Ralf Wildenhues1-0/+4
2009-01-19 Robert Millan <rmh@aybabtu.com> Support GNU/kOpenSolaris. * libltdl/m4/libtool.m4 (_LT_SYS_DYNAMIC_LINKER) (_LT_CHECK_MAGIC_METHOD, _LT_COMPILER_PIC, _LT_LINKER_SHLIBS) (_LT_LANG_CXX_CONFIG) [kopensolaris*-gnu]: Recognize GNU/kOpenSolaris. binutils/ * configure: Regenerate. opcodes/ * configure: Regenerate. bfd/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate.
2009-02-272009-02-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+4
* i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
2009-02-26gas/Peter Bergner1-0/+54
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63", "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63". (parse_cpu): Extend -mpower7 to accept power7 and isel instructions. gas/testsuite/ * gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests. * gas/ppc/e500mc.s: Likewise. * gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests. ("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.", "divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw", "popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.", "fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.", "fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.", "ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix", "dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx", "stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte", "frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests. * gas/ppc/power7.s: Likewise. * gas/ppc/vsx.d: New test. * gas/ppc/vsx.s: Likewise. * gas/ppc/ppc.exp: Run it. include/opcode/ * ppc.h (PPC_OPCODE_POWER7): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble the power7 and the isel instructions. * ppc-opc.c (insert_xc6, extract_xc6): New static functions. (insert_dm, extract_dm): Likewise. (XB6): Update comment to include XX2 form. (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. (RemoveXX3DM): Delete. (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", "mftgpr">: Deprecate for POWER7. <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", "frsqrte.">: Deprecate the three operand form and enable the two operand form for POWER7 and later. <"wait">: Extend to accept optional parameter. Enable for POWER7. <"waitsrv", "waitimpl">: Add extended opcodes. <"ldbrx", "stdbrx">: Enable for POWER7. <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", "xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-23gas/H.J. Lu1-0/+13
2009-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (vex_imm4): Removed. (VEX_check_operands): Likewise. (match_template): Updated. opcodes/ 2009-02-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4. (operand_types): Remove Vex_Imm4. * i386-opc.h (Vex_Imm4): Removed. (OTMax): Updated. (i386_operand_type): Remove vex_imm4. * i386-opc.tbl: Remove Vex_Imm4 comments. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2009-02-23 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns forRichard Earnshaw1-0/+5
vq{r}shr{u}n.s64 insnstructions.
2009-02-19gas/testsuite/Peter Bergner1-0/+5
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a floating point register. opcodes/ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first operand to be a float point register (FRT/FRS).
2009-02-18opcodes/Adam Nemet1-0/+5
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific dmfc2 and dmtc2 before the architecture-level variants. gas/testsuite/ * gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2. * gas/mips/octeon.d: Update. * gas/mips/octeon-ill.l: Update error message.
2009-02-18 * fr30-opc.c: Regenerate.Nick Clifton1-0/+16
* frv-opc.c: Regenerate. * ip2k-opc.c: Regenerate. * iq2000-opc.c: Regenerate. * lm32-opc.c: Regenerate. * m32c-opc.c: Regenerate. * m32r-opc.c: Regenerate. * mep-opc.c: Regenerate. * mt-opc.c: Regenerate. * xc16x-opc.c: Regenerate. * xstormy16-opc.c: Regenerate. * tic54x-dis.c (print_instruction): Avoid compiler warning on sprintf call. * opc-itab.scm (<>_cgen_init_opcode_table): Avoid compiler warning about calling memset with a zero length.
2009-02-12 gas/Nathan Sidwell1-0/+4
* config/tc-m68k.c (mcf51qe_ctrl): Add CPUCR. (mcf52259_ctrl, mcf52277_ctrl, mcf53017_ctrl): New. (mcf5307_ctrl): Add VBR. (no_mac): New variable. (m68k_extensions): Refer to no_mac mask. (m68k_cpus): Add 51, 51ac, 51cn, 51em, 51jm, 52274, 52277, 52252..52259, 53011..53017. (m68k_ip): Process CPUCR. (init_table): Add cpucr entry. (m68k_set_extension): Allow negated mask to refer to a variable. (md_show_usage): Use '%s' to silence fprintf warning. * config/m68k-parse.h (CPUCR): New control register. gas/testsuite/ * m68k/br-isac.d, m68k/br-isac.s: Add stldsr test. opcodes/ * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
2009-02-06gas/testsuite/Peter Bergner1-0/+6
* gas/ppc/booke.s ("dcbt", "dcbtst"): New tests. * gas/ppc/booke.d: Likewise. * gas/ppc/power4_32.s: Likewise. * gas/ppc/power4_32.d: Likewise. opcodes/ * ppc-opc.c: Update copyright year. (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand ordering for POWER4 and later and use the correct Server ordering.
2009-02-04gas/H.J. Lu1-0/+14
2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * config/tc-i386.c (CPU_FLAGS_PCLMUL_MATCH): New. (CPU_FLAGS_AVX_MATCH): Updated. (CPU_FLAGS_32BIT_MATCH): Likewise. (cpu_flags_match): Likewise. gas/testsuite/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * gas/i386/arch-avx-1-3.l: New. * gas/i386/arch-avx-1-3.s: Likewise. * gas/i386/arch-avx-1-4.l: Likewise. * gas/i386/arch-avx-1-4.s: Likewise. * gas/i386/arch-avx-1-5.l: Likewise. * gas/i386/arch-avx-1-5.s: Likewise. * gas/i386/arch-avx-1-6.l: Likewise. * gas/i386/arch-avx-1-6.s: Likewise. * gas/i386/arch-10.s: Add vpclmul instructions. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/sse2avx.s: Add pclmul instructions. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-avx-1.d: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1-3, arch-avx-1-4, arch-avx-1-5 and arch-avx-1-6. opcodes/ 2009-02-04 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (January, 2009) * i386-dis.c (PREFIX_VEX_3A44): New. (VEX_LEN_3A44_P_2): Likewise. (PREFIX_VEX_3A48): Updated. (VEX_LEN_3A4C_P_2): Likewise. (prefix_table): Add PREFIX_VEX_3A44. (vex_table): Likewise. (vex_len_table): Add VEX_LEN_3A44_P_2. * i386-opc.tbl: Add PCLMUL + AVX instructions. * i386-tbl.h: Regenerated.
2009-02-03bfd:Joseph Myers1-0/+7
2009-02-03 Sandip Matte <sandip@rmicorp.com> * aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr. * archures.c (bfd_mach_mips_xlr): Define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_xlr): Define. (arch_info_struct): Add XLR entry. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR. (mips_set_isa_flags): Handle bfd_mach_mips_xlr (mips_mach_extensions): Add XLR entry. binutils: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR. gas: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT and M_MSGWAIT_T. (mips_cpu_info_table): Add XLR entry. * doc/c-mips.texi (-march): Document xlr. gas/testsuite: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * gas/mips/mips.exp (xlr): New architecture. (xlr-ext): Run test. * gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New. include/elf: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips.h (E_MIPS_MACH_XLR): Define. include/opcode: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips.h (INSN_XLR): Define. (INSN_CHIP_MASK): Update. (CPU_XLR): Define. (OPCODE_IS_MEMBER): Update. (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define. opcodes: 2009-02-03 Sandip Matte <sandip@rmicorp.com> * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define. (mips_arch_choices): Add XLR entry. * mips-opc.c (XLR): Define. (mips_builtin_opcodes): Add XLR instructions.
2009-02-03bfd:Joseph Myers1-0/+6
2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am and install-pdf-recursive targets. Define pdfdir. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate * doc/Makefile.in: Regenerate. binutils: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. etc: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * configure: Regenerate. gas: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. * doc/Makefile.am: Define pdf__strip_dir. Add install-pdf and install-pdf-am targets. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. ld: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * configure.in: AC_SUBST pdfdir. * Makefile.am: Add install-pdf, install-pdf-am, and install-pdf-recursive targets. Define pdf__strip_dir. * po/Make-in: Add install-pdf target. * configure: Regenerate. * Makefile.in: Regenerate. opcodes: 2009-02-03 Carlos O'Donell <carlos@codesourcery.com> * Makefile.am: Add install-pdf target. * po/Make-in: Add install-pdf target. * Makefile.in: Regenerate.
2009-02-03* elf32-mep.c (config_names): Regenerate configuration.DJ Delorie1-0/+10
* mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate.
2009-01-29gas:Joseph Myers1-0/+5
2009-01-29 Mark Mitchell <mark@codesourcery.com> * config/tc-arm.c (insns): Correct encoding of qadd, qdadd, qsub, qdsub in Thumb-2 mode. gas/testsuite: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * gas/arm/thumb32.s (qadd): Add qadd, qdadd, qsub, and qdsub. * gas/arm/thumb32.d: Likewise. opcodes: 2009-01-29 Mark Mitchell <mark@codesourcery.com> * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd, qsub, and qdsub.
2009-01-28* mips-opc.c (suxc1): Add the flag of FP_D.Nick Clifton1-0/+4
2009-01-20Regenerate for copyright date update.Alan Modra1-0/+11
2009-01-16bfd/Alan Modra1-0/+7
* Makefile.am (libbfd_la_LIBADD, libbfd_la_LDFLAGS): Substitute SHARED_LIBADD and SHARED_LDFLAGS rather than WIN32LIBADD, WIN32LDFLAGS. * configure.in (commonbfdlib): Delete. (SHARED_LDFLAGS): Rename from WIN32LDFLAGS/ (SHARED_LIBADD): Rename from WIN32LIBADD. Add pic libiberty if such is available, not just for linux. * po/SRC-POTFILES.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. opcodes/ * configure.in (commonbfdlib): Delete. (SHARED_LIBADD): Add pic libiberty if such is available. * configure: Regenerate. * po/POTFILES.in: Regenerate. binutils/ * configure.in (commonbfdlib): Delete. * configure: Regenerate. gas/ * configure.in (commonbfdlib): Delete. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2009-01-15opcodes/Peter Bergner1-0/+8
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated. * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two operand form and enable the four operand form for POWER6 and later. <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the three operand form for POWER6 and later. gas/testsuite/ * gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests. * gas/ppc/power6.d: Likewise.
2009-01-142009-01-14 Mike Frysinger <vapier@gentoo.org>Mike Frysinger1-0/+4
* bfin-dis.c (OUTS): Use "%s" as format string.
2009-01-142009-01-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+5
* i386-gen.c (cpu_flag_init): Remove a white space. (operand_type_init): Likewise.
2009-01-13gas/testsuite/H.J. Lu1-0/+5
2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence. * i386-tbl.h: Regenerated.
2009-01-12gas/testsuite/H.J. Lu1-0/+6
2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/opts.s: Add tests for add, adc, and, cmp, or, sbb, sub and xor. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/opts.d: Updated. * gas/i386/opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. opcodes/ 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB, subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS, subS, xorS and cmpS.
2009-01-10gas/H.J. Lu1-0/+33
2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and .syscall. (i386_align_code): Handle PROCESSOR_COREI7. (md_show_usage): Add corei7, clflush and syscall. (i386_target_format): Replace cpup4 with cpuclflush. * gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7. * doc/c-i386.texi: Document corei7, clflush and syscall. gas/testsuite/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add clflush and syscall. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2009-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS. (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush and CpuSYSCALL. (lineno): Removed. (set_bitfield): Take an argument, lineno. Don't report lineno on error if it is -1. (process_i386_cpu_flag): Take an argument, lineno. (process_i386_opcode_modifier): Likewise. (process_i386_operand_type): Likewise. (output_i386_opcode): Likewise. (opcode_hash_entry): Add lineno. (process_i386_opcodes): Updated. (process_i386_registers): Likewise. (process_i386_initializers): Likewise. * i386-opc.h (CpuP4): Removed. (CpuK6): Likewise. (CpuK8): Likewise. (CpuClflush): New. (CpuSYSCALL): Likewise. (CpuMMX): Updated. (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add cpuclflush and cpusyscall. * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause, syscall and sysret. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2009-01-09gas/H.J. Lu1-0/+15
2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .rdtscp. (md_show_usage): Display rdtscp. * doc/c-i386.texi: Document rdtscp. gas/testsuite/ 2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add rdtscp. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2009-01-09 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS. (cpu_flags): Add CpuRdtscp. (set_bitfield): Remove CpuSledgehammer check. * i386-opc.h (CpuRdtscp): New. (CpuLM): Updated. (i386_cpu_flags): Add cpurdtscp. * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2009-01-09gas/Peter Bergner1-0/+6
* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test. Test the new "deprecated" opcode field. include/opcode/ * ppc.h (struct powerpc_opcode): New field "deprecated". (PPC_OPCODE_NOPOWER4): Delete. opcodes/ * ppc-opc.c (PPCNONE): Define. (NOPOWER4): Delete. (powerpc_opcodes): Initialize the new "deprecated" field.
2009-01-06gas/testsuite/H.J. Lu1-0/+13
2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and vmovntps. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (VEX_LEN_2B_M_0): Removed. (VEX_LEN_E7_P_2_M_0): Likewise. (VEX_LEN_2C_P_1): Updated. (VEX_LEN_E8_P_2): Likewise. (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0. (mod_table): Likewise. * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps. * i386-tbl.h: Regenerated.
2009-01-062009-01-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+7
* i386-gen.c (process_copyright): Update for 2009. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2009-01-06gas/H.J. Lu1-1184/+45
2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * config/tc-i386.c (build_modrm_byte): Remove 5 operand instruction support. Don't swap REG and NDS for FMA. gas/testsuite/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/arch-10.s: Replace vfmaddpd with vfmadd132pd. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/avx.s: Remove vpermil2ps/vpermil2pd and FMA instructions. Update tests. * gas/i386/inval-avx.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/fma.d: New. * gas/i386/fma.s: Likewise. * gas/i386/fma-intel.d: Likewise. * gas/i386/x86-64-fma.d: Likewise. * gas/i386/x86-64-fma.s: Likewise. * gas/i386/x86-64-fma-intel.d: Likewise. * gas/i386/i386.exp: Run fma, fma-intel, x86-64-fma and x86-64-fma-intel. opcodes/ 2009-01-05 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (OP_VEX_FMA): Removed. (OP_EX_VexW): Likewise. (OP_EX_VexImmW): Likewise. (OP_XMM_VexW): Likewise. (VEXI4_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (VexI4): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (EXVexImmW): Likewise. (XMVexW): Likewise. (VPERMIL2): Likewise. (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. vpermil2_op): Likewise. (EXVexWdq): New. (vex_w_dq_mode): Likewise. (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. (es_reg): Updated. (PREFIX_VEX_38DB): Likewise. (PREFIX_VEX_3A4A): Likewise. (PREFIX_VEX_3A60): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, PREFIX_VEX_3A68...PREFIX_VEX_3A6F and PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add PREFIX_VEX_3896...PREFIX_VEX_389F, PREFIX_VEX_38A6...PREFIX_VEX_38AF and PREFIX_VEX_38B6...PREFIX_VEX_38BF. (vex_table): Likewise. (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. (putop): Support "%XW". (intel_operand_size): Handle vex_w_dq_mode. * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA instructions. Add new FMA instructions. * i386-tbl.h: Regenerated.
2009-01-02 * or32-opc.c (or32_print_register, or32_print_immediate,Nick Clifton1-0/+5
disassemble_insn): Don't rely on undefined sprintf behaviour. * itbl-ops.c (itbl_disassemble): Don't rely on undefined sprintf behaviour.
2008-12-302008-12-30 Martin Schwidefsky <schwidefskyy@de.ibm.com>Martin Schwidefsky1-0/+4
* s390-opc.txt: Add ptff instruction.
2008-12-24Fix the LM32 port entry timestamp for the time of its application.Jan Kratochvil1-1/+1
2008-12-24opcodes/Jan Kratochvil1-0/+5
* Makefile.am (CFILES, ALL_MACHINES): Add LM32 source and object files. * Makefile.in: Regenerate.
2008-12-23Add LM32 port.Nick Clifton1-0/+19
2008-12-23gas/H.J. Lu1-0/+17
2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Changed to return const template *. Handle i.swap_operand for 3 operands. (build_vex_prefix): Take const template *. Swap operand for 2-byte VEX prefix if possible. (md_assemble): Updated. (build_modrm_byte): Handle RegMem bit for SSE2AVX. gas/testsuite/ 2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel. * gas/i386/opts.s: Add tests for movsd, movss, vmovsd and vmovss. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/opts.d: Updated. * gas/i386/opts-intel.d: Likewise. * gas/i386/sse2avx-opts.d: Likewise. * gas/i386/sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. * gas/i386/x86-64-sse2avx-opts.d: Likewise. * gas/i386/x86-64-sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-avx-swap.d: New. * gas/i386/x86-64-avx-swap.s: Likewise. * gas/i386/x86-64-avx-swap-intel.d: Likewise. opcodes/ 2008-12-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EXdS): New. (EXdVexS): Likewise. (EXqVexS): Likewise. (d_swap_mode): Likewise. (q_mode): Updated. (prefix_table): Use EXdS on movss and EXqS on movsd. (vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd. (intel_operand_size): Handle d_swap_mode. (OP_EX): Likewise. * i386-opc.h (S): Update comments. * i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd. * i386-tbl.h: Regenerated.
2008-12-23 * po/ga.po: Updated Irish translation.Nick Clifton1-0/+4
2008-12-21Add missing ChangeLog entries for my last commit.Ralf Wildenhues1-0/+4
2008-12-20gas/H.J. Lu1-0/+38
2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Add swap_operand. (parse_insn): Handle ".s". (match_template): Handle swap_operand. * doc/c-i386.texi: Document .s suffix. gas/testsuite/ 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts, sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel, x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel. * gas/i386/opts.d: New. * gas/i386/opts-intel.d: Likewise. * gas/i386/opts.s: Likewise. * gas/i386/sse2avx-opts.d: Likewise. * gas/i386/sse2avx-opts-intel.d: Likewise. * gas/i386/x86-64-opts.d: Likewise. * gas/i386/x86-64-opts-intel.d: Likewise. * gas/i386/x86-64-opts.s: Likewise. * gas/i386/x86-64-sse2avx-opts.d: Likewise. * gas/i386/x86-64-sse2avx-opts-intel.d: Likewise. opcodes/ 2008-12-20 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EbS): New. (EvS): Likewise. (EMS): Likewise. (EXqS): Likewise. (EXxS): Likewise. (b_swap_mode): Likewise. (v_swap_mode): Likewise. (q_swap_mode): Likewise. (x_swap_mode): Likewise. (v_mode): Updated. (w_mode): Likewise. (t_mode): Likewise. (xmm_mode): Likewise. (swap_operand): Likewise. (dis386): Use EbS on movB. Use EvS on moveS. (dis386_twobyte): Use EXxS on movapX. (prefix_table): Use EXxS on movups, movupd, movdqu, movdqa, vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq. (vex_table): Use EXxS on vmovapX. (vex_len_table): Use EXqS on vmovq. (intel_operand_size): Handle b_swap_mode, v_swap_mode, q_swap_mode and x_swap_mode. (OP_E_register): Handle b_swap_mode and v_swap_mode. (OP_EM): Handle v_swap_mode. (OP_EX): x_swap_mode and q_swap_mode. * i386-gen.c (opcode_modifiers): Add S. * i386-opc.h (S): New. (Modrm): Updated. (i386_opcode_modifier): Add s. * i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq, movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq. * i386-tbl.h: Regenerated.
2008-12-18gas/testsuite/H.J. Lu1-0/+23
2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.d: Remove trailing white spaces after nop. * gas/i386/intelpic.d: Likewise. * gas/i386/nops16-1.d: Likewise. * gas/i386/nops-1-i686.d: Likewise. * gas/i386/nops-3.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3-i686.d: Likewise. * gas/i386/nops-4.d: Likewise. * gas/i386/nops-4-i386.d: Likewise. * gas/i386/nops-4-i686.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/reloc.d: Likewise. * gas/i386/tlsnopic.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-4-k8.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. ld/testsuite/ 2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/tlsld1.dd: Remove trailing white spaces after nop. opcodes/ 2008-12-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (mnemonicendp): New. (op): Likewise. (print_insn): Use mnemonicendp. (OP_3DNowSuffix): Likewise. (CMP_Fixup): Likewise. (CMPXCHG8B_Fixup): Likewise. (CRC32_Fixup): Likewise. (OP_DREX_FCMP): Likewise. (OP_DREX_ICMP): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (PCLMUL_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (MOVBE_Fixup): Likewise. (putop): Update mnemonicendp. (oappend): Use stpcpy. (simd_cmp_op): Changed to struct op. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise.
2008-12-15opcodes:Richard Earnshaw1-0/+5
* arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using unified syntax. gas/testsuite: * gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses unified syntax. * gas/arm/vfp-non-overlap.d: Likewise. * gas/arm/vfp-neon-syntax.d: Likewise. * gas/arm/vfp-neon-syntax_t2.d: Likewise. * gas/arm/vfp1.d: Likewise. * gas/arm/vfp1_t2.d: Likewise. * gas/arm/vfp1xD.d: Likewise. * gas/arm/vfp1xD_t2.d: Likewise. * gas/arm/vfp2.d: Likewise. * gas/arm/vfp2_t2.d: Likewise. * gas/arm/vfpv3-32drs.d: Likewise. * gas/arm/vfpv3-const-conv.d: Likewise. ld/testsuite: * ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses unified syntax. * ld-arm/vfp11-fix-vector.d: Likewise.
2008-12-082008-12-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+4
* i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
generated by cgit v1.1 at 2024-08-07 15:33:01 +0000