| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-04-15 | [binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18 | Andre Vieira | 1 | -0/+4 |
| 2019-04-15 | [binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M Mainline | Andre Vieira | 1 | -0/+6 |
| 2019-04-15 | [binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline | Andre Vieira | 1 | -0/+4 |
| 2019-04-15 | [binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM... | Andre Vieira | 1 | -0/+4 |
| 2019-04-15 | [binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo... | Andre Vieira | 1 | -0/+4 |
| 2019-04-15 | [binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI | Andre Vieira | 1 | -0/+4 |
| 2019-04-12 | S12Z: opcodes: Replace "operator" with "optr". | John Darrington | 1 | -0/+5 |
| 2019-04-11 | [BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions | Sudakshina Das | 1 | -0/+13 |
| 2019-04-11 | [BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction | Sudakshina Das | 1 | -0/+7 |
| 2019-04-09 | [MIPS] Add RDHWR with the SEL field for MIPS R6. | Robert Suchanek | 1 | -0/+4 |
| 2019-04-08 | x86: Consolidate AVX512 BF16 entries in i386-opc.tbl | H.J. Lu | 1 | -0/+5 |
| 2019-04-07 | print_insn_powerpc tidy | Alan Modra | 1 | -0/+6 |
| 2019-04-07 | PR24421, Wrong brackets in opcodes/arm-dis.c | Alan Modra | 1 | -0/+6 |
| 2019-04-05 | x86: Support Intel AVX512 BF16 | Xuepeng Guo | 1 | -0/+14 |
| 2019-04-05 | PowerPC bc extended branch mnemonics and "y" hints | Alan Modra | 1 | -0/+7 |
| 2019-04-05 | PowerPC disassembler: Don't emit trailing spaces | Alan Modra | 1 | -0/+5 |
| 2019-04-04 | Add extended mnemonics for bctar. Fix setting of 'at' branch hints. | Peter Bergner | 1 | -0/+36 |
| 2019-03-28 | PR24390, Don't decode mtfsb field as a cr field | Alan Modra | 1 | -0/+8 |
| 2019-03-25 | Arm: Fix Arm disassembler mapping symbol search. | Tamar Christina | 1 | -0/+6 |
| 2019-03-25 | AArch64: Have -D override mapping symbol as documented. | Tamar Christina | 1 | -0/+5 |
| 2019-03-25 | AArch64: Fix AArch64 disassembler mapping symbol search | Tamar Christina | 1 | -0/+5 |
| 2019-03-25 | AArch64: Fix disassembler bug with out-of-order sections | Tamar Christina | 1 | -0/+5 |
| 2019-03-19 | ix86: Disable AVX512F when disabling AVX2 | H.J. Lu | 1 | -0/+7 |
| 2019-03-18 | x86: Optimize EVEX vector load/store instructions | H.J. Lu | 1 | -0/+7 |
| 2019-03-12 | Add missing changelogs for previous commits. | Andreas Krebbel | 1 | -0/+9 |
| 2019-02-08 | Add missing ChangeLog files for previous patch. | Jim Wilson | 1 | -0/+5 |
| 2019-02-07 | Arm: Backport hlt to all architectures. | Tamar Christina | 1 | -0/+4 |
| 2019-02-07 | AArch64: Add verifier for By elem Single and Double sized instructions. | Tamar Christina | 1 | -0/+10 |
| 2019-02-07 | Updated Swedish translation for the opcodes sub-directory | Nick Clifton | 1 | -0/+4 |
| 2019-01-31 | S/390: Implement instruction set extensions | Andreas Krebbel | 1 | -0/+7 |
| 2019-01-25 | AArch64: Add missing changelog for Update encodings for stg, st2g, stzg and s... | Tamar Christina | 1 | -0/+9 |
| 2019-01-25 | AArch64: Add new STZGM instruction for Armv8.5-A Memory Tagging Extension. | Sudi Das | 1 | -0/+7 |
| 2019-01-25 | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 1 | -0/+16 |
| 2019-01-23 | Updated translations for some of the binutils subdirectory. | Nick Clifton | 1 | -0/+4 |
| 2019-01-21 | Updated translations for various binutils subdirectories. | Nick Clifton | 1 | -0/+5 |
| 2019-01-20 | [MIPS] fix typo in mips_arch_choices. | Chenghua Xu | 1 | -0/+4 |
| 2019-01-19 | Change version to 2.32.51 and regenerate configure and pot files. | Nick Clifton | 1 | -0/+5 |
| 2019-01-19 | Add markers for 2.32 branch to NEWS and ChangeLog files. | Nick Clifton | 1 | -0/+4 |
| 2019-01-09 | S12Z: Don't crash when disassembling invalid instructions. | John Darrington | 1 | -1/+3 |
| 2019-01-09 | S12Z: Fix disassembly of indexed OPR operands with zero index. | John Darrington | 1 | -0/+5 |
| 2019-01-09 | Adjust bfd/warning.m4 egrep patterns | Andrew Paprocki | 1 | -0/+4 |
| 2019-01-07 | s12z regen | Alan Modra | 1 | -2/+7 |
| 2019-01-03 | S12Z: opcodes: Separate the decoding of operations from their display. | John Darrington | 1 | -0/+12 |
| 2019-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -0/+4 |
| 2019-01-01 | ChangeLog rotation | Alan Modra | 1 | -2538/+2 |
| 2018-12-28 | PR24028, PPC_INT_FMT | Alan Modra | 1 | -0/+6 |
| 2018-12-18 | Include bfd_stdint.h in bfd.h | Alan Modra | 1 | -0/+10 |
| 2018-12-07 | RISC-V: Fix 4-arg add parsing. | Jim Wilson | 1 | -0/+5 |
| 2018-12-06 | sim/opcodes: Allow use of out of tree cgen source directory | Andrew Burgess | 1 | -0/+6 |
| 2018-12-06 | opcodes/riscv: Hide '.L0 ' fake symbols | Andrew Burgess | 1 | -0/+6 |
