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2016-05-26Add support for new POWER ISA 3.0 instructions.Peter Bergner1-0/+5
2016-05-25Enable VREX for all AVX512 directivesH.J. Lu1-0/+9
2016-05-25Enable VREX for AVX512 directivesH.J. Lu1-0/+7
2016-05-25Reimplement .no87/.nommx/.nosse/.noavx directivesH.J. Lu1-0/+6
2016-05-23[ARC] Update instruction type and delay slot info.Claudiu Zissulescu1-0/+12
2016-05-23[ARC] Add XY registers, update neg instruction.Claudiu Zissulescu1-0/+4
2016-05-23[ARC] Rename "class" named attributes.Claudiu Zissulescu1-0/+6
2016-05-23tic54x: rename typedef of struct symbol_Trevor Saunders1-0/+5
2016-05-19Correct "Fix powerpc subis range"Alan Modra1-0/+4
2016-05-19Fix powerpc subis rangeAlan Modra1-0/+6
2016-05-18MIPS/opcodes: Correct mixed MIPS16 and microMIPS disassemblyMaciej W. Rozycki1-0/+7
2016-05-13Accept valid one byte signed and unsigned values for the IMM8 operand.Peter Bergner1-0/+4
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune1-0/+7
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-0/+11
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme1-0/+6
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme1-0/+11
2016-05-09opcodes,gas: sparc: fix mnemonic of faligndataiJose E. Marchesi1-0/+4
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu1-0/+8
2016-05-03Fix generation of AArhc64 instruction table.Szabolcs Nagy1-0/+8
2016-04-28Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton1-0/+9
2016-04-23Skip if size of bfd_vma is smaller than address sizeH.J. Lu1-0/+7
2016-04-20update many old style function definitionsTrevor Saunders1-0/+23
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess1-0/+18
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess1-0/+4
2016-04-15Regenerate Makefile.in/aclocal.m4 automake 1.11.6H.J. Lu1-0/+5
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess1-0/+8
2016-04-14opcodes/arc: Move instruction length logic to new functionAndrew Burgess1-0/+6
2016-04-13Fix disassembly of the V850's LD.BU instruction.Nick Clifton1-0/+6
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu1-0/+14
2016-04-12Update ARC instruction data-base.Claudiu Zissulescu1-0/+4
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu1-19/+50
2016-04-11MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassemblyMaciej W. Rozycki1-0/+5
2016-04-07arc/nps400: Add new instructionsAndrew Burgess1-0/+6
2016-04-07gas/arc: Handle multiple arc_opcode chains for same mnemonicAndrew Burgess1-0/+4
2016-04-05arc/nps400: Add additional instructionsAndrew Burgess1-0/+12
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu1-0/+9
2016-04-05[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang1-0/+4
2016-03-31opcodes: Fix date in ChangeLog entryAndrew Burgess1-1/+1
2016-03-31opcodes/arc/nps: Fix some operand flagsAndrew Burgess1-0/+5
2016-03-30opcodes/arc: Comment and whitespace fixes in opcode tableAndrew Burgess1-0/+5
2016-03-30[ARC] Cleanup AUX register names.Claudiu Zissulescu1-0/+9
2016-03-29[ARC] Fix typo in extension instruction name.Claudiu Zissulescu1-0/+4
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu1-0/+7
2016-03-24More -Wstack-usage warnings: opcodes/aarch64-*Jan Kratochvil1-0/+6
2016-03-24sparc: reorder wr instructions in sparc_opcodes to fix diagnosticsJose E. Marchesi1-0/+5
2016-03-22Add -Wstack-usage to the gcc warning flags list, but only if using a sufficie...Nick Clifton1-0/+4
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess1-0/+15
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess1-0/+5
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess1-0/+4
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess1-0/+4
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