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2020-01-13[ARC] [COMMITTED] Change ACCL/ACCH reg name to generic.Claudiu Zissulescu1-0/+5
2020-01-13asan: ns32k: wild memory writeAlan Modra1-0/+5
2020-01-13ubsan: wasm32: signed integer overflowAlan Modra1-0/+7
2020-01-13score formattingAlan Modra1-0/+5
2020-01-13ubsan: score: left shift of negative valueAlan Modra1-0/+7
2020-01-13tic4x: sign extension using shiftsAlan Modra1-0/+4
2020-01-13ubsan: fr30: left shift of negative valueAlan Modra1-0/+4
2020-01-13ubsan: xgate: left shift of negative valueAlan Modra1-0/+5
2020-01-10ubsan: tilepro: signed integer overflowAlan Modra1-0/+5
2020-01-10ubsan: m10300: shift exponent -4Alan Modra1-0/+6
2020-01-09Fix the cast used to prevent compile time warning about an always false test.Nick Clifton1-0/+5
2020-01-09Fix compile time warnings about comparisons always being false.Sergey Belyashov1-0/+6
2020-01-09x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMDJan Beulich1-0/+11
2020-01-08ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'Alan Modra1-0/+12
2020-01-07[ARC] Add finer details for LLOCK and SCONDShahab Vahedi1-0/+9
2020-01-06ubsan: m32c: left shift of negative valueAlan Modra1-0/+4
2020-01-06PR25344, z80 disassembler recursionAlan Modra1-0/+9
2020-01-04ubsan: m32r: left shift of negative valueAlan Modra1-0/+4
2020-01-04ubsan: cr16: left shift cannot be represented in type 'int'Alan Modra1-0/+4
2020-01-04ubsan: crx: left shift cannot be represented in type 'int'Alan Modra1-0/+4
2020-01-04ubsan: d30v: left shift cannot be represented in type 'int'Alan Modra1-0/+4
2020-01-03Arm64: correct address index operands for LD1RO{H,W,D}Jan Beulich1-3/+8
2020-01-03Arm64: correct {su,us}dot SIMD encodingsJan Beulich1-0/+5
2020-01-03Arm64: correct uzp{1,2} mnemonicsJan Beulich1-0/+6
2020-01-03Arm64: correct 64-bit element fmmla encodingJan Beulich1-0/+6
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov1-0/+4
2020-01-01Re: Update year range in copyright notice of binutils filesAlan Modra1-0/+4
2020-01-01ChangeLog rotationAlan Modra1-2444/+2
2019-12-30Re: Usage of unitialized heap in tic4x_print_condAlan Modra1-0/+5
2019-12-29ubsan: sparc: left shift cannot be represented in type 'int'Alan Modra1-0/+6
2019-12-29Usage of unitialized heap in tic4x_print_condAlan Modra1-0/+5
2019-12-27x86-64: fix Intel64 handling of branch with data16 prefixJan Beulich1-0/+7
2019-12-27x86: consolidate Disp<NN> handling a littleJan Beulich1-0/+10
2019-12-26ubsan: crx: index 5 out of bounds for type 'operand_desc const[5]'Alan Modra1-0/+5
2019-12-26ubsan: v850: left shift cannot be represented in type 'int'Alan Modra1-0/+5
2019-12-24ubsan: arm: shift exponent 32 is too large for 32-bit type 'unsigned int'Alan Modra1-0/+4
2019-12-23ppc: misc minor build correctionsJan Beulich1-0/+6
2019-12-23ubsan: score: left shift of 2 by 31 places cannot be represented in type 'int'Alan Modra1-0/+6
2019-12-23ubsan: iq2000: left shift of negative valueAlan Modra1-0/+4
2019-12-23ubsan: d30v: left shift cannot be represented in type 'long long'Alan Modra1-0/+8
2019-12-23ubsan: wasm: shift is too large for 64-bit type 'bfd_vma'Alan Modra1-0/+5
2019-12-20PR25281, sh disassembler abortAlan Modra1-0/+7
2019-12-20ubsan: or1k: left shift of negative valueAlan Modra1-0/+4
2019-12-20ubsan: hppa: left shift of negative valueAlan Modra1-0/+5
2019-12-20ubsan: m68hc1x: left shift of negative valueAlan Modra1-0/+8
2019-12-19vax decoding of indexed addressing modeAlan Modra1-0/+4
2019-12-19PR25277, microblaze opcode enumeration vs ISO/IEC TS 18661-3:2015Dr N.W. Filardo1-0/+7
2019-12-18More signed overflow fixesAlan Modra1-0/+17
2019-12-17ubsan: visium: left shift cannot be represented in type 'int'Alan Modra1-0/+4
2019-12-17ubsan: aarch64: left shift cannot be represented in type 'int64_t'Alan Modra1-0/+8
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