Age | Commit message (Collapse) | Author | Files | Lines |
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* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
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* i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
disp == -disp.
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* po/binutils.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gold.pot: Updated by the Translation project.
* po/gprof.pot: Updated by the Translation project.
* po/sv.po: Updated Swedish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
* po/ld.pot: Updated by the Translation project.
* po/fi.po: Updated Finnish translation.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
Updated soruces in ld/* to compile cleanly with -Wc++-compat:
* ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
* ldcref.c: Add casts.
* ldctor.c: Add casts.
* ldexp.c
* ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
* ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
* ldlang.h (enum statement_enum): Move to top level.
* ldmain.c: Add casts.
* ldwrite.c: Add casts.
* lexsup.c: Add casts. (enum control_enum): Move to top level.
* mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
Updated sources to compile cleanly with -Wc++-compat:
* basic_blocks.c: Add casts.
* cg_dfn.c: Add cast.
* corefile.c: Add casts.
* gmon_io.c: Add casts.
* hist.c: Add cast.
* source.c: Add cast.
* sym_ids.c (struct match): Moved to top level.
* as.c (main): Call dwarf2_init.
* config/obj-elf.c (struct group_list): New field.
(build_group_lists): Use hash lookup.
(free_section_idx): New function.
(elf_frob_file): Adjust.
* dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables.
(get_line_subseg): Adjust.
(dwarf2_init): New function.
* dwarf2dbg.h (dwarf2_init): New declaration.
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* s390-dis.c (print_insn_s390): Avoid 'long long'.
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* s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
(print_insn_s390): Signextend and shift pcrel operands before printing.
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* i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
VEX_LEN_AE_R_X_M_0 in comments.
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preprocessor macro, not an enum.
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(opt): Remove extra xorb entry.
(func): Use id field as fallback.
(sub): Return new string, caller changed.
(internal): Allocate end marker. Assign unique id before sorting.
(gas): Likewise. Fix loop end condition.
* z8k-opc.h: Regenerate.
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* z8k-opc.h: Regenerate.
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2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/SRC-POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
binutils
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/binutils.pot: Regenerate.
gas
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/POTFILES.in: Regenerate.
* po/gas.pot: Regenerate.
gprof
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/gprof.pot: Regenerate.
ld
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/ld.pot: Regenerate.
opcodes
2009-09-07 Tristan Gingold <gingold@adacore.com>
* po/opcodes.pot: Regenerate.
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* configure: Regenerate.
* Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
(BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
(i386-gen, ia64-gen, z8kgen): ..here.
* Makefile.in: Regenerate.
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* z8k-opc.h: Regenerate.
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(record_thumb_to_arm_glue, bfd_arm_process_before_allocation):
Change member name class to symbol_class.
* bfd/coff-i960.c (coff_i960_relocate_section) Rename variable
class to class_val. Change member name class to symbol_class.
* bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in)
(_bfd_xcoff_swap_aux_out): Rename arguments class to in_class.
* bfd/coff-stgo32.c (adjust_aux_in_post)
(adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class
to in_class.
* bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in)
(_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class.
* bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class
to n_sclass.
* bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename
variables named class to n_sclass. (coff_write_symbols): Rename
variable class to sym_class. (bfd_coff_set_symbol_class): Rename
argument class to symbol_class.
* bfd/cofflink.c (_bfd_coff_link_hash_newfunc)
(coff_link_add_symbols, _bfd_coff_link_input_bfd)
(_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section):
Update code to use renamed members.
* bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename
argument class to in_class.
* bfd/libcoff-in.h (struct coff_link_hash_entry, struct
coff_debug_merge_type) Renamed members class to symbol_class and
type_class.
* bfd/libcoff.h Regenerated.
* bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out):
Rename argument class to in_class.
* bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use
renamed members.
* bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of
member class to symbol_class.
* binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class)
(ieee_read_reference): Rename variables named class to cxxclass.
* gas/config/tc-arc.c (struct syntax_classes): Rename member class
to s_class. (arc_extinst): Rename variable class to
s_class. Update code to use renamed members.
* gas/config/tc-mips.c (insn_uses_reg): Rename argument class to
regclass.
* gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function)
(ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label)
(ppc_fix_adjustable, md_apply_fix): Update code to use renamed
members.
* gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member
from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update
code to use renamed members.
* gas/config/tc-score.c (s3_adjust_paritybit): Rename argument
class to i_class.
* gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument
class to i_class.
* gprof/corefile.c (core_create_function_syms): Rename variable
class to cxxclass.
* include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name
of class variable to in_class to match changes in function that
use this macro.
* include/opcode/ia64.h (struct ia64_operand): Renamed member
class to op_class
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols)
(gld${EMULATION_NAME}_try_needed): Rename variable class to
link_class
* opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed
member.
* opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class.
* opcodes/tic80-opc.c (tic80_symbol_to_value)
(tic80_value_to_symbol): Rename argument class to symbol_class.
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* config/bfin-parse.y (asm_1): Implement HLT instruction.
Fix comments for DBGA, DBGAH and DBGAL.
* config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
include/
* opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp.
(PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define.
(PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask,
PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask):
Adjust accordingly.
(init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and
PseudoDbg_Assert_grp_mask.
opcodes/
* bfin-dis.c (decode_pseudodbg_assert_0): Change according
to the new encoding of DBGA, DBGAH, and DBGAL.
(_print_insn_bfin): Likewise.
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* config/bfin-parse.y: Remove trailing whitespace.
(ccstat): Indent.
* config/tc-bfin.c (struct bfin_reg_entry): Remove.
(bfin_reg_info[]): Remove.
opcodes/
* bfin-dis.c (_print_insn_bfin): Don't declare.
(print_insn_bfin): Don't declare.
(dregs_pair): Remove.
(ignore_bits): Remove.
(ccstat): Remove.
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* config/bfin-defs.h (IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
* config/bfin-parse.y (asm_1): Check illegal register move
instructions.
gas/testsuite/
* gas/bfin/expected_move_errors.s,
gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".
opcodes/
* bfin-dis.c (IS_DREG): Define.
(IS_PREG): Define.
(IS_AREG): Define.
(IS_GENREG): Define.
(IS_DAGREG): Define.
(IS_SYSREG): Define.
(decode_REGMV_0): Check illegal register move instructions.
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(i386-gen$(EXEEXT_FOR_BUILD)): Use it.
(ia64-gen$(EXEEXT_FOR_BUILD)): And here.
(z8kgen$(EXEEXT_FOR_BUILD)): And here.
* Makefile.in: Regenerate.
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* cpu/mep.opc (parse_signed16_range): Mark as potentially unused.
(parse_unsigned16_range): Likewise.
(mep_cgen_insn_supported_asm): Make BSR12 check dependent on VLIW
isa.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-opc.c: Regenerate.
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* makefile.vms: Ported to Itanium VMS. Remove useless targets and
dependencies. Remove unused FORMAT variable.
* configure.com: New file to create build.com DCL script for
Itanium VMS or Alpha VMS.
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keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
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2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (sysinfo$(EXEEXT_FOR_BUILD)): Replace
CFLAGS/LDFLAGS with CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
(syslex.o): Likewise.
(sysinfo.o): Likewise.
(bin2c$(EXEEXT_FOR_BUILD)): Likewise.
* Makefile.in: Regenerated.
opcodes/
2009-08-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
(LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
* Makefile.in: Regenerated.
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opcodes/:
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/:
* acinclude.m4 (AM_INSTALL_LIBBFD): Call AM_SUBST_NOTMAKE for
bfdlibdir and bfdincludedir.
* Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
[INSTALL_LIBBFD]: ... here, ...
[INSTALL_LIBBFD]: ... and empty overrides here.
[!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
[!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
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coldfire v4e families.
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opcodes/:
* Makefile.am (SUBDIRS): Build '.' before 'po'.
(COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
(MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
(i386-gen.o): New rule.
($(srcdir)/i386-init.h): Adjust.
(i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
(ia64-gen.o): New rule.
(ia64_asmtab_deps): New variable.
($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
(ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
(s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
likewise.
(s390-opc.tab): Adjust.
(z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
rules.
(z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
* Makefile.in: Regenerate.
* z8kgen.c (gas): Avoid '/*' in comment.
* z8k-opc.h (func): Regenerate.
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opcodes/:
* Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
msp430-dis.c added.
(LIBOPCODES_CFILES): New variable, adding to
TARGET_LIBOPCODES_CFILES also non-target library sources.
(CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
files.
(ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
(EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
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ld/:
* Makefile.am (bin_PROGRAMS): Renamed from ...
(noinst_PROGRAMS): ... this.
(transform): Override, including the renaming of ld-new to ld.
(install-exec-local): Installation of ld in $(bindir) not needed
here any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(MAINTAINERCLEANFILES): Add ld.1.
* Makefile.in: Regenerate.
gold/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* testsuite/Makefile.am (AUTOMAKE_OPTIONS): Add -Wno-portability.
(AM_CPPFLAGS): Renamed from ...
(INCLUDE): ... this.
* Makefile.in, testsuite/Makefile.in: Regenerate.
bfd/:
* Makefile.am (libbfd_la_LDFLAGS): Initialize early, to allow
appending.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES, bfdinclude_HEADERS): Set
only in this condition.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES, libbfd_la_LDFLAGS): New,
to build but not install libbfd.la in this condition.
(install-bfdlibLTLIBRARIES, uninstall-bfdlibLTLIBRARIES)
(install_libbfd, install_libbfd): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
(bin2c$(EXEEXT_FOR_BUILD): Adjust rule.
(installcheck-local): Renamed from ...
(installcheck): ... this.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (YFLAGS): Remove, not needed any more.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
gprof/:
* Makefile.am (AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
[INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
[INSTALL_LIBBFD] (bfdinclude_DATA): New.
[!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
[!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
is built shared even if it is not to be installed.
(install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
(install_libopcodes, uninstall_libopcodes): Remove.
(AM_CPPFLAGS): Renamed from ...
(INCLUDES): ... this.
* Makefile.in: Regenerate.
|
|
opcodes/:
* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
1.11, foreign, no-dist.
(MKDEP, m32c_opc_h): Remove variables.
(disassemble.lo): Rewrite using automake-style dependency
tracking rules; only list the dependency upon the primary source
file, but no included headers.
(m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
(i386-gen.o, ia64-gen.o): Remove dependency statements.
(EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
ensure all dependency fragments are included in the Makefile.
(s390-opc.lo): Depend on s390-opc.tab.
(DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
(mkdep section): Remove.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
|
|
/:
* README-maintainer-mode: Point directly to upstream locations
for autoconf, automake, libtool, gettext, instead of copies on
sources.redhat.com. Document required versions.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/:
* CONTRIBUTE: Bump documented Autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gdb/doc/:
* gdbint.texinfo (Releasing GDB): Point to
README-maintainer-mode file for required autoconf version.
* configure.ac: Do not substitute datarootdir, htmldir,
pdfdir, docdir. Do not process --with-datarootdir,
--with-htmldir, --with-pdfdir, --with-docdir.
* configure: Regenerate.
gprof/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
opcodes/:
* Makefile.am (install-pdf, install-html): Remove.
* Makefile.in: Regenerate.
gas/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
ld/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(install-pdf-recursive, html__strip_dir, install-html)
(install-html-am, install-html-recursive): Remove.
* Makefile.in: Regenerate.
binutils/:
* Makefile.am (install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
* doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.am (datarootdir, docdir, htmldor, pdfdir)
(install-pdf, install-pdf-recursive, install-html)
(install-html-recursive): Remove.
* Makefile.in: Regenerate.
bfd/doc/:
* Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am)
(html__strip_dir, install-html, install-html-am): Remove.
* Makefile.in: Regenerate.
|
|
config/:
* override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64.
/:
* configure: Regenerate.
etc/:
* configure: Regenerate.
sim/common/:
* config.in: Regenerate.
* configure: Likewise.
sim/iq2000/:
* config.in: Regenerate.
* configure: Likewise.
sim/d10v/:
* config.in: Regenerate.
* configure: Likewise.
sim/igen/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32r/:
* config.in: Regenerate.
* configure: Likewise.
sim/frv/:
* config.in: Regenerate.
* configure: Likewise.
sim/:
* avr/config.in: Regenerate.
* avr/configure: Likewise.
* configure: Likewise.
* cris/config.in: Likewise.
* cris/configure: Likewise.
sim/h8300/:
* config.in: Regenerate.
* configure: Likewise.
sim/mn10300/:
* config.in: Regenerate.
* configure: Likewise.
sim/ppc/:
* config.in: Regenerate.
* configure: Likewise.
sim/erc32/:
* config.in: Regenerate.
* configure: Likewise.
sim/arm/:
* config.in: Regenerate.
* configure: Likewise.
sim/m68hc11/:
* config.in: Regenerate.
* configure: Likewise.
sim/lm32/:
* config.in: Regenerate.
* configure: Likewise.
sim/sh64/:
* config.in: Regenerate.
* configure: Likewise.
sim/v850/:
* config.in: Regenerate.
* configure: Likewise.
sim/cr16/:
* config.in: Regenerate.
* configure: Likewise.
sim/moxie/:
* config.in: Regenerate.
* configure: Likewise.
sim/m32c/:
* config.in: Regenerate.
* configure: Likewise.
sim/mips/:
* config.in: Regenerate.
* configure: Likewise.
sim/mcore/:
* config.in: Regenerate.
* configure: Likewise.
sim/testsuite/d10v-elf/:
* configure: Regenerate.
sim/testsuite/:
* configure: Regenerate.
sim/testsuite/frv-elf/:
* configure: Regenerate.
sim/testsuite/m32r-elf/:
* configure: Regenerate.
sim/testsuite/mips64el-elf/:
* configure: Regenerate.
sim/sh/:
* config.in: Regenerate.
* configure: Likewise.
gold/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* testsuite/Makefile.in: Likewise.
gprof/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* configure: Likewise.
* gconfig.in: Likewise.
opcodes/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gas/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
ld/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
gdb/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
* gnulib/Makefile.in: Likewise.
gdb/doc/:
* configure: Regenerate.
gdb/gdbserver/:
* aclocal.m4: Regenerate.
* config.in: Likewise.
* configure: Likewise.
gdb/testsuite/:
* configure: Regenerate.
* gdb.hp/configure: Likewise.
* gdb.hp/gdb.aCC/configure: Likewise.
* gdb.hp/gdb.base-hp/configure: Likewise.
* gdb.hp/gdb.compat/configure: Likewise.
* gdb.hp/gdb.defects/configure: Likewise.
* gdb.hp/gdb.objdbg/configure: Likewise.
* gdb.stabs/configure: Likewise.
binutils/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
* doc/Makefile.in: Likewise.
bfd/:
* Makefile.in: Regenerate.
* aclocal.m4: Likewise.
* config.in: Likewise.
* configure: Likewise.
bfd/doc/:
* Makefile.in: Regenerate.
readline/:
* configure: Regenerate.
readline/examples/rlfe/:
* configure: Regenerate.
|
|
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
|
|
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
|
|
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
|
|
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
offset or indexed based addressing mode 3.
|
|
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
patterns.
(arm_decode_shift): Catch illegal register based shifts.
(print_insn_arm): Properly handle negative register r0
post-indexed addressing.
|
|
* arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
lower 32 bits of long types to make hexadecimal output consistent
on both 32-bit and 64-bit hosts.
|
|
|
|
* config/tc-arm.c (insns): Fix encoding for torvsc.
gas/testsuite/
* gas/arm/iwmmxt2.d: Fix insn pattern for torvsc,
add patterns for waddsubhx.
* gas/arm/iwmmxt2.s: Add tests for waddsubhx.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
|
|
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
addressing modes.
|
|
* cpu/mep-core.cpu (fsft, ssarb): Mark as VOLATILE.
* cpu/mep-ivc2.cpu (many): Add VOLATILE to more insns that make
unspecified accesses to control registers.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-defs.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-defs.h: Regenerate.
* mep-cop1-32-model.cxx: Regenerate.
* mep-cop1-32-model.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-decode.h: Regenerate.
* mep-cop1-48-defs.h: Regenerate.
* mep-cop1-48-model.cxx: Regenerate.
* mep-cop1-48-model.h: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-defs.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-core1-defs.h: Regenerate.
* mep-core1-model.cxx: Regenerate.
* mep-core1-model.h: Regenerate.
* mep-core1-sem.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
* mep-defs.h: Regenerate.
* mep-desc.h: Regenerate.
* mep-model.cxx: Regenerate.
* mep-model.h: Regenerate.
* mep-sem.cxx: Regenerate.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
|
|
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
(build_modrm_byte): Add support to handle FMA4 instructions.
(md_show_usage): Add fma4.
<gas/testsuite changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gas/i386/i386.exp: Add FMA4 tests.
* gas/i386/x86-64-fma4.d: Ditto.
* gas/i386/fma4.d: Ditto.
* gas/i386/x86-64-fma4.s: Ditto.
* gas/i386/fma4.s: Ditto.
<opcodes changes>
2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* i386-opc.h (CpuFMA4): Add CpuFMA4.
(i386_cpu_flags): New.
* i386-gen.c: Add CPU_FMA4_FLAGS.
* i386-opc.tbl: Add FMA4 instructions.
* i386-tbl.h: Regenerate.
* i386-init.h: Regenerate.
* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
(OP_XMM_VexW): Ditto.
(OP_EX_VexW): Ditto.
(VEXI4_Fixup): Ditto.
(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
(get_vex_imm8): New. handle FMA4.
(OP_EX_VexReg): Ditto.
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* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
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* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
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* intrinsics.scm: Updates to support IVC2.
(belongs-to-group?): Check IVC2 slots.
(-slots-attribute): New.
(targets::attributes): Add SLOTS.
(target:add-well-known-intrinsics): Add CPMOV.
(md-insn): Add CPTYPE and CRET?.
(add-md-insn): Likewise.
(add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has
duplicate insns with different bit patterns.
(write-cgen-insn?): Add cret? support.
(intrinsics.h): Add vector types.
(runtime-op): Add vector support.
(intrinsic-protos.h): Let GCC define its types. Add cret? support.
* cpu/mep-core.cpu: Add CPTYPE and CRET attributes.
* cpu/mep-ivc2.cpu: Update all insns to include type information.
(h-cr-ivc2): Default to typeless.
(h-ccr-ivc2): Fix register width.
(SLOTS): Fix values and default.
(ivc2_*): Add control register names.
(crop, crqp, crpp, croc, crqc, crpc): Default to typeless.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
[sid/component/cgen-cpu/mep]
* ivc2-cop.cxx (ivc2_cphadd_w): Change to return value.
(ivc2_cpsubaca0u_b): Remove debug line.
* ivc2-cpu.h (ivc2_cpccadd_b): Change to return value.
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-desc.h: Regenerate.
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* cpu/mep.opc (mep_cgen_insn_supported_asm): New, skip the short
version of BSR when assembling VLIW bundles. Use it in mep-asm.c
[opcodes]
* mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
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* m32c.opc (parse_lab_5_3): Use correct enum.
opcodes/
* m32c-asm.c: Regenerate.
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