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AgeCommit message (Expand)AuthorFilesLines
2013-11-05opcodes/Yufeng Zhang1-0/+6
2013-10-30S/390: Disassemble 31-bit binaries with "zarch" opcode set by defaultAndreas Arnez1-0/+5
2013-10-15Fix neon vshll disassembly.Ramana Radhakrishnan1-0/+4
2013-10-142013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu1-0/+22
2013-10-142013-10-13 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore1-0/+5
2013-10-12Only allow 32-bit/64-bit registers for bndcl/bndcu/bndcnH.J. Lu1-0/+10
2013-10-11 * Removed short_hand field from opcode table andSean Keys1-0/+6
2013-10-11opcodes/Roland McGrath1-0/+5
2013-10-10opcodes/Roland McGrath1-0/+5
2013-10-10opcodes/Roland McGrath1-0/+5
2013-10-08opcodes/Jan Beulich1-0/+7
2013-10-072013-10-07 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu1-0/+4
2013-09-30Add Size64 to movq/vmovq with Reg64 operandH.J. Lu1-0/+5
2013-09-30Add AMD bdver4 support.Saravanan Ekanathan1-0/+5
2013-09-20 * libtool.m4 (_LT_ENABLE_LOCK <ld -m flags>): Remove non-canonicalAlan Modra1-0/+4
2013-09-17opcodes/Richard Sandiford1-0/+4
2013-09-04 PR gas/15914Nick Clifton1-0/+8
2013-09-022013-09-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel1-0/+6
2013-08-28 * aarch64-opc.c (aarch64_logical_immediate_p): Return FALSE if theNick Clifton1-0/+5
2013-08-23 opcodes/Maciej W. Rozycki1-0/+5
2013-08-23 PR binutils/15834Nick Clifton1-0/+7
2013-08-19include/opcode/Richard Sandiford1-0/+7
2013-08-19include/opcode/Richard Sandiford1-0/+9
2013-08-19Remove PREFIX_EVEX_0F3A3E and PREFIX_EVEX_0F3A3FH.J. Lu1-0/+6
2013-08-06opcodes/Richard Sandiford1-0/+5
2013-08-05gas/Eric Botcazou1-0/+16
2013-08-04include/opcode/Richard Sandiford1-0/+16
2013-08-03include/opcode/Richard Sandiford1-0/+7
2013-08-01opcodes/Richard Sandiford1-0/+4
2013-08-01include/opcode/Richard Sandiford1-0/+30
2013-08-01include/opcode/Richard Sandiford1-0/+8
2013-08-01opcodes/Richard Sandiford1-0/+4
2013-08-01opcodes/Richard Sandiford1-0/+6
2013-08-01opcodes/Richard Sandiford1-0/+7
2013-08-01opcodes/Richard Sandiford1-0/+6
2013-08-01opcodes/Richard Sandiford1-0/+4
2013-07-30opcodes/Peter Bergner1-0/+4
2013-07-26Add Intel AVX-512 supportH.J. Lu1-0/+257
2013-07-25opcodes/Richard Sandiford1-0/+6
2013-07-25Support Intel SHAH.J. Lu1-0/+17
2013-07-25Correct MPX ChangeLog entriesH.J. Lu1-2/+3
2013-07-24Support Intel MPXH.J. Lu1-0/+45
2013-07-17opcodes/Richard Sandiford1-0/+5
2013-07-14opcodes/Richard Sandiford1-0/+8
2013-07-14include/opcode/Richard Sandiford1-0/+14
2013-07-14include/opcode/Richard Sandiford1-0/+26
2013-07-14include/opcode/Richard Sandiford1-0/+5
2013-07-14opcodes/Richard Sandiford1-0/+5
2013-07-08Replace Xmmword with Qword on cvttps2piH.J. Lu1-0/+6
2013-07-07include/opcode/Richard Sandiford1-0/+6