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AgeCommit message (Expand)AuthorFilesLines
1998-01-19*** empty log message ***Jim Blandy1-0/+7
1998-01-16backout m32rx stuff, not ready to be checked inDoug Evans1-19/+0
1998-01-15Only look for two parallel instructions when we are at a 32 bit boundaryNick Clifton1-0/+5
1998-01-15generated file imported from cgenNick Clifton1-0/+1
1998-01-15Support for disassembling parallel instructions added.Nick Clifton1-0/+13
1998-01-13 * mips-opc.c (c.lt.s): Add r5900 variant.Jeff Law1-0/+7
1998-01-13 * Makefile.am: Add cgen support.Doug Evans1-0/+8
1998-01-13 * cgen-asm.c (build_asm_hash_table): Traverse compiled in table usingDoug Evans1-0/+11
1998-01-06 * txvu-dis.c (print_insn_txvu): Handle no separator betweenDoug Evans1-0/+5
1998-01-05 * txvu-dis.c, txvu-opc.c: New files.Doug Evans1-0/+9
1997-12-22 * configure.in: Add txvu support.Doug Evans1-0/+8
1997-12-22 * mips-opc.c: Add FP_D to s.d instruction flags.Ian Lance Taylor1-0/+8
1997-12-16 * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bitFred Fish1-0/+8
1997-12-16note that the fix for --enable-shared is not the real way it needs toBrendan Kehoe1-0/+3
1997-12-16 * mips-opc.c: Add many missing r5900 instructions.Jeff Law1-0/+6
1997-12-16fix tab problemMichael Meissner1-1/+1
1997-12-16Set new d30v opcode flag bits in appropriate instructions.Michael Meissner1-0/+7
1997-12-15 * configure: Only build libopcodes shared if --enable-shared's valueBrendan Kehoe1-0/+6
1997-12-15 * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants.Jeff Law1-0/+5
1997-12-13 * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change.Fred Fish1-0/+8
1997-12-12Renamed v850eq -> v850eaNick Clifton1-4/+4
1997-12-12 * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid.Richard Henderson1-0/+4
1997-12-11sanitization fixes. (files not mentioned, fences misspelled)Felix Lee1-1/+8
1997-12-09Test/fix d10v RTE instruction.Andrew Cagney1-0/+4
1997-12-08Removed disasm_symaddr() function and switched detection of Arm vs ThumbNick Clifton1-0/+7
1997-12-02Add support for displaying disassembled Thumb instrucitons.Nick Clifton1-0/+6
1997-12-02Display nop pseudo ops alongside equivalent disassembly.Nick Clifton1-0/+4
1997-12-01Mon Dec 1 12:25:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmu...Ian Lance Taylor1-0/+7
1997-12-01 * m68k-opc.c: Add argument for lpstop. From Olivier CarmonaIan Lance Taylor1-0/+15
1997-11-20 * sh-dis.c (print_insn_shx): Recognize all sh4 additions.Richard Henderson1-0/+8
1997-11-18 * d10v-dis.c (print_operand):Joern Rennecke1-0/+5
1997-11-18 * include/opcode/d10v.h (OPERAND_FLAG): Split into:Joern Rennecke1-0/+13
1997-11-12mips-opc.c (sync,cache): These are 3900 insns.Gavin Romig-Koch1-0/+4
1997-11-12 sh-opc.h (sh_table): Remove ftst/nan.Joern Rennecke1-0/+4
1997-11-03make vr5400 disassembly work; fix bugs in some vr5400 insnsKen Raeburn1-0/+9
1997-10-29 * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp):Gavin Romig-Koch1-0/+7
1997-10-28* mips-opc.c (ffc, ffs): Fix mask.Ken Raeburn1-0/+4
1997-10-28Add eit_vb, int_s, and int_m control registersMichael Meissner1-0/+7
1997-10-28Duh. Check in the vr5400 stuff from the directory that doesn't haveKen Raeburn1-0/+9
1997-10-28added vr5400 stuff, fixed "not" maskKen Raeburn1-0/+5
1997-10-23Removed C++ ismNick Clifton1-0/+4
1997-10-23 * sparc-opc.c: Add wr & rd for v9a asr's.Richard Henderson1-0/+7
1997-10-23 * sparc-opc.c (v9notv9a): New insn type.Richard Henderson1-0/+6
1997-10-17opcodes/mips-opc.c (bnezl,beqzl): Mark these as also tx39.Gavin Romig-Koch1-0/+4
1997-10-16opcodes/mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1.Gavin Romig-Koch1-0/+4
1997-10-14New dummy function for symbol_at_address_func field of disassemble_infoNick Clifton1-0/+9
1997-10-10Fixed bug extracting displacement from a JR instruction.Nick Clifton1-0/+4
1997-10-08opcodes/mips-opc.c: Three op mult is not an ISA insn.Gavin Romig-Koch1-0/+4
1997-10-08opcodes/mips-opc.c: Fix formatting.Gavin Romig-Koch1-0/+11
1997-10-02Use symbolic names rather than numbers for higher value system registers.Nick Clifton1-0/+7