Age | Commit message (Collapse) | Author | Files | Lines |
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PR 11982.
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* makefile.vms: Update CFLAGS, add clean target.
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* configure, config.in: Rebuild.
* sysdep.h: Include <stdlib.h> if it exists.
* sparc-dis.c: Include <stdio.h> and "sysdep.h". Don't include
<string.h>.
* Makefile.in: Rebuild dependencies.
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Andrew Bray <andy@madhouse.demon.co.uk>.
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The documented instructions are bf/s and bt/s.
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* d30v-dis.c (print_insn): Change the way signed constants
are displayed.
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(HFILES): New variable.
(CFILES): Add all C files.
(.dep, .dep1, dep.sed, dep, dep-in): New targets.
Delete old dependencies, and build new ones.
* dep-in.sed: New file.
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* m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
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* mn10300-opc.c: Add new "syscall" instruction.
Cleanups for beta release.
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mulul insns on the coldfire.
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(print_insn_big_arm): Set bytes_per_chunk and display_endian.
(print_insn_little_arm): Likewise.
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* i386-dis.c (fetch_data): Add prototype.
* m68k-dis.c (fetch_data): Add prototype.
(dummy_print_address): Add prototype. Make static.
* ppc-opc.c (valid_bo): Add prototype.
* sparc-dis.c (build_hash_table): Add prototype.
(is_delayed_branch, compute_arch_mask): Add prototypes.
(print_insn_sparc): Make several local variables const.
(compare_opcodes): Change arguments to const PTR. Add prototype.
* sparc-opc.c (arg): Change name field to be const.
(lookup_name, lookup_value): Add prototypes. Change table and
name parameters to be const.
(sparc_encode_asi): Change name parameter to be const.
(sparc_encode_membar, sparc_encode_prefetch): Likewise.
(sparc_encode_sparclet_cpreg): Likewise.
(sparc_decode_asi): Change return type to be const.
(sparc_decode_membar, sparc_decode_prefetch): Likewise.
(sparc_decode_sparclet_cpreg): Likewise.
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as relaxable.
For the relaxing assembler.
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the mc68000.
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* m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
floatformat_to_double to make portable.
(print_insn_arg): Use NEXTEXTEND macro when extracting extended
precision float.
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(OFF_SL_BR_SCALED): ... to this, and added the flag
TIC80_OPERAND_BASEREL to the flags word.
(tic80_opcodes): Replace all occurances of LSI_SCALED with
OFF_SL_BR_SCALED.
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Change mips_opcodes from const array to a pointer,
and change bfd_mips_num_opcodes from const int to int,
so that we can increase the size of the mips opcodes table
dynamically.
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store BITNUM values in the table in one's complement form
to match behavior when assembler is given a raw numeric
value for a BITNUM operand.
* tic80-dis.c (print_operand_bitnum): Ditto.
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* d30v-opc.c: Removed references to FLAG_X.
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* Makefile.in: Added d30v object files.
* configure: (bfd_d30v_arch) Rebuilt.
* configure.in: (bfd_d30v_arch) Added new case.
* d30v-dis.c: New file.
* d30v-opc.c: New file.
* disassemble.c (disassembler) Add entry for d30v.
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representations for the floating point BITNUM values.
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* makefile.vms: Remove 8 bit characters. Update to latest
gcc release.
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* m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
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(IMM24_PCREL): Likewise.
Fixes bugs exposed by disassembler testsuite.
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address for an extended PC relative instruction that is not a
branch.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
bytes_per_line.
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(tic80_opcodes): Sort entries so that long immediate forms
come after short immediate forms, making it easier for
assembler to select the right one for a given operand.
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display_endian.
(print_insn_mips16): Likewise.
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a symbol class that restricts translation to just that
class (general register, condition code, etc).
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and REG_DEST_E for register operands that have to be
an even numbered register. Add REG_FPA for operands that
are one of the floating point accumulator registers.
Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
(tic80_opcodes): Change entries that need even numbered
register operands to use the new operand table entries.
Add "or" entries that are identical to "or.tt" entries.
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disassembler.
* mips-dis.c (print_mips16_insn_arg): Display floating point
registers in operands of exit instruction. Print `$' before
register names in operands of entry and exit instructions.
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pairs for all predefined symbols recognized by the assembler.
Also used by the disassembling routines.
(tic80_symbol_to_value): New function.
(tic80_value_to_symbol): New function.
* tic80-dis.c (print_operand_control_register,
print_operand_condition_code, print_operand_bitnum):
Remove private tables and use tic80_value_to_symbol function.
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* d10v-dis.c (print_operand): Change address printing
to correctly handle PC wrapping. Fixes PR11490.
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branchs relaxable.
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(print_mips16_insn_arg): Likewise.
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opcode followed by an instruction which can not be extended.
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coldfire moveb instruction to not allow an address register as
destination. Although the documentation does not indicate that
this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation. Thanks to Andreas
Schwab for pointing this out to me.
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entries are presorted so that entries with the same mnemonic are
adjacent to each other in the table. Sort the entries for each
instruction so that this is true.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c: Include <libiberty.h>.
(print_insn_m68k): Sort the opcode table on the most significant
nibble of the opcode.
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"vsub", "vst", "xnor", and "xor" instructions.
(V_a1): Renamed from V_a, msb of accumulator reg number.
(V_a0): Add macro, lsb of accumulator reg number.
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