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2016-01-20Add support for an ARM specific 'y' section attribute flag to mark the ↵Mickael Guene5-5/+13
section as NOREAD. bfd/ChangeLog: * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread section using '.text.noread' pattern. gas/ChangeLog: * config/obj-elf.c (obj_elf_change_section) : Allow arm section with SHF_ARM_NOREAD section flag. * config/tc-arm.h (md_elf_section_letter) : Implement this hook to handle letter 'y'. (arm_elf_section_letter) : Declare it. * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set SHF_ARM_NOREAD section flag. * doc/c-arm.texi (ARM section attribute 'y'): Document it. gas/testsuite/ChangeLog: * gas/arm/section-execute-only.s: New test case. * gas/arm/section-execute-only.d: Expected output. ld/testsuite/ChangeLog: * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y' attribute usage. * ld-arm/thumb1-noread-present-one-section.s: Likewise. * ld-arm/thumb1-noread-present-two-section.s: Likewise. * ld-arm/thumb1-input-section-flag-match.s: Likewise. binutils/ChangeLog: * readelf.c (get_elf_section_flags): Display y letter for section with SHF_ARM_NOREAD section flag in readelf section output. (process_section_headers): Add y letter in readelf section output key mapping for ARM architecture.
2016-01-19Fix PR18735 test for RL78.Nick Clifton2-0/+6
* testsuite/ld-elf/pr18735.d: Allow for extra symbols between foo@FOO and bar@@FOO.
2016-01-18Re-enable rgn-at11 test for MIPS targets with adjusted section alignment.Nick Clifton3-6/+19
* testsuite/ld-scripts/rgn-at11.s: New file - based on rgn-at10.s but with 16 byte section alignment. * testsuite/ld-scripts/rgn-at11.d: Use new source file. Reenable test for MIPS targets.
2016-01-18Provide AC_PROG_LEX that copes with LEX=missing from top-levelAlan Modra2-4/+9
config/ PR binutils/19481 * override.m4 (AC_PROG_LEX): Define. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. ld/ * configure: Regenerate.
2016-01-18Skip linker plugin tests if the linker has not been configured to support ↵Nick Clifton2-0/+11
plugins. * ld-plugin/plugin.exp: Skip plugin tests if the linker is not configured to support plugins.
2016-01-17Regen configureAlan Modra2-2/+6
Picks up 2016-01-12 libtool.m4 change. bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2016-01-17m68hc11/12 and xgate config.sub weirdnessAlan Modra6-1/+17
Oddly, config.sub converts a duple ending in -elf for these target to -unknown-none, which means they aren't seen as elf targets by binutils. So, counter that. This exposes a number of testsuite issues (ones you would have seen if configuring with a full triple, say m68hc11-unknown-elf). binutils/ * testsuite/lib/binutils-common.exp (is_elf_format): Return true for m68hc11/12 and xgate triples. gas/ * testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test. ld/ * testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate. * testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate. * testsuite/ld-elf/pr14156a.d: Likewise. * testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate. * testsuite/ld-elf/sec64k.exp: Likewise.
2016-01-14Fix Thumb-Thumb farcall v6-M (no profile) testThomas Preud'homme4-9/+15
2016-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)): Set address of .foo section when linking. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc in .foo section. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected output to the above changes.
2016-01-13Mark the linker's -Bsymbolic-functions test as an expected failure for MIPS ↵Nick Clifton2-0/+5
targets. * ld-elf/elf.exp (-Bymsolic-functions): Expect to fail for MIPS targets.
2016-01-13Mark the linker's extract symbols test as an expected failure for MIPS targets.Nick Clifton2-0/+15
* testsuite/ld-scripts/script.exp (extract_symbol_test): Expect to fail for MIPS targets.
2016-01-13Mark the rgn-at11 test as an expected failure for MIPS targets.Nick Clifton2-1/+9
* ld-scripts/rgn-at11.d: Expect this test to fail for MIPS targets.
2016-01-12Add cantunwind when unwind info does not match start of section.Yury Usishchev5-0/+61
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when address in first unwind entry does not match start of section. tests * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-mix.d: New file. * ld-arm/unwind-mix1.s: New file. * ld-arm/unwind-mix2.s: New file.
2016-01-08[ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVEJiong Wang7-54/+64
2016-01-08 Richard Sandiford <richard.sandiford@arm.com> Jiong Wang <jiong.wang@arm.com> PR ld/19368 bfd/ * elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to reloc_class_ifunc. ld/ * testsuite/ld-arm/ifunc-3.rd: Update expected result. * testsuite/ld-arm/ifunc-4.rd: Likewise. * testsuite/ld-arm/ifunc-9.rd: Likewise. * testsuite/ld-arm/ifunc-10.rd: Likewise. * testsuite/ld-arm/ifunc-12.rd: Likewise. * testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-05Fix the execution of the MSP430 simulator testsuite.Nick Clifton4-1/+15
ld * emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the MSP430 hardware multiply address range. * scripttempl/elf32msp430.sc (__romdatastart): Define. (__romdatacopysize): Define. * scripttempl/elf32msp430_3.sc: Likewise. tests * testutils.inc (__pass): Use the LMA addresses of the _passmsg symbol. (__fail): Likewise.
2016-01-04MIPS/LD: Convert ELF linker emulation option macros to an enumMaciej W. Rozycki2-2/+10
ld/ * emultempl/mipself.em (PARSE_AND_LIST_PROLOGUE): Convert OPTION_INSN32 and OPTION_NO_INSN32 macros to an enum.
2016-01-04MIPS/BFD: Move attribute check after ELF file header flag checkMaciej W. Rozycki15-28/+47
We have a problem in that in making compatibility checks while merging private BFD data on the MIPS target we give priority to the attribute check, which may fail and cause the function to abort early on. The problem with this is the ABI compatibility aspect recorded in the attributes is relatively minor compared to aspects recorded in the ELF file header. However the premature exit causes any more important compatibility aspect violated to be masked and not reported to the user once a problem with attributes has been noticed. So move the attribute check after the ELF file header flag check in `_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely there. Take advantage of the resulting grouping of ELF file header handling together and remove the premature success return point for the first input object being handled, letting the code later on figure out output ABI flags even for this object. Update LD test cases according to messages from ELF file header checks now preceding ones from attribute checks. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move attribute check after ELF file header flag check. ld/ * testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of messages expected according to MIPS BFD private data merge changes. * testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2016-01-01Copyright update for binutilsAlan Modra352-443/+447
2016-01-01New 2016 binutils ChangeLog filesAlan Modra1-0/+14
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01binutils ChangeLog rotationAlan Modra2-0/+0
2015-12-30Fix assorted ChangeLog errorsAlan Modra2-62/+61
2015-12-26Add test for ARMv6-M farcall with no profile infoThomas Preud'homme5-0/+52
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/testsuite/ * ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no profile)". * ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file. * ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise. * ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
2015-12-24Add support for linking ARMv8-M object filesThomas Preud'homme11-0/+77
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise.
2015-12-22ARM: Fix exidx coverage for relocatable builds.Yury Usishchev8-46/+117
bfd * elf-bfd.h: Add callback to count additional relocations. * elf32-arm.c (_arm_elf_section_data): Add new counter. (insert_cantunwind_after): Increment relocations counter. (elf32_arm_fix_exidx_coverage): Remove exidx entries and add terminating CANTUNWIND entry only in final builds. (elf32_arm_add_relocation): New function. (elf32_arm_write_section): Add relocations in relocatable builds. (elf32_arm_count_additional_relocs): New function. (elf_backend_count_additional_relocs): New define. * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of .rel section. * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define. ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call elf32_arm_fix_exidx_coverage for relocatable builds. ld/testsuite * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-rel.d: New file. * ld-arm/unwind-rel1.s: New file. * ld-arm/unwind-rel2.s: New file. * ld-arm/unwind-rel3.s: New file.
2015-12-22Add support for ARM's NOREAD section flag.Mickael Guene11-0/+141
include/elf * arm.h: Add arm SHF_ARM_NOREAD section flag. bfd * bfd-in2.h: Regenerate. * section.c: Add SEC_ELF_NOREAD. * elf32-arm.c (elf32_arm_post_process_headers): Only set PF_X attribute if a segment only contains section with SHF_ARM_NOREAD flag. (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion. (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD to bfd flag. (elf32_arm_lookup_section_flags): New function to allow INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag. (elf32_arm_special_sections): Add special sections array to catch section prefix by '.text.noread' pattern. ld/testsuite * ld-arm/arm-elf.exp: New tests. * ld-arm/thumb1-input-section-flag-match.d: New * ld-arm/thumb1-input-section-flag-match.s: New * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New * ld-arm/thumb1-noread-present-one-section.d: New * ld-arm/thumb1-noread-present-one-section.s: New * ld-arm/thumb1-noread-present-two-section.d: New * ld-arm/thumb1-noread-present-two-section.s: New binutils * readelf.c (get_elf_section_flags): Add support for ARM specific section flags.
2015-12-17Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:Christophe Lyon1-0/+9
2015-12-16 Mickael Guene <mickael.guene@st.com> bfd/ * bfd-in2.h: Regenerate. * reloc.c: Add new relocations. * libbfd.h (bfd_reloc_code_real_names): Add new relocations display names. * elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new relocations. (elf32_arm_reloc_map): Add bfd/arm mapping for new relocations. (elf32_arm_final_link_relocate): Implement new relocations resolution. gas/ * doc/c-arm.texi: Add documentation about new directives * config/tc-arm.c (group_reloc_table): Add mapping between gas syntax and new relocations. (do_t_add_sub): Keep new relocations for add operand. (do_t_mov_cmp): Keep new relocations for mov operand. (insns): Use 'shifter operand with possible group relocation' operand parse code for movs operand. (md_apply_fix): Implement mov and add encoding when new relocations on them. (tc_gen_reloc): Add new relocations. (arm_fix_adjustable): Since offset has a limited range ([0:255]) we disable adjust_reloc_syms() for new relocations. gas/testsuite/ * gas/arm/adds-thumb1-reloc-local.d: New * gas/arm/adds-thumb1-reloc-local.s: New * gas/arm/movs-thumb1-reloc-local.d: New * gas/arm/movs-thumb1-reloc-local.s: New include/ * elf/arm.h: Add new arm relocations. ld/testsuite/ * ld-arm/arm-elf.exp (armelftests_common): Add new relocations tests. * ld-arm/thumb1-adds.d: New * ld-arm/thumb1-adds.s: New * ld-arm/thumb1-movs.d: New * ld-arm/thumb1-movs.s: New
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene5-0/+168
To support thumb1 execute-only code we need to support four new relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC). These relocations allow the static linker to finalize construction of symbol address. Typical sequence of code to get address of the symbol foo is then the following : movs r3, #:upper8_15:#foo lsls r3, #8 adds r3, #:upper0_7:#foo lsls r3, #8 adds r3, #:lower8_15:#foo lsls r3, #8 adds r3, #:lower0_7:#foo This will give following sequence of text and relocations after assembly : 4: 2300 movs r3, #0 4: R_ARM_THM_ALU_ABS_G3_NC foo 6: 021b lsls r3, r3, #8 8: 3300 adds r3, #0 8: R_ARM_THM_ALU_ABS_G2_NC foo a: 021b lsls r3, r3, #8 c: 3300 adds r3, #0 c: R_ARM_THM_ALU_ABS_G1_NC foo e: 021b lsls r3, r3, #8 10: 3300 adds r3, #0 10: R_ARM_THM_ALU_ABS_G0_NC foo
2015-12-10ld -r doesn't need plugin for slim lto objectH.J. Lu4-0/+31
Plugin isn't required on slim lto object for relocatable link. bfd/ PR ld/19317 * linker.c (_bfd_generic_link_add_one_symbol): Don't complain plugin needed to handle slim lto object for relocatable link. ld/testsuite/ PR ld/19317 * ld-plugin/lto.exp (lto_no_fat): New. (lto_link_tests): Add a test for PR ld/19317. (lto_run_tests): Likewise. (run_ld_link_tests): Likewise.
2015-12-10ld: Fix LTO for MinGW targetsKwok Cheung Yeung2-2/+11
When creating a dummy BFD for an IR file, the output BFD is used as a template for the new BFD, when it needs to be the input BFD passed into the function when not dealing with a BFD plugin. On most targets this is not an issue as the input and output formats are the same anyway, but on MinGW targets, there are two variant formats used (pe-i386/pe-x86-64 and pei-i386/pei-x86-64) which are similar but not interchangeable here. PR ld/18199 * plugin.c (plugin_get_ir_dummy_bfd): Use srctemplate as the template when calling bfd_create if it does not use the BFD plugin target vector.
2015-12-07ld: relax alignment requirements of compressed .debug_* section checksJan Beulich3-2/+7
This fixes a failure of the gabinormal linking test on some distros (where e.g. crt1.o has a .debug_aranges section with larger alignment).
2015-12-04Optimize R_386_GOT32/R_386_GOT32X only if addend is 0H.J. Lu13-0/+169
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend isn't 0. It isn't valid to convert movl foo@GOT+1(%ecx), %eax to leal foo@GOTOFF+1(%ecx), %eax nor to convert movq foo@GOTPCREL+1(%rip), %rax to leaq foo(%rip), %rax for x86-64. We should check if addend is 0 before optimizing R_386_GOT32 and R_386_GOT32X relocations. Testcases are added for i386 and x86-64. bfd/ * elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0. (elf_i386_relocate_section): Skip R_386_GOT32X optimization if addend isn't 0. ld/testsuite/ * ld-i386/i386.exp: Run mov2a, mov2b and mov3. * ld-i386/mov2.s: New file. * ld-i386/mov2a.d: Likewise. * ld-i386/mov2b.d: Likewise. * ld-i386/mov3.d: Likewise. * ld-i386/mov3.s: Likewise. * ld-x86-64/mov2.s: Likewise. * ld-x86-64/mov2a.d: Likewise. * ld-x86-64/mov2b.d: Likewise. * ld-x86-64/mov2c.d: Likewise. * ld-x86-64/mov2d.d: Likewise. * ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-02Make --enable-initfini-array the defaultAlan Modra3-54/+17
* configure.ac (--enable-initfini-array): Remove run test. Default to "yes". Change help string to --disable-initfini-array. * configure: Regenerate.
2015-12-01Properly check symbol defined by assignment in linker scriptH.J. Lu9-0/+96
Symbol defined by a linker assignment may have type bfd_link_hash_new or bfd_link_hash_undefined. And h->def_regular is always set. elf_i386_convert_load and elf_x86_64_convert_load should check h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new to see if a symbol is defined by a linker script. bfd/ PR ld/19319 * elf32-i386.c (elf_i386_convert_load): Check h->def_regular instead of bfd_link_hash_new. * elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip relocation overflow for bfd_link_hash_undefined and bfd_link_hash_new if h->def_regular is set. ld/testsuite/ PR ld/19319 * ld-i386/i386.exp: Run pr19319 test. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr19319.dd: New file. * ld-i386/pr19319a.S: Likewise. * ld-i386/pr19319b.S: Likewise. * ld-x86-64/pr19319.dd: Likewise. * ld-x86-64/pr19319a.S: Likewise. * ld-x86-64/pr19319b.S: Likewise.
2015-11-20MIPS/LD: Fix little-endian `mti' and `img' ELF emulationsMaciej W. Rozycki2-1/+7
Make the little-endian emulation the default for the `mips*el-mti-elf*' and `mips*el-img-elf*' targets, fixing the issue of LD rejecting, in its default configuration, object files produced by GAS also in its default configuration. ld/ * configure.tgt <mips*el-mti-elf*, mips*el-img-elf*>: Add targets.
2015-11-19Account for .tbss alignment when adjusting start of relroAlan Modra2-5/+16
Another option might be to not bump "dot" for .tbss alignment in the main section sizing loop, but that could leak some of the following section into the TLS segment. Leakage shouldn't matter since it will be to bytes past the end of .tdata, but for now this is a safer option. PR ld/19264 * ldlang.c (lang_size_sections): Don't ignore .tbss when adjusting start of relro region.
2015-11-16Fixes an invalid warning about memory region overflow on the ARM.Nick Clifton2-0/+21
PR ld/19106 * emultempl/armelf.em (_set_symbols): New function. Enables relaxation for non-relocatable links. (LDEMUL_SET_SYMBOLS): Define.
2015-11-14Bump version to 2.26.51Tristan Gingold2-10/+14
bfd/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.26.51 * configure: Regenerate. binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2015-11-13Add markers for release 2.26Tristan Gingold2-0/+7
binutils/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. gas/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26. ld/ 2015-11-13 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.26.
2015-11-12Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."Marcus Shawcroft4-40/+0
This reverts commit 3ebe65c0ff9f8f76c9971b1cc078273298f0c693. Reverted due to PR19188
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner4-0/+40
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-05Regenerate ld/Makefile.inAlan Modra2-0/+6
* Makefile.in: Regenerate.
2015-11-05DATA_SEGMENT_ALIGN documentation is not consistent with behaviourAlan Modra2-1/+7
PR ld/19203 * ld.texinfo (DATA_SEGMENT_ALIGN): Correct second expression.
2015-11-03[LD][AARCH64]Add test cases for big-endian.Renlin Li24-0/+316
ld/testsuite 2015-11-03 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run newly added test cases. * ld-aarch64/emit-relocs-301.d: Skip aarch64_be. * ld-aarch64/emit-relocs-302.d: Likwise. * ld-aarch64/emit-relocs-310.d: Likwise. * ld-aarch64/emit-relocs-515.d: Likwise. * ld-aarch64/emit-relocs-516.d: Likwise. * ld-aarch64/tls-large-desc.d: Likwise. * ld-aarch64/tls-large-ie.d: Likwise. * ld-aarch64/tls-relax-large-desc-ie.d: Likwise. * ld-aarch64/tls-relax-large-desc-le.d: Likwise. * ld-aarch64/tls-relax-large-gd-ie.d: Likwise. * ld-aarch64/tls-relax-large-gd-le.d: Likwise. * ld-aarch64/emit-relocs-301-be.d: New for aarch64_be. * ld-aarch64/emit-relocs-302-be.d: Likewise. * ld-aarch64/emit-relocs-310-be.d: Likewise. * ld-aarch64/emit-relocs-515-be.d: Likewise. * ld-aarch64/emit-relocs-516-be.d: Likewise. * ld-aarch64/tls-large-desc-be.d: Likewise. * ld-aarch64/tls-large-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-desc-le-be.d: Likewise. * ld-aarch64/tls-relax-large-gd-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-gd-le-be.d: Likewise.
2015-10-30Updated (simplified) Chinese translations for ld, bfd, binutils and gold.Nick Clifton2-3/+7
* po/zh_CN.po: Updated (simplified) Chinese translation.
2015-10-29Also check GOTPCRELXH.J. Lu2-1/+5
* ld-x86-64/plt-main3.rd: Also check GOTPCRELX.
2015-10-292015-10-29 Catherine Moore <clm@codesourcery.com>Catherine Moore6-3/+124
bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output section to bfd_abs_section_ptr if the stub is discarded. ld/testsuite/ * ld-mips-elf/mips16-fp-stub-1.s: New. * ld-mips-elf/mips16-fp-stub-2.s: New. * ld-mips-elf/mips16-fp-stub.d: New. * ld-mips-elf/mips-elf.exp: Run new tests. * ld-mips-elf/mips16-intermix.d: Update expected output. https://sourceware.org/ml/binutils/2015-10/msg00137.html
2015-10-29Add support for AArch64 CloudABI binaries.Ed Schouten6-0/+71
ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.tgt (targ_emul): Likewise. * emulparams/aarch64cloudabi.sh: New file. * emulparams/aarch64cloudabib.sh: New file. * Makefile.in: Regenerate. bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64. For this target we have to make sure we use ELFOSABI_CLOUDABI instead of ELFOSABI_NONE. * configure.ac (tb): Likewise. * elfnn-aarch64.c: Likewise. * targets.c (_bfd_target_vector): Likewise. * configure: Regenerate. gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the cloudabi format if the TARGET_OS is cloudabi.
2015-10-29Fix reporting of command line options that need an argument, but which occur ↵Nick Clifton2-4/+32
as the last option on the command line. PR ld/19146 * lexsup.c (parse_args): Correct error message for an option that is missing its argument if that option is the last one on the command line.
2015-10-29Re: Orphan output section with multiple input sectionsAlan Modra7-18/+76
The last patch missed handling the case where the ideal place to put an orphan was after a non-existent output section statement, as can happen when not using the builtin linker scripts. This patch uses the updated flags for that case too, and extends the support to mmo and pe. PR ld/19162 * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Pass updated flags to lang_output_section_find_by_flags. * emultempl/mmo.em (mmo_place_orphan): Merge flags for any other input sections that might match a new output section to decide placement. * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * ldlang.c (lang_output_section_find_by_flags): Add sec_flags param. * ldlang.h (lang_output_section_find_by_flags): Update prototype.
2015-10-29fix typo in ld's texinfoMatthias Klose2-1/+5
* ld.texinfo (Options <-rpath>): Fix typo.
2015-10-28Add a test for PR ld/19162H.J. Lu5-0/+23
PR ld/19162 * ld-x86-64/x86-64.exp: Run pr19162. * ld-x86-64/pr19162.d: New file. * ld-x86-64/pr19162a.s: Likewise. * ld-x86-64/pr19162b.s: Likewise.