Age | Commit message (Collapse) | Author | Files | Lines |
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bfd/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
* elf64-x86-64.c (elf_x86_64_check_relocs): Allow R_X86_64_64
relocations in SEC_DEBUGGING sections when building shared
libraries.
ld/testsuite/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/simple.c: New.
* ld-x86-64/x86-64-x32.rd: Likewise.
* ld-x86-64/x86-64.exp: Check building x32 DSO from x86-64
object file.
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bfd/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12851
* elflink.c (elf_gc_sweep): Don't check SHT_NOTE sections here.
(bfd_elf_gc_sections): Also check SHT_NOTE sections.
ld/testsuite/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12851
* ld-elf/pr12851.d: New.
* ld-elf/pr12851.s: Likewise.
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2011-06-07 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/elf.exp: Build symbol3.a and symbol3w.a.
* ld-elf/symbol3.s: New.
* ld-elf/symbol3w.s: Likewise.
* ld-elf/warn3.d: Likewise.
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Add rule to build eelf32am33lin.c
* Makefile.in: Regenerate.
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* config/tc-arm.c (parse_address_main): Handle -0 offsets.
(encode_arm_addr_mode_2): Set default sign of zero here ...
(encode_arm_addr_mode_3): ... and here.
(encode_arm_cp_address): ... and here.
(md_apply_fix): Use default sign of zero here.
gas/testsuite/
* gas/arm/inst.d: Adjust for signed zero offsets.
* gas/arm/ldst-offset0.d: New test.
* gas/arm/ldst-offset0.s: New test.
* gas/arm/offset-1.d: New test.
* gas/arm/offset-1.s: New test.
ld/testsuite/
Adjust tests for zero offset formatting.
* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-arm-thumb.d: Adjust.
* ld-arm/farcall-group-size2.d: Adjust.
* ld-arm/farcall-group.d: Adjust.
* ld-arm/farcall-mix.d: Adjust.
* ld-arm/farcall-mix2.d: Adjust.
* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
* ld-arm/farcall-mixed-lib.d: Adjust.
* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
* ld-arm/farcall-thumb-thumb.d: Adjust.
* ld-arm/ifunc-10.dd: Adjust.
* ld-arm/ifunc-3.dd: Adjust.
* ld-arm/ifunc-4.dd: Adjust.
* ld-arm/ifunc-5.dd: Adjust.
* ld-arm/ifunc-6.dd: Adjust.
* ld-arm/ifunc-7.dd: Adjust.
* ld-arm/ifunc-8.dd: Adjust.
* ld-arm/jump-reloc-veneers-long.d: Adjust.
* ld-arm/tls-longplt-lib.d: Adjust.
* ld-arm/tls-thumb1.d: Adjust.
opcodes/
* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
as address offset.
(print_arm_address): Likewise. Elide positive #0 appropriately.
(print_insn_arm): Likewise.
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bfd/
* elf32-arm.c (elf32_arm_final_link_relocate): Only do bl conversion
for known functions.
(elf32_arm_swap_symbol_in): Only set ST_BRANCH_TO_ARM for function
symbols.
include/elf/
* arm.h (arm_st_branch_type): Add ST_BRANCH_UNKNOWN.
ld/testsuite/
* ld-arm/cortex-a8-far.d: Adjust expected output.
* ld-arm/arm-call1.s: Give function symbol correct type.
* ld-arm/arm-call2.s: Ditto.
* ld-arm/farcall-group4.s: Ditto.
* ld-arm/arm-elf.exp (cortex-a8-far): Define far symbols with correct
type via assembly file.
* ld-arm/cortex-a8-far-3.s: New file.
* ld-arm/abs-call-1.s: Add Thumb tests
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Nathan Sidwell <nathan@codesourcery.com>
gas/
* config/tc-arm.c (fix_new_arm): Create an absolute symbol for
pc-relative fixes to constants.
* config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.
ld/testsuite/
* ld-arm/abs-call-1.d: New.
* ld-arm/abs-call-1.s: New.
* ld-arm/arm-elf.exp: Add it.
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bfd/
* elf32-arm.c (arm_stub_is_thumb): Add
arm_stub_long_branch_v4t_thumb_tls_pic.
(elf32_arm_final_link_relocate): TLS stubs are always ARM.
Handle Thumb stubs.
ld/testsuite/
* ld-arm/tls-longplt.d: Update expected output.
* ld-arm/tls-thumb1.d: Ditto.
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missed from last commit
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bfd/
2011-05-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12809
* elf64-x86-64.c (elf_x86_64_relocate_section): Handle
R_X86_64_TPOFF64 in executable.
ld/testsuite/
2011-05-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12809
* ld-x86-64/tlsbin.s: Add a test for LE with large model.
* ld-x86-64/tlsbin.dd: Updated.
* ld-x86-64/tlsbin.rd: Likewise.
* ld-x86-64/tlsbin.sd: Likewise.
* ld-x86-64/tlsbin.td: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlsbindesc.rd: Likewise.
* ld-x86-64/tlsbindesc.sd: Likewise.
* ld-x86-64/tlsbindesc.td: Likewise.
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setting TLS file offset.
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libraries in a non-native environment.
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* ldmain.c (reloc_overflow): Use %H rather than %C.
(reloc_dangerous, unattached_reloc): Likewise.
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bfd/
* elf.c (assign_file_positions_for_load_sections): Set sh_offset for
.tbss, and page align same for all SHT_NOBITS sections.
ld/
* ldlang.c (lang_output_section_find_by_flags): Match orphan .sdata2
like sections to existing .sdata2, and similarly for orphan TLS
sections.
* emultempl/elf32.em (place_orphan): Exclude .tbss from orphan_bss.
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* ld-elf/binutils.exp: Don't run tdata3 for hppa64.
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empty program header.
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* ld-elf/tdata3.s: New test.
* ld-elf/tbss3.s: New test.
* ld-elf/binutils.exp: Consolidate tbss and tdata tests.
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* ld-tic6x/pcr-reloc.d: New test.
* ld-tic6x/pcr-reloc.s: New test.
gas/testsuite/
* gas/tic6x/pcr-relocs.d: New test.
* gas/tic6x/pcr-relocs.s: New test.
* gas/tic6x/pcr-relocs-undef.d: New test.
* gas/tic6x/pcr-relocs-undef.s: New test.
* gas/tic6x/reloc-bad-2.s: Update for pcr_offset.
* gas/tic6x/reloc-bad-2.l: Update for pcr_offset.
bfd/
* elf32-tic6x.c (elf32_tic6x_howto_table): Add entries for
R_C6000_PCR_H16 and R_C6000_PCR_L16.
(elf32_tic6x_relocate_section): Handle them.
gas/
* config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
(tic6x_parse_name): Handle it.
(tic6x_fix_new_exp): Handle O_pcr_offset.
(tic6x_fix_adjustable): Return 0 for the new relocs.
(md_apply_fix): Handle them.
(tc_gen_reloc): Likewise.
* config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
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* elflink.c (elf_link_add_object_symbols): Process .gnu.warning
sections when building shared libraries.
* lib/ld-lib.exp (run_cc_link_tests): Add an optional 8th
parameter - an expected warning message from the linker.
* ld-elf/shared.exp (build_tests): Expect a warning message when
building the libbarw.so library.
* ld-elf/shared.exp: Run library building tests even when not
building a native toolchain.
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* emultempl/rxelf.em (ignore_lma): New variable.
(rx_elf_create_output_section_statements): Pass the setiing of
ignore_lma to bfd_elf32_rx_set_target_flags.
(OPTION_IGNORE_LMA): Define.
(OPTION_NO_IGNORE_LMA): Define.
(PARSE_AND_LIST_LONGOPTS): Add ignore lma.
(PARSE_AND_LIST_OPTIONS): Add ignore lma.
(PARSE_AND_LIST_ARGS_CASES): Add ignore lma.
* elf32-rx.c (ignore_lma): New variable.
(bfd_elf32_rx_set_target_flags): Add ignore_lma parameter.
(rx_modify_program_headers): Only copy the LMA into the VMA if
ignore_lma is true.
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include/
* bfdlink.h (struct bfd_link_callbacks <notice>): Add "flags" and
"string" param.
bfd/
* coff-aux.c (coff_m68k_aux_link_add_one_symbol): Adjust "notice" call.
* elflink.c (elf_link_add_object_symbols): Likewise.
* linker.c (_bfd_generic_link_add_one_symbol): Likewise.
ld/
* ldmain.c (notice): Add "flags" and "string" param.
* plugin.c (plugin_notice): Likewise. Handle indirect, warning
and constructor syms.
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2011-05-16 H.J. Lu <hongjiu.lu@intel.com>
* ld-scripts/phdrs.exp: Replace --private with
--private-headers for objdump.
* ld-scripts/phdrs2.exp: Likewise.
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use its value.
* ldexp.c (exp_fold_tree_1): Skip self-assignment. Expand
comment on copying symbol type.
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* plugin.c (plugin_notice): Set u.undef.abfd for symbols made
undefweak.
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previous lma_region if given address.
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* elfxx-mips.c (_bfd_mips_elf_check_relocs): Record both local and
global GOT entries for GOT_PAGE relocations against global symbols.
ld/testsuite/
* lib/ld-lib.exp (run_ld_link_tests): Simplify pass/fail logic.
Fail if the link command fails and if no test rules are defined.
* ld-mips-elf/reloc-6a.s, ld-mips-elf/reloc-6b.s: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
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(eelf32_tic6x_linux_be.c, eelf32_tic6x_linux_le.c,
eelf32_tic6x_elf_be.c, eelf32_tic6x_elf_le.c): New rules.
* Makefile.am (ALL_EMULATIONS): Add these files.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): Depend on tic6xdsbt.em.
* Makefile.in: Regenerated.
* emultempl/tic6xdsbt.em (is_tic6x_target): Allow more tic6x target
vectors.
* emulparams/elf32_tic6x_elf_be.sh: New file.
* emulparams/elf32_tic6x_elf_le.sh: New file.
* emulparams/elf32_tic6x_linux_be.sh: New file.
* emulparams/elf32_tic6x_linux_le.sh: New file.
* configure.tgt (tic6x-*-elf, tic6x-*-uclinux): New.
(tic6x-*-*): Replaced by these.
ld/testsuite/
* ld-tic6x/dsbt.ld (OUTPUT_FORMAT): Add.
* ld-tic6x/tic6x.exp: Add OSABI tests.
bfd/
* config.bfd (tic6x-*-elf, tic6x-*-uclinux): New.
(tic6x-*-*): Replaced by these.
* elf32-tic6x.c (elf32_tic6x_set_osabi): New static function.
(elf32_tic6x_check_relocs): Create dynamic sections if -shared.
(elf_backend_relocs_compatible, elf_backend_post_process_headers):
Define.
(elf32_bed, TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, TARGET_BIG_SYM,
TARGET_BIG_NAME, ELF_OSABI): Redefine twice, and include
"elf32-target.h" two more times.
* configure.in: Handle bfd_elf32_tic6x_linux_be_vec,
bfd_elf32_tic6x_linux_le_vec, bfd_elf32_tic6x_elf_be_vec and
bfd_elf32_tic6x_elf_le_vec.
* configure: Regenerate.
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2011-05-13 Jan Beulich <jbeulich@novell.com>
* config.bfd: Add targets x86_64-*-pe and x86_64-*-pep.
ld/
2011-05-13 Jan Beulich <jbeulich@novell.com>
* configure.tgt: Add targets x86_64-*-pe and x86_64-*-pep.
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* ld-scripts/weak.exp: Correct comments. Don't xfail sh-pe. Remove
redundant xfail.
* ld-selective/sel-dump.exp: Don't xfail alpha.
* ld-selective/selective.exp: Run for alpha.
* ld-undefined/weak-undef.exp: Don't xfail hppa64.
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default_ld_assemble.
(ld_assemble_flags): New function.
* ld-elf/frame.exp: Pass -mpic and -mpid flags to the assembler on
tic6x.
* ld-elf/exclude.exp: Likewise.
* lib/ld-lib.exp (default_ld_assemble): Take extra argument in_flags
and pass it to the assembler.
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* ld-mips-elf/mips-elf.exp: Add missing $has_newabi tests.
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2011-05-09 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/elf.exp (array_tests): Remove "pr12730".
(array_tests_pie): Remove "PIE pr12730".
(array_tests_static): Remove "static pr12730".
* ld-elf/pr12730.cc: Removed.
* ld-elf/pr12730.out: Likewise.
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bfd/
* bfd-in.h (elf32_tic6x_fix_exidx_coverage): Add prototype.
* bfd-in2.h: Regenerate.
* elf32-tic6x.c: Include limits.h.
(tic6x_unwind_edit_type, tic6x_unwind_table_edit,
_tic6x_elf_section_data): New.
(elf32_tic6x_section_data): Define.
(elf32_tic6x_new_section_hook): Allocate target specific data.
(elf32_tic6x_add_unwind_table_edit): New function.
(get_tic6x_elf_section_data, elf32_tic6x_adjust_exidx_size,
elf32_tic6x_insert_cantunwind_after, elf32_tic6x_add_low31,
elf32_tic6x_copy_exidx_entry): New functions.
(elf_backend_write_section): Define.
ld/
* emultempl/tic6xdsbt.em (merge_exidx_entries): New.
(compare_output_sec_vma): New function.
(gld${EMULATION_NAME}_after_allocation): New function.
(OPTION_NO_MERGE_EXIDX_ENTRIES): Define.
(PARSE_AND_LIST_OPTIONS): Add --no-merge-exidx-entries.
(PARSE_AND_LIST_ARGS_CASES): Add OPTION_NO_MERGE_EXIDX_ENTRIES.
(LDEMUL_AFTER_ALLOCATION): Set.
* ld.texinfo: Document c6x --no-merge-exidx-entries.
ld/testsuite/
* ld-tic6x/discard-unwind.ld: New.
* ld-tic6x/unwind.ld: New.
* ld-tic6x/unwind-1.d: New test.
* ld-tic6x/unwind-1.s: New test.
* ld-tic6x/unwind-2.d: New test.
* ld-tic6x/unwind-2.s: New test.
* ld-tic6x/unwind-3.d: New test.
* ld-tic6x/unwind-3.s: New test.
* ld-tic6x/unwind-4.d: New test.
* ld-tic6x/unwind-4.s: New test.
* ld-tic6x/unwind-5.d: New test.
* ld-tic6x/unwind-5.s: New test.
* ld-tic6x/unwind-6.d: New test.
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PR ld/12365
* cofflink.c (bfd_coff_link_input_bfd): Check for and warn about
references to symbols defined in discarded sections.
ld/ChangeLog:
PR ld/12365
* scripttempl/pe.sc (__rt_psrelocs_start): New symbol definition.
(__rt_psrelocs_end): Likewise.
(__rt_psrelocs_size): Likewise difference between the above.
(__RUNTIME_PSEUDO_RELOC_LIST_END__): Move outside .rdata section
immediately after end of pseudo-reloc data.
(___RUNTIME_PSEUDO_RELOC_LIST_END___): Likewise.
(__RUNTIME_PSEUDO_RELOC_LIST__): Move outside .rdata section and
calculate backward from list end.
(___RUNTIME_PSEUDO_RELOC_LIST___): Likewise.
* scripttempl/pep.sc: Likewise.
ld/testsuite/ChangeLog:
PR ld/12365
* ld-plugin/plugin-7.d: Allow underscore in error message.
* ld-plugin/plugin-8.d: Likewise.
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bfd/
2011-05-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12730
* elf.c (_bfd_elf_section_offset): Check SEC_ELF_REVERSE_COPY.
* elflink.c (elf_link_input_bfd): Reverse copy .ctors/.dtors
sections if needed.
* section.c (SEC_ELF_REVERSE_COPY): New.
* bfd-in2.h: Regenerated.
ld/testsuite/
2011-05-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12730
* ld-elf/elf.exp (array_tests): Add "pr12730".
(array_tests_pie): New.
(array_tests_static): Add -static for "static init array mixed".
Add "static pr12730". Run array_tests_pie for Linux.
* ld-elf/init-mixed.c (ctor1007): Renamed to ...
(ctor1007a): This.
(ctor1007b): New.
(ctors1007): Remove ctor1007. Add ctor1007b and ctor1007a.
(dtor1007): Renamed to ...
(dtor1007a): This.
(dtor1007b): New.
(dtors1007): Remove dtor1007. Add dtor1007b and dtor1007a.
(ctor65535): Renamed to ...
(ctor65535a): This.
(ctor65535b): New.
(ctors65535): Remove ctor65535. Add ctor65535b and ctor65535a.
(dtor65535): Renamed to ...
(dtor65535a): This.
(dtor65535b): New.
(dtors65535): Remove dtor65535. Add dtor65535b and dtor65535a.
* ld-elf/pr12730.cc: New.
* ld-elf/pr12730.out: Likewise.
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* scripttempl/alphavms.sc (CODE): Add *$CODE*.
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* elf32-arm.c (cortex_a8_erratum_scan): If the stub is a Thumb
branch to a PLT entry, redirect it to the PLT's Thumb entry point.
ld/testsuite/
* ld-arm/cortex-a8-fix-b-plt.s, ld-arm/cortex-a8-fix-b-plt.d,
ld-arm/cortex-a8-fix-bcc-plt.s, ld-arm/cortex-a8-fix-bcc-plt.d,
ld-arm/cortex-a8-fix-bl-plt.s, ld-arm/cortex-a8-fix-bl-plt.d,
ld-arm/cortex-a8-fix-blx-plt.s, ld-arm/cortex-a8-fix-blx-plt.d,
ld-arm/cortex-a8-fix-plt.ld: New tests.
* ld-arm/arm-elf.exp: Run them.
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* elf32-tic6x.c (elf32_tic6x_final_link): New function.
(elf32_tic6x_merge_attributes): Do not warn for PID or PIC
mismatch. Choose the lower of the two values.
(bfd_elf32_bfd_final_link): New macro.
ld/testsuite/
* ld-tic6x/shared-nopic.d: New test.
* ld-tic6x/shared-nopid.d: New test.
* ld-tic6x/attr-pid-21.d: Don't expect a warning; check readelf
output instead.
* ld-tic6x/attr-pid-12.d: Likewise.
* ld-tic6x/attr-pic-01.d: Likewise.
* ld-tic6x/attr-pic-10.d: Likewise.
* ld-tic6x/attr-pid-01.d: Likewise.
* ld-tic6x/attr-pid-10.d: Likewise.
* ld-tic6x/attr-pid-02.d: Likewise.
* ld-tic6x/attr-pid-20.d: Likewise.
* ld-tic6x/got-reloc-inrange.d: Pass -mpic and -mpid options to gas.
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* emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Add
LDEMUL_ADD_OPTIONS and LDEMUL_HANDLE_OPTION.
* emultempl/vms.em (OPTION_IDENTIFICATION): New macro.
(gld${EMULATION_NAME}_add_options): New function.
(gld${EMULATION_NAME}_list_options): Ditto.
(gld${EMULATION_NAME}_handle_option): Ditto.
(LDEMUL_ADD_OPTIONS, LDEMUL_HANDLE_OPTION)
(LDEMUL_LIST_OPTIONS): Define.
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* ldexp.h (lang_phase_type): Add lang_assigning_phase_enum.
* ldexp.c (exp_fold_tree_1): Correct assign to dot comment. Don't
assign to dot when lang_assigning_phase_enum.
* ldlang.h (lang_do_assignments): Update prototype.
* ldlang.c (lang_do_assignments): Add phase parameter. Update all
callers.
* pe-dll.c (pe_dll_fill_sections, pe_exe_fill_sections): Update
lang_do_assignments calls.
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bfd/
* elf32-tic6x.c (elf32_tic6x_howto_table,
elf32_tic6x_howto_table_rel, (elf32_tic6x_gc_sweep_hook,
elf32_tic6x_relocate_section, elf32_tic6x_check_relocs):
Add R_C6000_EHTYPE.
gas/
* config/tc-tic6x.c (s_ehtype): New function.
(md_pseudo_table): Add "ehtype".
(tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
* doc/c-tic6x.texi: Document .ehtype directive.
ld/testsuite/
* ld-tic6x/ehtype-reloc-1-rel.d: New test.
* ld-tic6x/ehtype-reloc-1.d: New test.
* ld-tic6x/ehtype-reloc-1.s: New test.
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2011-05-01 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12718
* ld-i386/i386.exp: Run pr12718.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr12718.d: New.
* ld-i386/pr12718.s: Likewise.
* ld-x86-64/pr12718.d: Likewise.
* ld-x86-64/pr12718.s: Likewise.
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* emultempl/pe.em (_after_open): Correctly check whether symbol is
in undef list.
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(dwcfi_hash): New static hash variable.
(get_debugseg_name): New.
(alloc_debugseg_item): New.
(make_debug_seg): New.
(dwcfi_hash_insert): New.
(dwcfi_hash_find): New.
(dwcfi_hash_find_or_make): New.
(cfi_insn_data): New member cur_seg.
(cie_entry): Likewise.
(fde_entry): New cseg and handled members.
(alloc_fde_entry): Initialize cseg member.
(alloc_cfi_insn_data): Initialize cur_seg member.
(dot_cfi_sections): Compare for beginning of
section names via strncmp.
(get_cfi_seg): New.
(cfi_finish): Treat link-once sections.
(is_now_linkonce_segment): New local helper.
(output_cie): Ignore cie entries not member of current
segment.
(output_fde): Likewise.
(select_cie_for_fde): Likewise.
(cfi_change_reg_numbers): Add new argument for current segment
and ignore insn elements, if not part of current segment.
* ehopt.c (get_cie_info): Use strncmp for
section name matching.
(heck_eh_frame): Likewise.
* coffcode.h (sec_to_styp_flags): Allow linkonce for
debugging sections.
* scripttempl/pe.sc: Handle .eh_frame($|.)* sections.
* scripttempl/pep.sc: Likewise.
* ld-pe/pe.exp: Add cfi/cfi32 tests.
* ld-pe/cfi.d: New.
* ld-pe/cfi32.d: New.
* ld-pe/cfia.s: New.
* ld-pe/cfib.s: New.
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