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2019-05-28PE linker segmentation fault with MALLOC_PERTURB_=1Alan Modra3-2/+11
PR 24596 * emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Check that the output is coff before accessing coff tdata. * emultempl/pep.em (gld_${EMULATION_NAME}_after_open): Likewise.
2019-05-28aarch64: fix variant_pcs ld testsSzabolcs Nagy3-78/+81
Force sysv hash style for reliable symbol table layout. ld/ChangeLog: * testsuite/ld-aarch64/variant_pcs-now.d: Use --hash-style=sysv. * testsuite/ld-aarch64/variant_pcs-shared.d: Likewise.
2019-05-27Generic ELF target group signature symbolAlan Modra2-1/+9
Even though the generic ELF target doesn't handle groups correctly, this helps avoid a segfault in bfd_elf_set_group_contents seen on d30v-elf, dlx-elf, pj-elf, and xgate-elf when linking the pr22836 testcase. PR 24596 bfd/ * linker.c (_bfd_generic_link_output_symbols): Heed BSF_KEEP. ld/ * emultempl/genelf.em (gld${EMULATION_NAME}_after_open): Set BFS_KEEP on group signature symbol.
2019-05-24aarch64: handle STO_AARCH64_VARIANT_PCS in bfdSzabolcs Nagy8-0/+339
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-05-24Regen POTFILES for bpfAlan Modra2-0/+5
bfd/ * po/SRC-POTFILES.in: Regenerate. gas/ * po/POTFILES.in: Regenerate. ld/ * po/BLD-POTFILES.in: Regenerate. opcodes/ * po/POTFILES.in: Regenerate.
2019-05-24PowerPC notoc linkage stubsAlan Modra4-0/+50
Use pcrel addressing instructions in linkage stubs. bfd/ * elf64-ppc.c: Comment on powerxx _notoc stub variants. (LI_R11_0, LIS_R11, ORI_R11_R11_0, SLDI_R11_R11_34): Define. (PADDI_R12_PC, PLD_R12_PC, D34, HA34): Define. (struct ppc_link_hash_table): Add powerxx_stubs. (ppc64_elf_check_relocs): Set powerxx_stubs. (build_powerxx_offset, size_powerxx_offset), (num_relocs_for_powerxx_offset), (emit_relocs_for_powerxx_offset): New functions. (plt_stub_size): Size powerxx stubs. (ppc_build_one_stub): Emit powerxx stubs. (ppc_size_one_stub): Size powerxx stubs. Omit .eh_frame for powerxx stubs. ld/ * testsuite/ld-powerpc/notoc2.d, * testsuite/ld-powerpc/notoc2.s: New test. * testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-24PowerPC GOT_PCREL34 optimisationAlan Modra5-0/+225
bfd/ * elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for R_PPC64_GOT_PCREL34. (xlate_pcrel_opt): New function. (ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34. (ppc64_elf_relocate_section): Edit GOT indirect to GOT relative for R_PPC64_GOT_PCREL34. Implement R_PPC64_PCREL_OPT optimisation. ld/ * testsuite/ld-powerpc/pcrelopt.s, * testsuite/ld-powerpc/pcrelopt.d, * testsuite/ld-powerpc/pcrelopt.sec: New test. * testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-23ld: add support for eBPFJose E. Marchesi13-8/+143
This patch adds support to the linker for the Linux eBPF architecture. A minimal testsuite is included. ld/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64bpf.c. * Makefile.in (prefix): Regenerate. * configure.tgt (targ_extra_ofiles): Add case for bpf-*-* targets. * emulparams/elf64bpf.sh: New file. * testsuite/lib/ld-lib.exp (check_gc_sections_available): Add bpf-*-* to the list of targets not supporting gc-sections. * testsuite/ld-bpf/bar.s: New file. * testsuite/ld-bpf/jump-1.d: Likewise. * testsuite/ld-bpf/foo.s: Likewise. * testsuite/ld-bpf/call-1.d: Likewise. * testsuite/ld-bpf/bpf.exp: Likewise. * testsuite/ld-bpf/baz.s: Likewise.
2019-05-23Re: Have the linker report an error if the same script is used twiceAlan Modra2-30/+52
git commit 6ec6968b1b2 results in ... error: linker script file '/usr/local/lib64/libgcc_s.so' appears multiple times collect2: error: ld returned 1 exit status FAIL: bootstrap This patch changes things so that an error is given only when a -T script or the default script is invoked more than once. I'm still a little nervous that we match script file names, not the entire path. PR 24576 * ldfile.c (enum script_open_style): New. (struct script_name_list): New. (ldfile_open_command_file_1): Take a script_open_style param rather than booleans. Adjust callers. Only fail when -T or default -T script is invoked twice. (ldfile_try_open_bfd): Revert last change.
2019-05-22Have the linker report an error if the same script is used twice.Nick Clifton5-6/+57
PR 24576 * ld/ldfile.c: (ldfile_open_command_file_1): Add new parameter - is_script. If true check that the file has not already been parsed as a linker script. (ldfile_open_script_file): New function. (ldfile_try_open_bfd): Use the new function in place of ldfile_open_command_line. * ldmain.c (main): Likewise. * lexsup.c (parse_args): Use the new function for opening linker scripts with the -T option. * ldfile.h (ldfile_open_script_file): Add prototype.
2019-05-21MIPS/LD: Reject tprel_hi and tprel_lo relocations in shared libraryFaraz Shahbazker6-4/+53
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Generate error for TLS_TPREL_HI16(/LO16) relocations in shared library. ld/ * testsuite/ld-mips-elf/pic-reloc-5.s: Add tests for %tprel_hi and %tprel_lo relocations. * testsuite/ld-mips-elf/pic-reloc-6.s: Likewise. * testsuite/ld-mips-elf/pic-reloc-5.d: Update accordingly. * testsuite/ld-mips-elf/pic-reloc-6.d: Likewise. * testsuite/ld-mips-elf/pic-reloc-tls.ld: New test linker script file.
2019-05-21MIPS/LD: Fix memory fault linking non-PIC object in to shared libraryFaraz Shahbazker8-0/+68
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer checks. Search the RELA table for n64 relocations. ld/ * testsuite/ld-mips-elf/pic-reloc-5.d: New test. * testsuite/ld-mips-elf/pic-reloc-6.d: New test. * testsuite/ld-mips-elf/pic-reloc-7.d: New test. * testsuite/ld-mips-elf/pic-reloc-5.s: New test source. * testsuite/ld-mips-elf/pic-reloc-6.s: New test source. * testsuite/ld-mips-elf/pic-reloc-7.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21[MIPS] Add generation of PLT entries with compact jumps for MIPS R6Matthew Fortune11-2/+236
Add a new option to get the linker to emit PLTs that use compact branches instead of delay slot branches. bfd/ * elfxx-mips.c (LA25_BC): New macro. (mips_elf_link_hash_table)<compact_branches>: New field. (STUB_JALRC): New macro. (mipsr6_o32_exec_plt0_entry_compact): New array. (mipsr6_n32_exec_plt0_entry_compact): Likewise. (mipsr6_n64_exec_plt0_entry_compact): Likewise. (mipsr6_exec_plt_entry_compact): Likewise. (mips_elf_create_la25_stub): Use BC instead of J for stubs when compact_branches is true. (_bfd_mips_elf_finish_dynamic_symbol): Choose the compact PLT for MIPSR6 with compact_branches. Do not reorder the compact branches PLT. Switch the lazy stub for MIPSR6 with compact_branches to use JALRC. (mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6 when compact_branches is true. (_bfd_mips_elf_compact_branches): New function. * elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype. ld/ * emultempl/mipself.em (compact_branches): New static variable. (mips_create_output_section_statements): Call _bfd_mips_elf_compact_branches. (PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and OPTION_NO_COMPACT_BRANCHES. (PARSE_AND_LIST_LONGOPTS): Add compact-branches, no-compact-branches. (PARSE_AND_LIST_OPTIONS): Add --compact-branches, --no-compact-branches. (PARSE_AND_LIST_ARGS_CASES): Handle the above. * ld.texinfo: Document --compact-branches, --no-compact-branches. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21[binutils][Arm] Fix Branch Future relocation handling and testismsAndre Vieira5-0/+54
bfd/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> PR/target 24460 * elf32-arm.c (get_value_helper): Remove. (elf32_arm_final_link_relocate): Fix branch future relocations. gas/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming conventions. * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise. * testsuite/gas/arm/armv8_1-m-loloop.d: Likewise. * testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bf-rela.d: New test. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test. ld/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/arm-elf.exp: Add tests * testsuite/ld-arm/bfs-0.s: New test. * testsuite/ld-arm/bfs-1.s: New test. * testsuite/ld-arm/branch-futures.d: New test.
2019-05-21AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)Tamar Christina12-4/+178
The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21Fix PR 24571 - Relaxation does not shorten jmp or call to target at ↵Senthil Kumar Selvaraj3-0/+34
pc-relative range boundary The range check done to transform an absolute call/jump to a pc-relative one is off-by-one, and that causes this shortening optimization to be missed if the branch target is right at the range boundary. In the non-shrinkable case, the range is what is mentioned in the ISA - -4094 bytes in the backward direction, and 4096 bytes in the positive direction. In the shrinkable case, the forward jump range increases by two bytes (deleted because of the shortening from call/jmp to rcall/rjmp), and therefore, the range is -4094 in the reverse, and 4098 in the positive direction. Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to ensure jumps to max forward and backward ranges get relaxed to rjmp.
2019-05-21Fix PR 24564 - link fails for some rcalls/rjmps with wraparoundSenthil Kumar Selvaraj3-0/+29
The current code to compute relative distance in the wrap around case does not handle the edge case of the target (after adjusting for implicit PC increment) being exactly half of the wrap around distance. This patch fixes that and adds a testcase. The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes for the implicit PC increment)). If the target of the jump is at a distance of 4098 bytes, it is out of range for a forward jump - however, a backward jump can still reach that address if pmem-wrap-around is 8192. Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and *without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will jump to address 4096 (wrap around at 8192 and decreasing addresses from then on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098. avr_relative_distance_considering_wrap_around though, does the wrap around only if the passed in distance is less than half of the wrap around distance. In this case, it is exactly equal to half (original distance 4098, adjusted distance of 4096 and wraparound of 8192), and the bypassed wrap around causes the reloc overflow error. Fix by wrapping around even if adjusted distance is equal to half of wrap around distance.
2019-05-20[MIPS] PR gas/14798: Limit IRIX5 specific default typing to IRIX targetsFaraz Shahbazker3-4/+11
On IRIX 5, every global symbol that is not explicitly labelled as being a function is assumed to be an object. There is no reason why IRIX behaviour should extend to all MIPS targets, so limit this to only IRIX targets. gas/ PR 14798 * config/tc-mips.c (s_mips_globl): Only treat symbols that are not explicitly labelled as BSF_OBJECTs for IRIX targets. * testsuite/gas/mips/pr14798.s: New test source. * testsuite/gas/mips/pr14798-irix.d: New test. * testsuite/gas/mips/pr14798.d: Likewise. * testsuite/gas/mips/mips.exp: Run the new tests. binutils/ PR 14798 * testsuite/binutils-all/readelf.ss-mips: Update reference output. * testsuite/binutils-all/readelf.ss-tmips: Likewise. ld/ PR 14798 * testsuite/ld-mips-elf/reloc-6a.s: Specify .text section for global code symbols. * testsuite/ld-mips-elf/reloc-6b.s: Likewise.
2019-05-17PR24567, assertion failure in ldlang.c:6868 when compiling with -fltoAlan Modra2-18/+30
As the existing comment said: "a common ought to be overridden by a def in a -flto object". This patch makes the code actually do that, rather than allowing a normal object file common to override a -flto defined symbol. PR 24567 * plugin.c (plugin_notice): Do not let a common symbol override a non-common definition in IR.
2019-05-09Use the correct names for the init and fini array start symbols in the ↵Dimitar Dimitrov2-2/+7
default Pru linker script. * scripttempl/pru.sc (__init_array_begin, __init_array_begin): Rename.
2019-05-08Fix compile time warning when building the linker in a MinGw32 environment ↵Pekka Sepp?nen2-1/+7
using gcc 8. PR 24536 * ldbuildid.c (generate_build_id): Cast return value from GetProcAddress in order to avoid a compile time warning.
2019-05-06PicoJava weak undefined symbolsAlan Modra2-1/+4
This fixes the recently added ld-elf/pr24511 test failure on pj-elf. Incidentally, pj-elf has failed its gas "pj" test since 2005-12-22 (git commit 54758c3e39). I think that makes the target ripe for obsolescence. bfd/ * elf32-pj.c (pj_elf_reloc): Don't report undefined weak as an error. ld/ * testsuite/ld-undefined/weak-undef.exp: Don't xfail pj.
2019-05-04m32c padding with nopsAlan Modra3-4/+7
m32c_md_end attempted to pad out a code section with nops, but this was just plain wrong in many ways: - The padding didn't happen at all if the last section emitted wasn't a code section. - The padding went to the wrong place if subsections were used, and the last subseg used wasn't the highest numbered subseg. - Padding wasn't added to all code sections. - If the last section was empty, it was padded to 4 bytes. - The padding didn't go to a 4-byte alignment boundary, instead it effectively made the last instruction 4 bytes in size. - The padding didn't take into account that code sections may have contents other than machine instructions. So, rip it out and handle nop padding properly, also fixing .align .balign/.p2align in the middle of code. gas/ * config/tc-m32c.c (insn_size): Delete static var. (md_begin): Don't set it. (m32c_md_end): Delete. (md_assemble): Add insn_size auto var. * config/tc-m32c.h (md_end): Don't define. (m32c_md_end): Delete. (NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define. * testsuite/gas/all/align.d: Remove m32c from notarget list. * testsuite/gas/all/incbin.d: Likewise. * testsuite/gas/elf/dwarf2-11.d: Likewise. * testsuite/gas/macros/semi.d: Likewise. * testsuite/gas/all/gas.exp (do_comment): Similarly. ld/ * testsuite/ld-scripts/fill.d: Don't xfail m32c * testsuite/ld-scripts/fill16.d: Likewise.
2019-05-04PR24511, nm should not mark symbols in .init_array as "t"Alan Modra7-12/+60
This patch restricts the section names matched in coff_section_type, a function that translates section names to symbol type, and arranges to translate section flags to symbol type before looking at names. The latter change resulted in various test failures due to improper section flags being used in tests, and by the plugin support, so fix that too. The new test fails on many ELF targets that lack .init/fini_array in their scripts. I've just xfailed those. pru-elf oddly defines __init_array_begin rather than __init_array_start. I've left that target as a FAIL, and pj-elf too which reports an error for undefined weak symbols. bfd/ PR 24511 * syms.c (coff_section_type): Only allow '.', '$' and numeric following the standard section names. (bfd_decode_symclass): Prioritize section flag tests in decode_section_type before name tests in coff_section_type. * plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section and fake_common_section using BFD_FAKE_SECTION. Use "fake" as their names and choose standard .text section flags for fake_section. ld/ PR 24511 * testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a data section on hppa64. * testsuite/ld-elf/pr14156b.d: Likewise. * testsuite/ld-scripts/pr18963.t: Map standard sections to set output section flags. * testsuite/ld-scripts/sane1.t: Likewise. * testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start and __fini_array_start. Define __start et al. * testsuite/ld-elf/pr24511.d: New test.
2019-04-30PowerPC64 GOT indirect to GOT relative optimisationAlan Modra11-37/+47
This implements an optimisation that converts sequences like addis r9,r2,sym@got@ha ld r3,sym@got@l(r9) to addis r9,r2,sym@toc@ha addi r3,r9,sym@toc@l when "sym" is locally defined and can't be overridden. bfd/ * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add has_gotrel. (struct _ppc64_elf_section_data): Likewise. (ppc64_elf_check_relocs): Set above fields. (ppc64_elf_edit_toc): Add a pass over GOT relocs. (ppc64_elf_relocate_section): Edit GOT indirect to GOT relative when possible. ld/ * testsuite/ld-powerpc/elfv2exe.d: Update. * testsuite/ld-powerpc/elfv2so.d: Update. * testsuite/ld-powerpc/tocopt.d: Update. * testsuite/ld-powerpc/tocopt.s: Update. * testsuite/ld-powerpc/tocopt5.d: Update. * testsuite/ld-powerpc/tocopt5.s: Update. * testsuite/ld-powerpc/tocopt7.d: Update. * testsuite/ld-powerpc/tocopt7.s: Update. * testsuite/ld-powerpc/tocopt8.d: Update. * testsuite/ld-powerpc/tocopt8.s: Update.
2019-04-30ld.texi tweak for pod2manAlan Modra2-7/+13
Fixes the following error: ld.pod around line 568: Expected '=item *' POD document had syntax errors at /usr/bin/pod2man line 71. * ld.texi (How GNU properties are merged): Avoid pod2man error. Correct example.
2019-04-26Don't complain undefined weak dynamic referenceH.J. Lu5-0/+37
When undefined non-weak references in IR objects are optimized out by LTO, we can have weak dynamic referencs to symbols marked with bfd_link_hash_undefined. We shouldn't complain such undefined weak dynamic references. bfd/ PR ld/24486 * elflink.c (elf_link_output_extsym): Don't complain undefined weak dynamic reference. ld/ PR ld/24486 * testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests. * testsuite/ld-plugin/pr24486a.c: New file. * testsuite/ld-plugin/pr24486b.c: Likewise. * testsuite/ld-plugin/pr24486c.c: Likewise.
2019-04-26Updated Russian translation for the ld subdirectory.Nick Clifton2-1398/+6670
* po/ru.po: Updated Russian translation.
2019-04-26Fix the hyphenation of word phrases such as "target specific" and "machine ↵Christopher Yeleighton2-6/+10
specific". * ld.texi: Properly hyphenate the word "specific".
2019-04-25LTO: Properly handle wrapper symbols in IRH.J. Lu7-10/+89
When a wrapper symbol, __wrap_FOO, is defined in IR, its resolution should be LDPR_PREVAILING_DEF, not PREVAILING_DEF_IRONLY, since LTO doesn't know that __wrap_FOO provides definition of FOO. And resolution of FOO should be LDPR_RESOLVED_IR since it is resolved by __wrap_FOO in IR. PR ld/24406 * ld.texi: Remove LTO warning from --wrap. * plugin.c (get_symbols): Update resolution for wrapper and wrapped symbols. * testsuite/ld-plugin/lto.exp: Run ld/24406 tests. * testsuite/ld-plugin/pr24406-1.c: New file. * testsuite/ld-plugin/pr24406-2a.c: Likewise. * testsuite/ld-plugin/pr24406-2b.c: Likewise.
2019-04-25[BFD, AArch64] Improve bti/pac plts.Sudakshina Das8-13/+22
This patch aims to improve the definitions of BTI and PAC based PLTs. The following changes are made: * PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1]) are readonly so they cannot be corrupted at runtime. Thus both PAC plt0 and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0 instead, respectively. * We can remove the extra padding nops when we add the new bti instructions. BTI plt0 and BTI TLSDESC plt are updated. * For better performance PLTn could be padded to 24bytes. Both BTI pltn and PAC pltn are updated. *** bfd/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove. (PLT_BTI_TLSDESC_ENTRY_SIZE): Remove. (PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove. (PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update. (elfNN_aarch64_small_plt0_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_pac_entry): Remove. (elfNN_aarch64_small_plt0_bti_entry): Update. (elfNN_aarch64_small_plt_bti_entry): Update. (elfNN_aarch64_small_plt_pac_entry): Update. (elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update. (setup_plt_values): Setup new entries. (elfNN_aarch64_finish_dynamic_sections): Remove size change. (elfNN_aarch64_plt_sym_val): Likewise. *** ld/ChangeLog *** 2019-04-25 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/bti-pac-plt-1.d: Update. * testsuite/ld-aarch64/bti-pac-plt-2.d: Update. * testsuite/ld-aarch64/bti-plt-1.d: Update. * testsuite/ld-aarch64/bti-plt-3.d: Update. * testsuite/ld-aarch64/bti-plt-5.d: Update. * testsuite/ld-aarch64/pac-plt-1.d: Update. * testsuite/ld-aarch64/pac-plt-2.d: Update.
2019-04-24Use better test for usable compiler in ld testsuite.Sandra Loosemore41-55/+155
The ld testsuite includes numerous tests that depend on being able to compile and link programs with the C compiler. Some of these tests use [which $CC] to check for the presence of the compiler before proceeding with the test, but run_ld_link_exec_tests and run_cc_link_tests give ERRORs if compilation fails. Also, even if $CC is defined and present, it may not be usable due to missing libraries, etc. This patch adds a new procedure check_compiler_available that attempts to build an empty program and caches the result. Uses of [which $CC] are replaced with calls to this procedure, and run_ld_link_exec_tests and run_cc_link_tests now also guard attempts to use $CC. 2019-04-24 Sandra Loosemore <sandra@codesourcery.com> ld/ * testsuite/config/default.exp: Use [check_compiler_available] instead of [which $CC]. * testsuite/ld-auto-import/auto-import.exp: Likewise. * testsuite/ld-cygwin/exe-export.exp: Likewise. * testsuite/ld-elf/audit.exp: Likewise. * testsuite/ld-elf/compress.exp: Likewise. * testsuite/ld-elf/dwarf.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/indirect.exp: Likewise. * testsuite/ld-elf/linux-x86.exp: Likewise. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-elf/tls.exp: Likewise. * testsuite/ld-elf/wrap.exp: Likewise. * testsuite/ld-elfcomm/elfcomm.exp: Likewise. * testsuite/ld-elfvers/vers.exp: Likewise. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. * testsuite/ld-elfweak/elfweak.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-i386/no-plt.exp: Likewise. * testsuite/ld-i386/tls.exp: Likewise. * testsuite/ld-ifunc/ifunc.exp: Likewise. * testsuite/ld-mn10300/mn10300.exp: Likewise. * testsuite/ld-pe/pe-compile.exp: Likewise. * testsuite/ld-pe/pe-run.exp: Likewise. * testsuite/ld-pe/pe-run2.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-plugin/plugin.exp: Likewise. * testsuite/ld-scripts/crossref.exp: Likewise. * testsuite/ld-sh/sh.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. * testsuite/ld-srec/srec.exp: Likewise. * testsuite/ld-undefined/undefined.exp: Likewise. * testsuite/ld-unique/unique.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/no-plt.exp: Likewise. * testsuite/ld-x86-64/tls.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Call check_compiler_available before trying to use the compiler. (run_cc_link_tests): Likewise. (check_compiler_available): New. Use it instead of [which $CC].
2019-04-23Fix automatic makefile dependencies for generated ld/e*.cAlan Modra4-17/+36
Commit c40e31a121 broke --enable-dependency-tracking=no. * Makefile.am (GENDEPDIR): New var, used.. (GENSCRIPTS): ..here. * Makefile.in: Regenerate. * genscripts.sh: Test for $DEPDIR set before every use.
2019-04-22Fix M5100 flags test with interAptiv-MR2Matthew Fortune2-1/+7
ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Fix expected ASEs for M5100.
2019-04-19s12z and h8300 no-print-map-discarded failsAlan Modra3-2/+10
This tidies the remaining --no-print-map-discarded fails. h8300-elf warns on a section without flags, and s12z doesn't support --gc-sections. bfd/ * elf32-s12z.c (elf_backend_can_gc_sections): Don't define ld/ * testsuite/ld-gc/skip-map-discarded.s: Add section attributes. * testsuite/lib/ld-lib.exp (check_gc_sections_available): Add s12z to list of targets not supporting --gc-sections.
2019-04-17x86: Suggest -fPIE when not building shared objectH.J. Lu16-13/+47
When PIC is needed, linker should suggest -fPIE, instead of -fPIC, when not building shared object. bfd/ * elf64-x86-64.c (elf_x86_64_need_pic): Suggest -fPIE when not building shared object. * elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run pr18801a and pr18801b instead of pr18801. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/pr18801.d: Removed. * testsuite/ld-x86-64/pr18801.d: Likewise. * testsuite/ld-i386/pr18801a.d: New file. * testsuite/ld-i386/pr18801b.d: Likewise. * testsuite/ld-x86-64/pr18801a.d: Likewise. * testsuite/ld-x86-64/pr18801b.d: Likewise. * testsuite/ld-x86-64/pie2.d: Suggest -fPIE instead of -fPIC. * testsuite/ld-x86-64/pie2.d: Likewise. * testsuite/ld-x86-64/pr19719.d: Likewise. * testsuite/ld-x86-64/pr19807-2a.d: Likewise. * testsuite/ld-x86-64/pr19969.d: Likewise. * testsuite/ld-x86-64/pr21997-1a.err: Likewise. * testsuite/ld-x86-64/pr21997-1b.err: Likewise. * testsuite/ld-x86-64/pr22001-1a.err: Likewise. * testsuite/ld-x86-64/pr22001-1b.err: Likewise. * testsuite/ld-x86-64/pr22791-1.err: Likewise.
2019-04-17x86: Also check x86 linker_def for non-shared definitionH.J. Lu9-0/+83
Since elf_x86_linker_defined sets linker_def in elf_x86_link_hash_entry for linker defined symbols, SYMBOL_DEFINED_NON_SHARED_P should also check linker_def in elf_x86_link_hash_entry. bfd/ PR ld/24458 * elfxx-x86.h (SYMBOL_DEFINED_NON_SHARED_P): Also check x86 linker_def. ld/ PR ld/24458 * testsuite/ld-x86-64/x86-64.exp: Run PR ld/24458 tests. * testsuite/ld-x86-64/pr24458.s: New file. * testsuite/ld-x86-64/pr24458a-x32.d: Likewise. * testsuite/ld-x86-64/pr24458a.d: Likewise. * testsuite/ld-x86-64/pr24458b-x32.d: Likewise. * testsuite/ld-x86-64/pr24458b.d: Likewise. * testsuite/ld-x86-64/pr24458c-x32.d: Likewise. * testsuite/ld-x86-64/pr24458c.d: Likewise.
2019-04-17MSP430 Linker: Define __crt0_init_bss/__crt0_movedata symbols when .lower or ↵Jozef Lawrynowicz11-72/+253
.either prefixed sections are present. ld * config/tc-msp430.c (msp430_make_init_symbols): Define __crt0_init_bss symbol when .lower.bss or .either.bss sections exist. Define __crt0_movedata when .lower.data or .either.data sections exist. * testsuite/gas/msp430/either-data-bss-sym.d: New test. * testsuite/gas/msp430/low-data-bss-sym.d: New test. * testsuite/gas/msp430/either-data-bss-sym.s: New test source. * testsuite/gas/msp430/low-data-bss-sym.s: New test source. * testsuite/gas/msp430/msp430.exp: Run new tests. Enable large code model when running -mdata-region={upper,either} tests.
2019-04-16ns32k testsuite tidyAlan Modra4-5/+11
Some of these tests were excluded for ns32k-netbsd, exclude for all ns32k instead. binutils/ * testsuite/binutils-all/copy-2.d: Don't run for ns32k-*-*. * testsuite/binutils-all/copy-3.d: Likewise. gas/ * testsuite/gas/all/gas.exp: Remove ns32k xfails. * testsuite/gas/all/weakref1u.d: Don't run for ns32k-*-*. ld/ * testsuite/ld-scripts/pr20302.d: Don't run for ns32k-*-*. * testsuite/ld-scripts/section-match-1.d: Likewise. * testsuite/ld-undefined/require-defined.exp: Likewise.
2019-04-15Skip print-map-discarded test for non-ELF targetsFaraz Shahbazker2-1/+8
ld/ * testsuite/ld-gc/gc.exp: Skip print-map-discarded test for non-ELF targets.
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira4-0/+52
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum. ChangeLog entries are as follows: 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. (do_t_v8_1_branch): New switch case for bfcsel. (toU): Define. (insns): New instruction for bfcsel. (md_pcrel_from_section): New switch case for BFD_RELOC_THUMB_PCREL_BFCSEL. (md_appdy_fix): Likewise (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfcsel.s: New. * testsuite/ld-arm/bfcsel.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfcsel. (print_insn_thumb32): Edit the switch case for %Z.
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira4-0/+42
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFL instruction. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entrie for bfl. (do_t_v8_1_branch): New switch case for bfl. (insns): New instruction for bfl. * testsuite/gas/arm/armv8_1-m-bfl.d: New. * testsuite/gas/arm/armv8_1-m-bfl.s: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.s: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.d: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.l: New. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: New. * testsuite/gas/arm/armv8_1-m-bfl-rel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfl.s: New. * testsuite/ld-arm/bfl.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfl.
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira4-0/+43
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BF instruction. ChangeLog entries are as follows: *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entries for bf. (do_t_branch_future): New. (insns): New instruction for bf. * testsuite/gas/arm/armv8_1-m-bf.d: New. * testsuite/gas/arm/armv8_1-m-bf.s: New. * testsuite/gas/arm/armv8_1-m-bf-bad.s: New. * testsuite/gas/arm/armv8_1-m-bf-bad.l: New. * testsuite/gas/arm/armv8_1-m-bf-bad.d: New. * testsuite/gas/arm/armv8_1-m-bf-rel.d: New. * testsuite/gas/arm/armv8_1-m-bf-rel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bf.s: New. * testsuite/ld-arm/bf.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instructions for bf.
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira4-0/+22
The patch is straightforward, it does the following: - support the new Tag_CPU_arch build attribute value, ie.: + declare the new value + update all the asserts forcing logic to be reviewed for new architectures + create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and add mapping from Tag_CPU_arch to it + teach readelf about new Tag_CPU_arch value - declare armv8.1-m.main as a supported architecture value - define Armv8.1-M Mainline in terms of feature bits available - tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature bits available - update architecture-specific logic in gas and bfd guarded by the asserts mentioned above. - tests for all the above ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * archures.c (bfd_mach_arm_8_1M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline. * elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline and update assert. (using_thumb2): Likewise. (using_thumb2_bl): Update assert. (arch_has_arm_nop): Likewise. (bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline. (tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging. *** binutils/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline Tag_CPU_arch build attribute value. Reindent. (get_aeabi_cpu_arch_from_fset): Update assert. (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. *** include/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. (MAX_TAG_CPU_ARCH): Set value to above macro. * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. (ARM_AEXT_V8_1M_MAIN): Likewise. (ARM_AEXT2_V8_1M_MAIN): Likewise. (ARM_ARCH_V8_1M_MAIN): Likewise. *** ld/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * testsuite/ld-arm/attr-merge-13.attr: New test. * testsuite/ld-arm/attr-merge-13a.s: New test. * testsuite/ld-arm/attr-merge-13b.s: New test. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
2019-04-13Automatic makefile dependencies for generated ld/e*.cAlan Modra155-2808/+1050
This patch modifies genscripts.sh to emit dependency info along with the generated emulation e*.c files. This is done by a new source_sh function that records its arg to a file (.deps/e*.Tc), using the function whenever a shell script is sourced. Entries in the file are made unique and written to .deps/e*.Pc. These files are then included by the Makefile. * Makefile.am (GENSCRIPTS): Pass LIB_PATH as a parameter. Add DEPDIR parameter. (ELF_DEPS, ELF_GEN_DEPS, ELF_X86_DEPS): Delete. (ALL_EMULATION_SOURCES, ALL_64_EMULATION_SOURCES): Depend on $GEN_DEPENDS. (e*.c): Delete all dependencies, instead include dependencies from $DEPDIR/*.Pc. * Makefile.in: Regenerate. * configure.ac (source_sh): Define and use function. * configure: Regenerate. * emulparams/aarch64cloudabib.sh, * emulparams/aarch64elf32b.sh, * emulparams/aarch64elfb.sh, * emulparams/aarch64fbsdb.sh, * emulparams/aarch64linux32b.sh, * emulparams/aarch64linuxb.sh, * emulparams/arcelf.sh, * emulparams/arcelf_prof.sh, * emulparams/arclinux.sh, * emulparams/arclinux_nps.sh, * emulparams/arclinux_prof.sh, * emulparams/arcv2elf.sh, * emulparams/arcv2elfx.sh, * emulparams/armelf_fbsd.sh, * emulparams/armelf_linux_eabi.sh, * emulparams/armelf_linux_fdpiceabi.sh, * emulparams/armelf_nacl.sh, * emulparams/armelf_nbsd.sh, * emulparams/armelf_vxworks.sh, * emulparams/armelfb.sh, * emulparams/armelfb_fbsd.sh, * emulparams/armelfb_fuchsia.sh, * emulparams/armelfb_linux.sh, * emulparams/armelfb_linux_eabi.sh, * emulparams/armelfb_linux_fdpiceabi.sh, * emulparams/armelfb_nacl.sh, * emulparams/armelfb_nbsd.sh, * emulparams/armsymbian.sh, * emulparams/cskyelf_linux.sh, * emulparams/elf32_sparc_sol2.sh, * emulparams/elf32_sparc_vxworks.sh, * emulparams/elf32_tic6x_be.sh, * emulparams/elf32_tic6x_elf_be.sh, * emulparams/elf32_tic6x_elf_le.sh, * emulparams/elf32_tic6x_linux_be.sh, * emulparams/elf32_tic6x_linux_le.sh, * emulparams/elf32_x86_64.sh, * emulparams/elf32_x86_64_nacl.sh, * emulparams/elf32b4300.sh, * emulparams/elf32bfinfd.sh, * emulparams/elf32bmipn32.sh, * emulparams/elf32bsmip.sh, * emulparams/elf32btsmip.sh, * emulparams/elf32btsmip_fbsd.sh, * emulparams/elf32btsmipn32.sh, * emulparams/elf32btsmipn32_fbsd.sh, * emulparams/elf32ebmip.sh, * emulparams/elf32ebmipvxworks.sh, * emulparams/elf32elmip.sh, * emulparams/elf32elmipvxworks.sh, * emulparams/elf32frvfd.sh, * emulparams/elf32l4300.sh, * emulparams/elf32lm32fd.sh, * emulparams/elf32lmip.sh, * emulparams/elf32lppc.sh, * emulparams/elf32lppclinux.sh, * emulparams/elf32lppcnto.sh, * emulparams/elf32lppcsim.sh, * emulparams/elf32lr5900.sh, * emulparams/elf32lr5900n32.sh, * emulparams/elf32lriscv.sh, * emulparams/elf32lriscv_ilp32.sh, * emulparams/elf32lriscv_ilp32f.sh, * emulparams/elf32lsmip.sh, * emulparams/elf32ltsmip.sh, * emulparams/elf32ltsmip_fbsd.sh, * emulparams/elf32ltsmipn32.sh, * emulparams/elf32ltsmipn32_fbsd.sh, * emulparams/elf32microblazeel.sh, * emulparams/elf32or1k_linux.sh, * emulparams/elf32ppc.sh, * emulparams/elf32ppc_fbsd.sh, * emulparams/elf32ppccommon.sh, * emulparams/elf32ppclinux.sh, * emulparams/elf32ppcnto.sh, * emulparams/elf32ppcsim.sh, * emulparams/elf32ppcvxworks.sh, * emulparams/elf32ppcwindiss.sh, * emulparams/elf32tilegx_be.sh, * emulparams/elf64_ia64_fbsd.sh, * emulparams/elf64_sparc_fbsd.sh, * emulparams/elf64_sparc_sol2.sh, * emulparams/elf64alpha_fbsd.sh, * emulparams/elf64alpha_nbsd.sh, * emulparams/elf64bmip-defs.sh, * emulparams/elf64bmip.sh, * emulparams/elf64btsmip.sh, * emulparams/elf64btsmip_fbsd.sh, * emulparams/elf64lppc.sh, * emulparams/elf64lriscv-defs.sh, * emulparams/elf64lriscv.sh, * emulparams/elf64lriscv_lp64.sh, * emulparams/elf64lriscv_lp64f.sh, * emulparams/elf64ltsmip.sh, * emulparams/elf64ltsmip_fbsd.sh, * emulparams/elf64ppc.sh, * emulparams/elf64ppc_fbsd.sh, * emulparams/elf64rdos.sh, * emulparams/elf64tilegx_be.sh, * emulparams/elf_i386.sh, * emulparams/elf_i386_be.sh, * emulparams/elf_i386_fbsd.sh, * emulparams/elf_i386_ldso.sh, * emulparams/elf_i386_nacl.sh, * emulparams/elf_i386_sol2.sh, * emulparams/elf_i386_vxworks.sh, * emulparams/elf_iamcu.sh, * emulparams/elf_k1om.sh, * emulparams/elf_k1om_fbsd.sh, * emulparams/elf_l1om.sh, * emulparams/elf_l1om_fbsd.sh, * emulparams/elf_x86_64.sh, * emulparams/elf_x86_64_cloudabi.sh, * emulparams/elf_x86_64_fbsd.sh, * emulparams/elf_x86_64_nacl.sh, * emulparams/elf_x86_64_sol2.sh, * emulparams/h8300helf.sh, * emulparams/h8300helf_linux.sh, * emulparams/h8300hnelf.sh, * emulparams/h8300self.sh, * emulparams/h8300self_linux.sh, * emulparams/h8300snelf.sh, * emulparams/h8300sxelf.sh, * emulparams/h8300sxelf_linux.sh, * emulparams/h8300sxnelf.sh, * emulparams/hppanbsd.sh, * emulparams/hppaobsd.sh, * emulparams/m32rlelf.sh, * emulparams/m32rlelf_linux.sh, * emulparams/m68kelfnbsd.sh, * emulparams/mn10300.sh, * emulparams/msp430X.sh, * emulparams/nds32belf.sh, * emulparams/nds32belf16m.sh, * emulparams/nds32belf_linux.sh, * emulparams/pjlelf.sh, * emulparams/ppclynx.sh, * emulparams/score7_elf.sh, * emulparams/shelf_fd.sh, * emulparams/shelf_linux.sh, * emulparams/shelf_nbsd.sh, * emulparams/shelf_uclinux.sh, * emulparams/shelf_vxworks.sh, * emulparams/shl.sh, * emulparams/shlelf.sh, * emulparams/shlelf_fd.sh, * emulparams/shlelf_nbsd.sh, * emulparams/shlelf_vxworks.sh: Use source_sh. * genscripts.sh: Adjust for changed parameters. Emit dependencies for e*.c to .deps/*.Pc. (source_sh): New function, use it throughout to source scripts. * genscrba.sh (source_em): Use source_sh.
2019-04-13ld TDIRS substitutionAlan Modra5-62/+28
It is no longer true that autoconf/automake cannot substitute vars with embedded new-lines. * configure.ac (TDIRS): Build up tdirs in this variable and AC_SUBST, also using AM_SUBST_NOTMAKE. * configure: Regenerate. * Makefile.am (DISTCLEANFILES): Remove tdirs. * Makefile.in: Regenerate.
2019-04-12Fix thinko in linker documentation.Nick Clifton2-1/+7
PR 24450 * ld.texi (Output Section Attributes): Add ALIGN_WITH_INPUT to example of section attributes.
2019-04-11ld: Add --no-print-map-discarded optionFaraz Shahbazker12-12/+76
Add a new option to disable the listing of discarded sections in map file output. The use case stems from a large application built with -ffunction-sections --gc-sections where the list of discarded sections blows up the map file output. The default behaviour remains to print discarded sections, but the new option allows us to disable it. ld/ * NEWS: Mention new option --no-print-map-discarded. * ld.h (ld_config_type) <print_map_discarded>: New field. * ldlang.c (lang_map): Conditionally output discarded sections in map files based on configuration option. * ldlex.h (option_values) <OPTION_PRINT_MAP_DISCARDED, OPTION_NO_PRINT_MAP_DISCARDED>: New. * ldmain.c (main): Enabled print_map_discarded by default. * lexsup.c (ld_options): Add new command-line options. (parse_args) <OPTION_NO_PRINT_MAP_DISCARDED, OPTION_PRINT_MAP_DISCARDED>: New cases. * ld.texi: Document new options. * testsuite/ld-gc/gc.exp: Add new test. * testsuite/ld-gc/skip-map-discarded.s: New file. * testsuite/ld-gc/skip-map-discarded.d: New file. * testsuite/ld-gc/skip-map-discarded.map: New file.
2019-04-11x86: Add -z cet-report=[none|warning|error]H.J. Lu36-0/+355
Add -z cet-report=[none|warning|error] to report the missing Intel Indirect Branch Tracking (IBT) and Shadow Stack (SHSTK) properties in input .note.gnu.property section. -z cet-report=none, which is the default, will make the linker not report missing properties in input files. -z cet-report=warning will make the linker issue a warning for missing properties in input files. -z cet-report=error will make the linker issue an error for missing properties in input files. Note that -z ibt will turn off the missing IBT property report and -z shstk will turn off the missing SHSTK property report. Supported for Linux/i386 and Linux/x86_64. bfd/ * elf-linker-x86.h (elf_x86_cet_report): New. (elf_linker_x86_params): Add cet_report. * elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Report missing IBT and SHSTK properties if needed. ld/ * ld.texi: Document -z cet-report=[none|warning|error]. * emulparams/cet.sh: Add -z cet-report=[none|warning|error]. * testsuite/ld-i386/i386.exp: Run -z cet-report=[warning|error] tests. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/property-x86-cet1.d: New file. * testsuite/ld-i386/property-x86-cet2a.d: Likewise. * testsuite/ld-i386/property-x86-cet2b.d: Likewise. * testsuite/ld-i386/property-x86-cet3a.d: Likewise. * testsuite/ld-i386/property-x86-cet3b.d: Likewise. * testsuite/ld-i386/property-x86-cet4a.d: Likewise. * testsuite/ld-i386/property-x86-cet4b.d: Likewise. * testsuite/ld-i386/property-x86-cet5a.d: Likewise. * testsuite/ld-i386/property-x86-cet5b.d: Likewise. * testsuite/ld-i386/property-x86-cet6.d: Likewise. * testsuite/ld-x86-64/property-x86-cet.s: Likewise. * testsuite/ld-x86-64/property-x86-cet1-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet1.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2b.d: Likewise. * testsuite/ld-x86-64/property-x86-cet3a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet3a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet3b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet3b.d: Likewise. * testsuite/ld-x86-64/property-x86-cet4a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet4a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet4b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet4b.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5b.d: Likewise. * testsuite/ld-x86-64/property-x86-cet6-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet6.d: Likewise.
2019-04-11ld: Add -static-pie testsH.J. Lu4-1/+110
Add -static-pie tests for DT_INIT_ARRAY, DT_FINI_ARRAY, DT_PREINIT_ARRAY and IFUNC. * testsuite/config/default.exp (STATIC_PIE_LDFLAGS): New. Set to "-static-pie" if target compiler supports it. * testsuite/ld-elf/elf.exp: Run -static-pie tests if $STATIC_PIE_LDFLAGS isn't empty. * testsuite/ld-ifunc/ifunc.exp: Likewise.
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