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2020-01-20Updated translations for various binutils sub-directoriesNick Clifton3-7969/+4536
2020-01-20x86-64: Fix TLSDESC relaxation for x32H.J. Lu17-0/+466
For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix even if it isn't required. Otherwise linker can’t safely perform GDesc -> IE/LE optimization. X32 TLSDESC sequences can be: 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg ... 67 ff 10 call *x@TLSCALL(%eax) or the same sequence as LP64: 48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg ... ff 10 call *foo@TLSCALL(%rax) We need to support both sequences for x32. For both GDesc -> IE/LE transitions, 67 ff 10 call *x@TLSCALL(%eax) should relaxed to 0f 1f 00 nopl (%rax) For GDesc -> LE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg For GDesc -> IE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax bfd/ PR ld/25416 * elf64-x86-64.c (elf_x86_64_check_tls_transition): Support "rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in X32 mode. (elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl x@gottpoff(%rip), %eax". For both transitions, relax "call *(%eax)" to "nopl (%rax)". gas/ PR ld/25416 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating x32 object. * testsuite/gas/i386/ilp32/x32-tls.d: Updated. * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with R_X86_64_GOTPC32_TLSDESC relocation. ld/ PR ld/25416 * testsuite/ld-x86-64/pr25416-1.s: New file * testsuite/ld-x86-64/pr25416-1a.d: Likewise. * testsuite/ld-x86-64/pr25416-1b.d: Likewise. * testsuite/ld-x86-64/pr25416-1.s: Likewise. * testsuite/ld-x86-64/pr25416-2.s: Likewise. * testsuite/ld-x86-64/pr25416-2a.d: Likewise. * testsuite/ld-x86-64/pr25416-2b.d: Likewise. * testsuite/ld-x86-64/pr25416-3.d: Likewise. * testsuite/ld-x86-64/pr25416-3.s: Likewise. * testsuite/ld-x86-64/pr25416-4.d: Likewise. * testsuite/ld-x86-64/pr25416-4.s: Likewise. * testsuite/ld-x86-64/pr25416-5a.c: Likewise. * testsuite/ld-x86-64/pr25416-5b.s: Likewise. * testsuite/ld-x86-64/pr25416-5c.s: Likewise. * testsuite/ld-x86-64/pr25416-5d.s: Likewise. * testsuite/ld-x86-64/pr25416-5e.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20Don't touch r11 in __tls_get_addr stubAlan Modra6-33/+41
This modifies the special __tls_get_addr stub that checks for a tlsdesc style __tls_index entry and returns early. Not using r11 isn't much benefit at the moment but a followup patch will preserve regs around the first call to __tls_get_addr when the __tls_index entry isn't yet set up for an early return. bfd/ * elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1), (MTLR_R11): Don't define. (LD_R0_0R3, CMPDI_R0_0): Define. (build_tls_get_addr_stub): Don't use r11 in stub. ld/ * testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub. * testsuite/ld-powerpc/tlsexeno.d: Likewise. * testsuite/ld-powerpc/tlsexetoc.d: Likewise. * testsuite/ld-powerpc/tlsexetocno.d: Likewise. * testsuite/ld-powerpc/tlsopt5.d: Likewise.
2020-01-18Fix ld-x86-64/align-branch-1 test failure on --target=x86_64-elfRoland McGrath2-3/+9
ld/ChangeLog * testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps to admit whatever absolute address. The label-relative address is what the test needs to verify.
2020-01-18Update version to 2.34.50. Regenerate configure and .pot files.Nick Clifton3-265/+270
2020-01-18Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2-0/+6
2020-01-16MSP430: Remove unused linker script template elf32msp430_3.scJozef Lawrynowicz2-224/+4
ld/ChangeLog: 2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com> * scripttempl/elf32msp430_3.sc: Remove.
2020-01-16MSP430: Add input section rules for .upper sections to default linker scriptJozef Lawrynowicz4-0/+50
ld/ChangeLog: 2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com> * scripttempl/elf32msp430.sc: Add input section rules for .upper.{text,data,rodata,bss}. * testsuite/ld-msp430-elf/msp430-elf.exp: Run new test. * testsuite/ld-msp430-elf/upper-input-sections.s: New test.
2020-01-15Set the default page size of the PDP11 target to 8192 bytes.Lars Brinkhoff2-1/+6
PR 20694 bfd * pdp11.c (TARGET_PAGE_SIZE): Set to 8192. ld * temulparams/pdp11.sh (TARGET_PAGE_SIZE): Set to 8192.
2020-01-15MSP430: Fix relocation overflow when using #lo(EXP) macroJozef Lawrynowicz3-0/+29
gas/ChangeLog: 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X relocations when the target is 430X, except when extracting part of an expression. (msp430_srcoperand): Adjust comment. Initialize the expp member of the msp430_operand_s struct as appropriate. (msp430_dstoperand): Likewise. * testsuite/gas/msp430/msp430.exp: Run new test. * testsuite/gas/msp430/reloc-lo-430x.d: New test. * testsuite/gas/msp430/reloc-lo-430x.s: New test. include/ChangeLog: 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> * opcode/msp430.h (enum msp430_expp_e): New. (struct msp430_operand_s): Add expp member to struct. ld/ChangeLog: 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com> * testsuite/ld-msp430-elf/msp430-elf.exp: Run new test. * testsuite/ld-msp430-elf/reloc-lo-430x.s: New test.
2020-01-15PR25384, PowerPC64 ELFv1 copy relocs against function symbolsAlan Modra5-8/+20
Function symbols of course don't normally want .dynbss copies but with some old versions of gcc they are needed to copy the function descriptor. This patch restricts the cases where they are useful to compilers using dot-symbols, and enables the warning regardless of whether a PLT entry is emitted in the executable. PLTs in shared libraries are affected by a .dynbss copy in the executable. bfd/ PR 25384 * elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment. (ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies of function symbols unless dot symbols are present. Do warn whenever one is created, regardles of whether a PLT entry is also emitted for the function symbol. ld/ * testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output. * testsuite/ld-powerpc/funref.s: Align func_tab. * testsuite/ld-powerpc/funref2.s: Likewise. * testsuite/ld-powerpc/funv1.s: Add dot symbols.
2020-01-14x86: Updated align branch tests for Darwin and i686-pc-elfLili Cui2-4/+8
1. Update align branch assembler tests to match Darwin disassembler outputs. 2. Skip unsupported "call *foo" tests in 64-bit mode on Darwin. 3. Update align branch linker test to match any addresses for i686-pc-elf. gas/ * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin. * testsuite/gas/i386/align-branch-1b.d: Likewise. * testsuite/gas/i386/align-branch-1c.d: Likewise. * testsuite/gas/i386/align-branch-1d.d: Likewise. * testsuite/gas/i386/align-branch-1e.d: Likewise. * testsuite/gas/i386/align-branch-1f.d: Likewise. * testsuite/gas/i386/align-branch-1g.d: Likewise. * testsuite/gas/i386/align-branch-1h.d: Likewise. * testsuite/gas/i386/align-branch-1i.d: Likewise. * testsuite/gas/i386/align-branch-5.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise. * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a, x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin. ld/ * testsuite/ld-i386/align-branch-1.d: Updated for i686-pc-elf.
2020-01-13Regen ld BLD-POTFILES.inAlan Modra2-2/+4
* po/BLD-POTFILES.in: Regenerate.
2020-01-13[ARC][committed] Update test matching pattern.Claudiu Zissulescu2-4/+8
xxxx-xx-xx Claudiu Zissulescu <claziss@gmail.com> * testsuite/ld-arc/relax-local-pic.d: Improve matching patterns.
2020-01-13[ARC][committed] Code cleanup and improvements.Claudiu Zissulescu6-65/+11
Code clean up and improvements when changing the cpu from command line. Also, remove unused/old emulations. gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change the CPU. * config/tc-arc.h: Add header if/defs. * testsuite/gas/arc/pseudos.d: Improve matching pattern. ls/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * Makefile.am: Remove earcelf_prof.c and earclinux_prof.c emulations. * Makefile.in: Regenerate. * configure.tgt: Likewise. * emulparams/arcelf_prof.sh: Remove file. * emulparams/arclinux_prof.sh: Likewise. opcodes/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (C_NE): Make it required.
2020-01-13[ARC][committed] Use DWARF.sc in elf linker script templates.Claudiu Zissulescu3-98/+70
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * elfarcv2.sc : Allow interrupt vector table to be located at an arbitrary address. Use DWARF.sc file. * elfarc.sc: Use DWARF.sc file.
2020-01-07Re: Prefer object over notype symbols when disassemblingAlan Modra21-35/+26
Reverts unnecessary mips testsuite changes made by commit 660df28acf. * testsuite/ld-mips-elf/eh-frame5.s, * testsuite/ld-mips-elf/ehdr_start-new.s, * testsuite/ld-mips-elf/ehdr_start-o32.s, * testsuite/ld-mips-elf/mips16-call-global-1.s, * testsuite/ld-mips-elf/mips16-intermix-1.s, * testsuite/ld-mips-elf/mips16-pic-1b.s, * testsuite/ld-mips-elf/mips16-pic-4c.s, * testsuite/ld-mips-elf/no-shared-1-n64.s, * testsuite/ld-mips-elf/no-shared-1-o32.s, * testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s, * testsuite/ld-mips-elf/pic-and-nonpic-1b.s, * testsuite/ld-mips-elf/pic-and-nonpic-2a.s, * testsuite/ld-mips-elf/pic-and-nonpic-3b.s, * testsuite/ld-mips-elf/pic-and-nonpic-4b.s, * testsuite/ld-mips-elf/pic-and-nonpic-5a.s, * testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s, * testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s, * testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s, * testsuite/ld-mips-elf/pie.s, * testsuite/ld-mips-elf/relax-jalr.s: Revert 2019-12-17 change.
2020-01-06Add -fcommon compiler command line option to linker tests that need common ↵Nick Clifton3-16/+23
symbols. PR 25327 * testsuite/ld-elf/shared.exp: Add -fcommon option to compiler command line when building libcomm1.o and pr13250 tests. * testsuite/ld-plugin/lto.exp: Likewise for pr20267 tests.
2020-01-06Fix test of the fix for PR19579 when compiling with gcc-10.Nick Clifton2-3/+9
PR 25326 * testsuite/ld-elf/shared.exp: Add -fcommon option to compiler command line when building pr19579 binaries.
2020-01-03For PE format files, the base relocation table is necessary if the image is ↵Hannes Domani8-24/+52
loaded at a different image base than specified in the PE header. This patch provides a new option --enable-reloc-section to force the generation of this section. * emultempl/pe.em: Add new option --enable-reloc-section. * emultempl/pep.em: Likewise. * ld.texi: Document --enable-reloc-section. * pe-dll.c (pe_dll_build_sections): Use pe_dll_enable_reloc_section. (pe_dll_fill_sections): Simplify by calling pe_exe_fill_sections. * pe-dll.h: Add extern declaration of option flag. * pep-dll.c (pe_dll_enable_reloc_section): Add alias define for pep_dll_enable_reloc_section. * pep-dll.h: Add extern declaration of option flag.
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. ↵Sergey Belyashov36-3899/+3188
Add an ELF based target for these as well. PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
2020-01-02AArch64: Set the correct ELF class for AArch64 stubs (PR/25210)Tamar Christina4-1/+65
This fixes PR 25210 by specifying the the correct ELF class for AArch64 stubs. After doing this the stub section starts behaving like a normal object file loaded from disk. That is SEC_LINKER_CREATED causes us to have to write the section manually. This flag was added as a fix for PR 24753. I believe that fix to still be correct as linker created sections don't have a size on disk and it fixes the Arm bootstrap regression. But in this case specifying the correct section class also makes the stub section not be considered by compress.c. So I'm partially revert this change so that we don't have to manage the section manually as implied by SEC_LINKER_CREATED. bfd/ChangeLog: PR 25210 PR 24753 * elfnn-aarch64.c (_bfd_aarch64_create_stub_section): Set ELF class. ld/ChangeLog: PR 25210 PR 24753 * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Remove SEC_LINKER_CREATED. * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419. * testsuite/ld-aarch64/erratum835769-843419.d: New test.
2020-01-01Re: Update year range in copyright notice of binutils filesAlan Modra1-0/+4
Add the ChangeLog entry.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra334-396/+396
2020-01-01ChangeLog rotationAlan Modra2-2892/+2906
2019-12-26Avoid ubsan bug complaining about &p->fieldAlan Modra9-25/+44
I reckon it's quite OK to write &p->field in C when p might be NULL, and lots of old C programmers probably agree with me. However, ubsan disagrees and so do some people I respect. I suspect C++ influence is to blame for the ubsan behaviour. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92634. So far no one has educated me as to why I'm wrong to claim that there isn't anything in the C standard to say that p->field is always (*p).field. Note 79 doesn't quite do that because it doesn't cover null pointers. If there was such an equivalence then you could claim &p->field has a null pointer reference when p is NULL, even though no C compiler would ever dereference p. Anyway, to silence ubsan I'm going to apply the following though I prefer to avoid casts when possible. And I'm using (void *) deliberately because this is C, not C++! * ldlang.c (lang_output_section_find_by_flags): Don't use &p->field when p might be NULL. * ldelf.c (output_rel_find, ldelf_place_orphan): Likewise. (insert_os_after, lang_insert_orphan, lookup_name): Likewise. (strip_excluded_output_sections, lang_clear_os_map): Likewise. (lang_check, lang_for_each_input_file): Likewise. (lang_reset_memory_regions, find_replacements_insert_point): Likewise. (find_rescan_insertion, lang_propagate_lma_regions): Likewise. (lang_record_phdrs): Likewise. * emultempl/alphaelf.em (alpha_after_open): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise. * emultempl/ppc32elf.em (ppc_after_check_relocs): Likewise. * emultempl/spuelf.em (spu_before_allocation): Likewise. (embedded_spu_file): Likewise.
2019-12-19Re: Enable --build-id for moxie-elf-ldAlan Modra2-1/+4
* testsuite/lib/ld-lib.exp (uses_genelf): Remove moxie.
2019-12-182019-12-18 Anthony Green <green@moxielogic.com>Anthony Green3-3/+7
* emulparams/elf32moxie.sh (TEMPLATE_NAME): Switch to elf template to enable --build-id. * configure.tgt: Don't define targ_extra_ofiles for moxie-*-*.
2019-12-18ld signed overflow fixAlan Modra2-2/+6
* pe-dll.c (pe_get32, pe_as32): Avoid signed overflow.
2019-12-17Prefer object over notype symbols when disassemblingAlan Modra41-25/+117
Changing objdump disassembly output like this always requires some testsuite changes, with the avr and x64_64 changes simply due to picking up better symbols, the whole point of the patch. The mips changes are due to mips-sgi-irix changing STT_NOTYPE symbols to STT_OBJECT, which objdump now chooses in preference to script symbols. The problem is that objdump looks at the first symbol in the section being disassembled, and if object type, just dumps out bytes rather than disassembling. This results in new failures: FAIL: JAL overflow 2 FAIL: undefined weak symbol overflow FAIL: undefined weak symbol overflow (n32) FAIL: undefined weak symbol overflow (n64) So for mips-sgi-irix function symbols really do need to be function type. I fixed a few more than just the required minimum to avoid the above test fails. binutils/ * objdump.c (compare_section): New static var. (compare_symbols): Sort by current section only. Don't access symbol name out of bounds when checking for file symbols. Sort section symbols and object symbols. (find_symbol_for_address): Remove bogus debugging and section symbol test. (disassemble_data): Move symbol sort from here.. (disassemble_section): ..to here. Set compare_section. ld/ * testsuite/ld-avr/lds-mega.d: Adjust symbols to suit objdump change. * testsuite/ld-avr/lds-tiny.d: Likewise. * testsuite/ld-x86-64/load2.d: Likewise. * testsuite/ld-mips-elf/compact-eh1.s: Give function symbols function type. * testsuite/ld-mips-elf/compact-eh1a.s: Likewise. * testsuite/ld-mips-elf/compact-eh1b.s: Likewise. * testsuite/ld-mips-elf/compact-eh2.s: Likewise. * testsuite/ld-mips-elf/compact-eh3.s: Likewise. * testsuite/ld-mips-elf/compact-eh3a.s: Likewise. * testsuite/ld-mips-elf/eh-frame5.s: Likewise. * testsuite/ld-mips-elf/ehdr_start-new.s: Likewise. * testsuite/ld-mips-elf/ehdr_start-o32.s: Likewise. * testsuite/ld-mips-elf/emit-relocs-1a.s: Likewise. * testsuite/ld-mips-elf/jaloverflow-2.s: Likewise. * testsuite/ld-mips-elf/jaloverflow.s: Likewise. * testsuite/ld-mips-elf/mips16-call-global-1.s: Likewise. * testsuite/ld-mips-elf/mips16-intermix-1.s: Likewise. * testsuite/ld-mips-elf/mips16-pic-1b.s: Likewise. * testsuite/ld-mips-elf/mips16-pic-4c.s: Likewise. * testsuite/ld-mips-elf/no-shared-1-n64.s: Likewise. * testsuite/ld-mips-elf/no-shared-1-o32.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-1b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-2a.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-3b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-4b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-5a.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s: Likewise. * testsuite/ld-mips-elf/pie.s: Likewise. * testsuite/ld-mips-elf/relax-jalr.s: Likewise. * testsuite/ld-mips-elf/reloc-1a.s: Likewise. * testsuite/ld-mips-elf/reloc-2a.s: Likewise. * testsuite/ld-mips-elf/reloc-4.s: Likewise. * testsuite/ld-mips-elf/reloc-5.s: Likewise. * testsuite/ld-mips-elf/reloc-6b.s: Likewise. * testsuite/ld-mips-elf/textrel-1.s: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.s: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.d: Adjust.
2019-12-17Accept mips-sgi-irix output in a few ld testsAlan Modra6-13/+26
mips-sgi-irix gas emits STT_OBJECT symbols where other assemblers would use STT_NOTYPE. See mips_frob_symbol in gas/config/tc-mips.c. Also, the section of some dynamic symbols is set to SHN_MIPS_TEXT or SHN_MIPS_DATA. See _bfd_mips_elf_finish_dynamic_symbol in bfd/elfxx-mips.c. These differences are visible in readelf output and cause some tests to fail for no other good reason. The patch fixes the following fails and removes an xfail. FAIL: ld-elf/pr23591 FAIL: PROVIDE_HIDDEN test (auxiliary shared object) FAIL: PR ld/21233 dynamic symbols with section GC (auxiliary shared library) * testsuite/ld-elf/pr21233-l.sd: Accept OBJECT for type and PRC for section of symbols. * testsuite/ld-elf/pr23591.d: Likewise. * testsuite/ld-elf/provide-hidden-s.nd: Likewise. * testsuite/ld-mips-elf/start.s: Make symbols function type. * testsuite/ld-mips-elf/hash2.d: Adjust. Don't xfail irix.
2019-12-17Remove tic80 supportAlan Modra7-145/+9
This is one way of fixing ubsan bug reports, just delete the code. The assembler support was removed back in 2005 along with other non-BFD assemblers, but somehow the remainder of the port stayed in. bfd/ * coff-tic80.c: Delete file. * cpu-tic80.c: Delete file. * archures.c: Remove tic80 support. * coffcode.h: Likewise. * coffswap.h: Likewise. * targets.c: Likewise. * config.bfd: Likewise. * configure.ac: Likewise. * Makefile.am: Likewise. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * po/SRC-POTFILES.in: Regenerate. binutils/ * testsuite/binutils-all/objcopy.exp: Remove tic80 support. * testsuite/binutils-all/objdump.exp: Likewise. gas/ * doc/as.texi: Remove mention of tic80. include/ * coff/tic80.h: Delete file. * opcode/tic80.h: Delete file. ld/ * emulparams/tic80coff.sh: Delete file. * scripttempl/tic80coff.sc: Delete file. * configure.tgt: Remove tic80 support. * Makefile.am: Likewise. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate. opcodes/ * tic80-dis.c: Delete file. * tic80-opc.c: Delete file. * disassemble.c: Remove tic80 support. * disassemble.h: Likewise. * Makefile.am: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate.
2019-12-12i386: Add tests for -malign-branch-boundary and -malign-branchH.J. Lu7-0/+93
Add tests for -malign-branch-boundary, -malign-branch and -mbranches-within-32B-boundaries. gas/ * testsuite/gas/i386/align-branch-1.s: New file. * testsuite/gas/i386/align-branch-1a.d: Likewise. * testsuite/gas/i386/align-branch-1b.d: Likewise. * testsuite/gas/i386/align-branch-1c.d: Likewise. * testsuite/gas/i386/align-branch-1d.d: Likewise. * testsuite/gas/i386/align-branch-1e.d: Likewise. * testsuite/gas/i386/align-branch-1f.d: Likewise. * testsuite/gas/i386/align-branch-1g.d: Likewise. * testsuite/gas/i386/align-branch-1h.d: Likewise. * testsuite/gas/i386/align-branch-2.s: Likewise. * testsuite/gas/i386/align-branch-2a.d: Likewise. * testsuite/gas/i386/align-branch-2b.d: Likewise. * testsuite/gas/i386/align-branch-2c.d: Likewise. * testsuite/gas/i386/align-branch-3.d: Likewise. * testsuite/gas/i386/align-branch-3.s: Likewise. * testsuite/gas/i386/align-branch-4.s: Likewise. * testsuite/gas/i386/align-branch-4a.d: Likewise. * testsuite/gas/i386/align-branch-4b.d: Likewise. * testsuite/gas/i386/align-branch-5.d: Likewise. * testsuite/gas/i386/align-branch-5.s: Likewise. * testsuite/gas/i386/align-branch-6.d: Likewise. * testsuite/gas/i386/align-branch-6.s: Likewise. * testsuite/gas/i386/align-branch-7.d: Likewise. * testsuite/gas/i386/align-branch-7.s: Likewise. * testsuite/gas/i386/align-branch-8.d: Likewise. * testsuite/gas/i386/align-branch-8.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-1.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-2.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-2a.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-2b.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-2c.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-3.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-3.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-4.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-4a.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-4b.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-6.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-7.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-7.s: Likewise. * testsuite/gas/i386/x86-64-align-branch-8.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-8.s: Likewise. * testsuite/gas/i386/i386.exp: Run new tests. ld/ * testsuite/ld-i386/align-branch-1.d: New file. * testsuite/ld-i386/align-branch-1.s: Likewise. * testsuite/ld-x86-64/align-branch-1.d: Likewise. * testsuite/ld-x86-64/align-branch-1.3: Likewise. * testsuite/ld-i386/i386.exp: Run the new test. * testsuite/ld-x86-64/x86-64.exp: Likewise.
2019-12-08Optional matching for run_dump_testAlan Modra3-9/+63
This adds an alternative to using #... in dump files, useful where we only want to allow specific extra output. DW_CFA_nop in CIEs and FDEs to pad out to required alignment (larger for 64-bit than 32-bit) is an example where these optional match patterns are useful. binutils/ * testsuite/lib/binutils-common.exp (regexp_diff): Support #?REGEXP. ld/ * testsuite/ld-elf/eh4.d: Match optional padding DW_CFA_nop in FDEs. * testsuite/ld-elf/eh5.d: Likewise, and extra CIEs emitted on embedded targets.
2019-12-06Re: Only give FDE encoding warnings if --eh-frame-hdr was specified.Alan Modra5-4/+11
For mips*-linux targets, fixes the following fails. FAIL: MIPS eh-frame 1, n32 FAIL: MIPS eh-frame 1, n64 FAIL: MIPS eh-frame 2, n32 FAIL: MIPS eh-frame 2, n64 * testsuite/ld-mips-elf/eh-frame1-n32.d: Pass --eh-frame-hdr to ld. * testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n32.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise.
2019-12-05Re: PR25244, --print-memory-usage, division by zero if MEMORY length is zeroAlan Modra2-1/+7
Do print the linefeed when length is zero. PR 25244 * ldlang.c (lang_print_memory_usage): Correct last patch.
2019-12-05PR25243, static linking with exceptions and iostream is broken on ARMAlan Modra7-52/+42
PR 25243 * emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Move definition of __exidx_start and __exidx_end into ARM.exidx. * emulparams/armelf_linux_eabi.sh (OTHER_READONLY_SECTIONS): Likewise. * emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS): Similarly. * emulparams/elf32_tic6x_le.sh (OTHER_READONLY_SECTIONS): Similarly. * emulparams/armelf_fuchsia.sh: Source armelf_linux_eabi.sh, just redefining TEXT_START_ADDR. * emulparams/armelf_linux_fdpiceabi.sh: Source armelf_linux_eabi.sh, adding to OTHER_READONLY_SECTIONS.
2019-12-05PR25244, --print-memory-usage, division by zero if MEMORY length is zeroAlan Modra2-4/+11
PR 25244 * ldlang.c (lang_print_memory_usage): Don't print percent used when length is zero.
2019-11-28gas/riscv: Produce version 3 DWARF CIE by defaultAndrew Burgess2-6/+10
The flag controlling the default DWARF CIE version to produce now starts with the value -1. This can be modified with the command line flag as before, but after command line flag processing, in md_after_parse_args targets can, if the global still has the value -1, override this value. This gives a target specific default. If a CIE version is not select either by command line flag, or a target specific default, then some new code in dwarf2_init now select a global default. This remains as version 1 to match previous behaviour. This RISC-V has a target specific default of version provided, this make the return column uleb128, which means we can use all DWARF registers include CSRs. I chose to switch to version 3 rather than version 4 as this is most similar to the global default (version 1). Switching to version 4 adds additional columns to the CIE header. gas/ChangeLog: * as.c (flag_dwarf_cie_version): Change initial value to -1, and update comment. * config/tc-riscv.c (riscv_after_parse_args): Set flag_dwarf_cie_version if it has not already been set. * dwarf2dbg.c (dwarf2_init): Initialise flag_dwarf_cie_version if needed. * testsuite/gas/riscv/default-cie-version.d: New file. * testsuite/gas/riscv/default-cie-version.s: New file. ld/ChangeLog: * testsuite/ld-elf/eh5.d: Accept version 3 DWARF CIE. Change-Id: Ibbfe8f0979fba480bf0a359978b09d2b3055555e
2019-11-26Introduce new .text.sorted.* sections.Martin Liska8-0/+19
gold/ChangeLog: 2019-11-26 Martin Liska <mliska@suse.cz> * layout.cc (Layout::special_ordering_of_input_section): Add ".text.sorted". * output.cc: Special case ".text.sorted". * testsuite/section_sorting_name.cc: Cover also .text.sorted subsections. * testsuite/section_sorting_name.sh: Likewise. ld/ChangeLog: 2019-11-26 Martin Liska <mliska@suse.cz> * scripttempl/arclinux.sc: Add .text.sorted.* which is sorted by default. * scripttempl/elf.sc: Likewise. * scripttempl/elf64bpf.sc: Likewise. * scripttempl/nds32elf.sc: Likewise. * testsuite/ld-arm/arm-no-rel-plt.ld: Expect .text.sorted.* in the default linker script. * testsuite/ld-arm/fdpic-main.ld: Likewise. * testsuite/ld-arm/fdpic-shared.ld: Likewise.
2019-11-25Pass section when available to bfd_octets_per_byteAlan Modra3-9/+16
and other tidies. I think it's better to default to passing the section to bfd_octets_per_byte, even in cases where we know it won't make a difference. A number of the coff reloc functions used bfd_octets_per_byte wrongly, not factoring it into the offset into the data buffer. As it happens, the targets using those files always had bfd_octets_per_byte equal to one, so there wasn't any detectable wrong behaviour. However, it is wrong in the source and might cause trouble for anyone creating a new target. Besides fixing that, the patch also defines OCTETS_PER_BYTE as one in target files where that is appropriate. bfd/ * archures.c (bfd_octets_per_byte): Tail call bfd_arch_mach_octets_per_byte. * coff-arm.c (OCTETS_PER_BYTE): Define. (coff_arm_reloc): Introduce new "octets" temp. Use OCTETS_PER_BYTE with section. Correct "addr". Remove ATTRIBUTE_UNUSED. * coff-i386.c (coff_i386_reloc): Similarly. * coff-mips.c (mips_reflo_reloc): Similarly. * coff-x86_64.c (coff_amd64_reloc): Similarly. * elf32-msp430.c (OCTETS_PER_BYTE): Define. (rl78_sym_diff_handler): Use OCTETS_PER_BYTE, with section. * elf32-nds32.c (nds32_elf_get_relocated_section_contents): Similarly. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Similarly. * elf32-pru.c (pru_elf32_do_ldi32_relocate): Similarly. * elf32-s12z.c (opru18_reloc): Similarly. * elf32-sh.c (sh_elf_reloc): Similarly. * elf32-spu.c (spu_elf_rel9): Similarly. * elf32-xtensa.c (bfd_elf_xtensa_reloc): Similarly. * elf64-ppc.c (ppc64_elf_ha_reloc, ppc64_elf_brtaken_reloc), (ppc64_elf_toc64_reloc): Similarly. * bfd.c (bfd_get_section_limit): Pass section to bfd_octets_per_byte. * cofflink.c (_bfd_coff_link_input_bfd), (_bfd_coff_reloc_link_order): Likewise. * elf.c (_bfd_elf_section_offset): Likewise. * elflink.c (resolve_section, bfd_elf_perform_complex_relocation), (elf_link_input_bfd, elf_reloc_link_order, elf_fixup_link_order), (bfd_elf_final_link): Likewise. * elf.c (_bfd_elf_make_section_from_shdr): Don't strncmp twice to set SEC_ELF_OCTETS. * reloc.c (bfd_perform_relocation): Tidy SEC_ELF_OCTETS special case. (bfd_install_relocation): Likewise. (_bfd_final_link_relocate): Don't recalculate octets. * syms.c (_bfd_stab_section_find_nearest_line): Introduc new "octets" temp. * bfd-in2.h: Regenerate. ld/ * ldexp.c (fold_name): Pass section to bfd_octets_per_byte. * ldlang.c (init_opb): Don't call bfd_arch_mach_octets_per_byte unnecessarily.
2019-11-25Introduce new section flag: SEC_ELF_OCTETSChristian Eggers3-7/+33
All symbols, sizes and relocations in this section are octets instead of bytes. Required for DWARF debug sections as DWARF information is organized in octets, not bytes. bfd/ * section.c (struct bfd_section): New flag SEC_ELF_OCTETS. * archures.c (bfd_octets_per_byte): New parameter sec. If section is not NULL and SEC_ELF_OCTETS is set, one octet es returned [ELF targets only]. * bfd.c (bfd_get_section_limit): Provide section parameter to bfd_octets_per_byte. * bfd-in2.h: regenerate. * binary.c (binary_set_section_contents): Move call to bfd_octets_per_byte into section loop. Provide section parameter to bfd_octets_per_byte. * coff-arm.c (coff_arm_reloc): Provide section parameter to bfd_octets_per_byte. * coff-i386.c (coff_i386_reloc): likewise. * coff-mips.c (mips_reflo_reloc): likewise. * coff-x86_64.c (coff_amd64_reloc): likewise. * cofflink.c (_bfd_coff_link_input_bfd): likewise. (_bfd_coff_reloc_link_order): likewise. * elf.c (_bfd_elf_section_offset): likewise. (_bfd_elf_make_section_from_shdr): likewise. Set SEC_ELF_OCTETS for sections with names .gnu.build.attributes, .debug*, .zdebug* and .note.gnu*. * elf32-msp430.c (rl78_sym_diff_handler): Provide section parameter to bfd_octets_per_byte. * elf32-nds.c (nds32_elf_get_relocated_section_contents): likewise. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): likewise. * elf32-pru.c (pru_elf32_do_ldi32_relocate): likewise. * elf32-s12z.c (opru18_reloc): likewise. * elf32-sh.c (sh_elf_reloc): likewise. * elf32-spu.c (spu_elf_rel9): likewise. * elf32-xtensa.c (bfd_elf_xtensa_reloc): likewise * elf64-ppc.c (ppc64_elf_brtaken_reloc): likewise. (ppc64_elf_addr16_ha_reloc): likewise. (ppc64_elf_toc64_reloc): likewise. * elflink.c (bfd_elf_final_link): likewise. (bfd_elf_perform_complex_relocation): likewise. (elf_fixup_link_order): likewise. (elf_link_input_bfd): likewise. (elf_link_sort_relocs): likewise. (elf_reloc_link_order): likewise. (resolve_section): likewise. * linker.c (_bfd_generic_reloc_link_order): likewise. (bfd_generic_define_common_symbol): likewise. (default_data_link_order): likewise. (default_indirect_link_order): likewise. * srec.c (srec_set_section_contents): likewise. (srec_write_section): likewise. * syms.c (_bfd_stab_section_find_nearest_line): likewise. * reloc.c (_bfd_final_link_relocate): likewise. (bfd_generic_get_relocated_section_contents): likewise. (bfd_install_relocation): likewise. For section which have SEC_ELF_OCTETS set, multiply output_base and output_offset with bfd_octets_per_byte. (bfd_perform_relocation): likewise. include/ * coff/ti.h (GET_SCNHDR_SIZE, PUT_SCNHDR_SIZE, GET_SCN_SCNLEN), (PUT_SCN_SCNLEN): Adjust bfd_octets_per_byte calls. binutils/ * objdump.c (disassemble_data): Provide section parameter to bfd_octets_per_byte. (dump_section): likewise (dump_section_header): likewise. Show SEC_ELF_OCTETS flag if set. gas/ * as.h: Define SEC_OCTETS as SEC_ELF_OCTETS if OBJ_ELF. * dwarf2dbg.c: (dwarf2_finish): Set section flag SEC_OCTETS for .debug_line, .debug_info, .debug_abbrev, .debug_aranges, .debug_str and .debug_ranges sections. * write.c (maybe_generate_build_notes): Set section flag SEC_OCTETS for .gnu.build.attributes section. * frags.c (frag_now_fix): Don't divide by OCTETS_PER_BYTE if SEC_OCTETS is set. * symbols.c (resolve_symbol_value): Likewise. ld/ * ldexp.c (fold_name): Provide section parameter to bfd_octets_per_byte. * ldlang (init_opb): New argument s. Set opb_shift to 0 if SEC_ELF_OCTETS for the current section is set. (print_input_section): Pass current section to init_opb. (print_data_statement,print_reloc_statement, print_padding_statement): Likewise. (lang_check_section_addresses): Call init_opb for each section. (lang_size_sections_1,lang_size_sections_1, lang_do_assignments_1): Likewise. (lang_process): Pass NULL to init_opb.
2019-11-22Update the linker documentation regarding the /DISCARD/ linker script ↵Nick Clifton2-0/+10
section and its interaction with ELF section groups. * ld.texi (Output Section Discarding): Add note indicating that /DISCARD/ed sections ignore ELF section grouping.
2019-11-22Replace unnecessary null check with a cast.Nick Clifton2-1/+6
* ldlang.h (LANG_FOR_EACH_INPUT_STATEMENT): Use cast instead of extra check.
2019-11-21Fix potentially undefined behaviour in the linker when parsing input statements.Nick Clifton2-1/+6
* ldlang.h (LANG_FOR_EACH_INPUT_STATEMENT): Check for an empty file chain before examining the first input statement.
2019-11-21PR46, cygwin: FAIL: cdtest with -UrAlan Modra6-6/+26
See the comment in pe.sc to understand why ld -Ur won't work. PR 46 binutils/ * testsuite/lib/binutils-common.exp (is_pecoff_format): Rewrite with positive logic and add more target triples. ld/ * scripttempl/pe.sc: Comment on ld -Ur fail. Wrap .gcc_exc comment. * scripttempl/pep.sc: Likewise. * testsuite/ld-cdtest/cdtest.exp (test2): xfail for pe.
2019-11-12RISC-V: Fix ld relax failure with calls and align directives.Jim Wilson7-0/+51
Make _bfd_riscv_relax_call handle section alignment padding same as the _bfd_riscv_relax_lui and _bfd_riscv_relax_pc functions already do. Use the max section alignment if section boundaries are crossed, otherwise the alignment of the containing section. bfd/ PR 25181 * elfnn-riscv.c (_bfd_riscv_relax_call): Always add max_alignment to foff. If sym_sec->output_section and sec->output_section are the same and not *ABS* then set max_alignment to that section's alignment. ld/ PR 25181 * testsuite/ld-riscv-elf/call-relax-0.s: New file. * testsuite/ld-riscv-elf/call-relax-1.s: New file. * testsuite/ld-riscv-elf/call-relax-2.s: New file. * testsuite/ld-riscv-elf/call-relax-3.s: New file. * testsuite/ld-riscv-elf/call-relax.d: New test. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test. Change-Id: Iaf65cee52345abf1955f36e8e72c4f6cc0db8d9a
2019-11-08Revert "GENERATE_SHLIB_SCRIPT vs. EMBEDDED."Alan Modra15-9/+35
This reverts commit f2aaebdb97977ee7a5c83c02af871e758e7d594b. My reasons for making that change were just plain wrong.
2019-11-07Remove CR16C supportAlan Modra8-79/+12
I think it is past time to remove CR16C support. CR16C was added in 2004, and only for ld. gas and binutils support is lacking, and there have been no commits to bfd/elf32-cr16c.c other than warning fixes or global maintainers making changes to all targets. I see no maintainer listed for CR16C, and no commits from anyone at NSC supporting the target. Furthermore, at the time the CR16 support was added in 2007, config.sub was changed upstream to no longer recognise cr16c as a valid cpu. That means the CR16C ld support is only available as a secondary target by configuring with, for example, --enable-targets=all or --enable-targets=cr16c-unknown-elf. No testing of the CR16C target is possible. include/ * elf/cr16c.h: Delete. bfd/ * cpu-cr16c.c: Delete. * elf32-cr16c.c: Delete. * Makefile.am, * archures.c, * config.bfd, * configure.ac, * reloc.c, * targets.c: Remove cr16c support. * Makefile.in, * bfd-in2.h, * configure, * libbfd.h, * po/SRC-POTFILES.in: Regenerate. ld/ * emulparams/elf32cr16c.sh: Delete. * scripttempl/elf32cr16c.sc: Delete. * Makefile.am, * configure.tgt: Remove cr16c support. * NEWS: Mention removal of cr16c. * Makefile.in, * po/BLD-POTFILES.in: Regenerate.
2019-11-07Order targets in ld/configure.tgtAlan Modra2-99/+100
The target list was supposed to be more or less alphabetically sorted, but this wasn't anywhere near the case. The comment about keeping architecture variants together seems odd to me, and is no doubt the reason why ix86 and x86_64 were grouped together, so I removed that comment. The patch doesn't change order of entries for a given cpu. * configure.tgt: Order targets by cpu.
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