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2015-06-23[AArch64] Generate DT_TEXTREL for relocation against read-only sectionJiong Wang4-0/+24
2015-06-23 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_readonly_dynrelocs): New function. (elfNN_aarch64_size_dynamic_sections): Traverse hash table to check relocations against read-only sections. ld/testsuite/ * ld-aarch64/dt_textrel.s: New testcase. * ld-aarch64/dt_textrel.d: New expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-06-17[AArch64] Select correct linker emulation for ILP32 according to endianesJiong Wang3-10/+24
2015-06-17 Jiong Wang <jiong.wang@arm.com> ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): New function. * ld-aarch64/emit-relocs-28.d: Use aarch64_choose_ilp32_emul to choose emulation mode.
2015-06-16ppc476 linker workaround shared lib fixes againAlan Modra4-21/+55
Huh, I can't even write a binary search properly. bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Correct binary search of dynamic relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s: Repeat dynamic reloc generating insns. * ld-powerpc/ppc476-shared.d: Update. * ld-powerpc/ppc476-shared2.d: Update.
2015-06-15Fix a segmentation fault triggered when trying to handle an unresolved PE ↵Nick Clifton3-2/+27
symbol with a very long name. PR ld/18466 * emultempl/pe.em (pe_find_data_imports): Generate an error if a symbol name is too long to handle. * emultempl/pep.em (pep_find_data_imports): Likewise.
2015-06-12Add new ld option: --print-memory-usageTristan Gingold20-0/+226
ld/ * NEWS: Mention new option. * lexsup.c (parse_args): Handle --print-memory-usage. (ld_options): Add --print-memory-usage. * ldmain.c (main): Call lang_print_memory_usage. * ldlex.h (enum option_values): Add OPTION_PRINT_MEMORY_USAGE. * ldlang.h: Add prototype of lang_print_memory_usage. * ldlang.c (lang_print_memory_size, lang_print_memory_usage): New functions. * ld.texinfo (Options): Document --print-memory-usage. * ld.h (args_type): Add print_memory_usage field. ld/testsuite/ * ld-scripts/print-memory-usage-1.t, * ld-scripts/print-memory-usage-1.s, * ld-scripts/print-memory-usage-1.l, * ld-scripts/print-memory-usage-2.t, * ld-scripts/print-memory-usage-2.l, * ld-scripts/print-memory-usage-3.s, * ld-scripts/print-memory-usage-3.t, * ld-scripts/print-memory-usage-3.l, * ld-scripts/print-memory-usage.t: New tests. * ld-scripts/print-memory-usage.exp: Run them.
2015-06-08Update French Translations for LD and GOLD.Nick Clifton2-220/+223
ld * po/fr.po: Updated French Translation. gold * po/fr.po: New French Translation.
2015-06-05Fixes a typo in the list of targets that should not run the compressed1d test.Nick Clifton2-1/+5
* ld-elf/compressed1d.d: Fix typo: iq200 -> iq2000.
2015-06-05ppc476 linker workaround shared lib fixesAlan Modra6-0/+72
When building a shared lib from non-PIC objects, we'll get dynamic text relocations. These need to move with any insns we move. Otherwise the dynamic reloc will modify the branch, resulting in crashes and other unpleasant behaviour. Also, ld -r --ppc476-workaround used with sufficiently aligned PIC objects needs a fix for emitted REL16 relocs. bfd/ * elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text relocs with insns moved by --ppc476-workaround. Correct output of REL16 relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s, * ld-powerpc/ppc476-shared.lnk, * ld-powerpc/ppc476-shared.d, * ld-powerpc/ppc476-shared2.d: New tests. * ld-powerpc/powerpc.exp: Run them.
2015-06-03[AArch64] Revert local changes included in Matthew's commitJiong Wang1-1/+1
When commit the following code for Matthew, I wrongly included my local changes. Revert it. Sorry. commit a5932920ef397c2cbe02efa915686022b78d59a7 Author: Matthew Wahab <matthew.wahab@arm.com> Date: Wed Jun 3 10:03:50 2015 +0100
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab1-1/+1
2015-06-03 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-arm.c (arm_archs): Add "armv8.1-a". * doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a". * NEWS: Mention ARMv8.1 support. include/opcode/ * arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. (ARM_ARCH_V8_1A): New. (ARM_ARCH_V8_1A_FP): New. (ARM_ARCH_V8_1A_SIMD): New. (ARM_ARCH_V8_1A_CRYPTOV1): New. (ARM_FEATURE_CORE): New.
2015-06-02[AArch64] Fix typo in testcaseJiong Wang2-3/+7
ld/testsuite/ * ld-aarch64/emit-relocs-313.s: Use gotpage_lo15.
2015-06-01[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14Jiong Wang4-0/+31
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation supoprt in bfd linker. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-28.s: New test file. * ld-aarch64/emit-relocs-28.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01[AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow checkJiong Wang4-0/+36
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest one-instruction addressing for TLS LE model when tls size is smaller 4K. Linker need to make sure there is no TLS offset overflow. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all potential high overflowed bits. ld/testsuite/ * ld-aarch64/tprel_add_lo12_overflow.s: New testcase. * ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-06-01[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang4-0/+30
2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_reloc_got_type): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (elfNN_aarch64_final_link_relocate): Ditto. (elfNN_aarch64_gc_swap_hook): Ditto. (elfNN_aarch64_check_relocs): Ditto. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto. ld/testsuite/ * ld-aarch64/emit-relocs-313.s: New test file. * ld-aarch64/emit-relocs-313.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-05-29Fix building PE test executables in environments where $CFLAGS is needed.Stephen Kitt2-4/+9
* ld-pe/pe-run2.exp (test_direct2_link_dll): Add $CFLAGS to the compiler command line.
2015-05-28Compact EH SupportCatherine Moore18-19/+339
The specification for the Compact EH format is available at: https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf 2015-05-28 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> Paul Brook <paul@codesourcery.com> bfd/ * bfd-in2.h: Regenerated. * elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define. (COMPACT_EH_CANT_UNWIND_OPCODE): Define. (dwarf_eh_frame_hdr_info): Move dwarf-specific fields from eh_frame_hdr_info. (compact_eh_frame_hdr_info): Declare. (eh_frame_hdr_info): Redeclare with union for dwarf-specific fields and compact-eh fields. (elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding. (bfd_elf_section_data): Add eh_frame_entry_field. (elf_section_eh_frame_entry): Define. (bfd_elf_parse_eh_frame_entries): Declare. (_bfd_elf_parse_eh_frame_entry): Declare. (_bfd_elf_end_eh_frame_parsing): Declare. (_bfd_elf_write_section_eh_frame_entry): Declare. (_bfd_elf_eh_frame_entry_present): Declare. (_bfd_elf_section_for_symbol): Declare. * elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function. (bfd_elf_record_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame): Update hdr_info field references. (cmp_eh_frame_hdr): New function. (add_eh_frame_hdr_terminator): New function. (_bfd_elf_end_eh_frame_parsing): New function. (find_merged_cie): Update hdr_info field references. (_bfd_elf_discard_section_eh_frame): Likewise. (_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support. (_bfd_elf_eh_frame_entry_present): New function. (_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support. (_bfd_elf_write_section_eh_frame_entry): New function. (_bfd_elf_write_section_eh_frame): Update hdr_info field references. (_bfd_elf_fixup_eh_frame_hdr): New function. (write_compact_eh_frame_hdr): New function. (write_dwarf_eh_frame_hdr): New function. (_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support. * elflink.c (_bfd_elf_section_for_symbol): New function. (elf_section_ignore_discarded_relocs): Add Compact EH support. (elf_link_input_bfd): Likewise. (bfd_elf_final_link): Likewise. (_bfd_elf_gc_mark): Likewise. (bfd_elf_parse_eh_frame_entries): New function. (bfd_elf_gc_sections): Add Compact EH support. (bfd_elf_discard_info): Likewise. * elfxx-mips.c: Include dwarf2.h. (_bfd_mips_elf_compact_eh_encoding): New function. (_bfd_mips_elf_cant_unwind_opcode): New function. * elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare. (_bfd_mips_elf_cant_unwind_opcode): Declare. (elf_backend_compact_eh_encoding): Define. (elf_backend_cant_unwind_opcode): Define. * elfxx-target.h (elf_backend_compact_eh_encoding): Provide default. (elf_backend_cant_unwind_opcode): Provide default. (elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and elf_backend_cant_unwind_opcode. * section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition. gas/ * config/tc-alpha.c (all_cfi_sections): Declare. (s_alpha_ent): Initialize all_cfi_sections. (alpha_elf_md_end): Invoke cfi_set_sections. * config/tc-mips.c (md_apply_fix): Handle BFD_RELOC_NONE. (s_ehword): Use BFD_RELOC_32_PCREL. (mips_fix_adjustable): Handle BFD_RELOC_32_PCREL. (mips_cfi_reloc_for_encoding): New function. * tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine. (DWARF2_FDE_RELOC_ENCODING): Define. (tc_cfi_reloc_for_encoding): Define. (mips_cfi_reloc_for_encoding): Define. (tc_compact_eh_opcode_stop): Define. (tc_compact_eh_opcode_pad): Define. * doc/as.texinfo: Document Compact EH extensions. * doc/internals.texi: Likewise. * dw2gencfi.c (EH_FRAME_LINKONCE): Redefine. (tc_cfi_reloc_for_encoding): Provide default. (compact_eh): Declare. (emit_expr_encoded): New function. (get_debugseg_name): Add Compact EH support. (alloc_debugseg_item): Likewise. (cfi_set_sections): New function. (dot_cfi_fde_data): New function. (dot_cfi_personality_id): New function. (dot_cfi_inline_lsda): New function. (cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id, and cfi_inline_lsda. (dot_cfi_personality): Add Compact EH support. (dot_cfi_lsda): Likewise. (dot_cfi_sections): Likewise. (dot_cfi_startproc): Likewise. (get_cfi_seg): Likewise. (output_compact_unwind_data): New function. (output_cfi_insn): Add Compact EH support. (output_cie): Likewise. (output_fde): Likewise. (cfi_finish): Likewise. (cfi_emit_eh_header): New function. (output_eh_header): New function. * dw2gencfi.h (cfi_set_sections): Declare. (SUPPORT_COMPACT_EH): Define. (MULTIPLE_FRAME_SECTIONS): Define. New enumeration to describe the Compact EH header format. (fde_entry): Add new fields personality_id, eh_header_type, eh_data_size, eh_data, eh_loc and sections. (CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target, CFI_EMIT_eh_frame_compact): Define. 2015-05-22 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> gas/testsuite/ * gas/mips/mips.exp: Run new tests. * gas/mips/compact-eh-1.s: New file. * gas/mips/compact-eh-2.s: New file. * gas/mips/compact-eh-3.s: New file. * gas/mips/compact-eh-4.s: New file. * gas/mips/compact-eh-5.s: New file. * gas/mips/compact-eh-6.s: New file. * gas/mips/compact-eh-7.s: New file. * gas/mips/compact-eh-eb-1.d: New file. * gas/mips/compact-eh-eb-2.d: New file. * gas/mips/compact-eh-eb-3.d: New file. * gas/mips/compact-eh-eb-4.d: New file. * gas/mips/compact-eh-eb-5.d: New file. * gas/mips/compact-eh-eb-6.d: New file. * gas/mips/compact-eh-eb-7.d: New file. * gas/mips/compact-eh-el-1.d: New file. * gas/mips/compact-eh-el-2.d: New file. * gas/mips/compact-eh-el-3.d: New file. * gas/mips/compact-eh-el-4.d: New file. * gas/mips/compact-eh-el-5.d: New file. * gas/mips/compact-eh-el-6.d: New file. * gas/mips/compact-eh-el-7.d: New file. * gas/mips/compact-eh-err1.l: New file. * gas/mips/compact-eh-err1.s: New file. * gas/mips/compact-eh-err2.l: New file. * gas/mips/compact-eh-err2.s: New file. 2015-05-22 Catherine Moore <clm@codesourcery.com> include/ * bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. 2015-05-22 Catherine Moore <clm@codesourcery.com> Paul Brook <paul@codesourcery.com> ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Add Compact EH support. * scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab sections. 2015-05-22 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-mips-elf/compact-eh.ld: New linker script. * ld-mips-elf/compact-eh1.d: New. * ld-mips-elf/compact-eh1.s: New. * ld-mips-elf/compact-eh1a.s: New. * ld-mips-elf/compact-eh1b.s: New. * ld-mips-elf/compact-eh2.d: New. * ld-mips-elf/compact-eh2.s: New. * ld-mips-elf/compact-eh3.d: New. * ld-mips-elf/compact-eh3.s: New. * ld-mips-elf/compact-eh3a.s: New. * ld-mips-elf/compact-eh4.d: New. * ld-mips-elf/compact-eh5.d: New. * ld-mips-elf/compact-eh6.d: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-05-27Convert PLT reloc only if pointer equality isn't neededH.J. Lu5-0/+49
When pointer equality needed, we can't replace PLT relocations with GOT relocations for -z now. This patch checks if pointer equality is needed before converting PLT relocations to GOT relocations. bfd/ PR binutils/18458 * elf32-i386.c (elf_i386_check_relocs): Create .plt.got section for now binding only if pointer equality isn't needed. (elf_i386_allocate_dynrelocs): Use .plt.got section for now binding only if pointer equality isn't needed. * elf64-x86-64.c (elf_x86_64_check_relocs): Create .plt.got section for now binding only if pointer equality isn't needed. (elf_x86_64_allocate_dynrelocs): Use .plt.got section for now binding only if pointer equality isn't needed. ld/testsuite/ PR binutils/18458 * ld-elf/shared.exp (build_tests): Build libpr18458a.so and libpr18458b.so. (run_tests): Run pr18458 test. * ld-elf/pr18458a.c: New file. * ld-elf/pr18458b.c: Likewise. * ld-elf/pr18458c.c: Likewise.
2015-05-17ELF options may be missing from `ld --help' outputChung-Lin Tang3-68/+91
nios2-linux has an emulation named "nios2linux", and happens to not include another extra emulation with a name matching *elf*. This makes nios2-linux left out of the ELF options printing targets, which is unintended. * configure.ac (AC_PROG_GREP): Check for grep program. (elf_list_options,elf_shlib_list_options,elf_plt_unwind_list_options): Enable ELF option printing for emulations containing 'TEMPLATE_NAME=elf32'. * configure: Regenerate.
2015-05-16Don't generate PLT relocations for now bindingH.J. Lu5-0/+63
There is no need for PLT relocations with -z now. We can use GOT relocations, which take less space, instead and replace 16-byte .plt entres with 8-byte .plt.got entries. bfd/ * elf32-i386.c (elf_i386_check_relocs): Create .plt.got section for now binding. (elf_i386_allocate_dynrelocs): Use .plt.got section for now binding. * elf64-x86-64.c (elf_x86_64_check_relocs): Create .plt.got section for now binding. (elf_x86_64_allocate_dynrelocs): Use .plt.got section for now binding. ld/testsuite/ * ld-i386/i386.exp: Run PR ld/17689 tests with -z now. * ld-x86-64/x86-64.exp: Likewise * ld-i386/pr17689now.rd: New file. * ld-x86-64/pr17689now.rd: Likewise
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu4-4/+12
AMD64 spec and Intel64 spec differ in direct unconditional branches in 64-bit mode. AMD64 supports direct unconditional branches with 16-bit offset via the data size prefix, which truncates RIP to 16 bits, while the data size prefix is ignored by Intel64. This patch adds -mamd64/-mintel64 option to x86-64 assembler and -Mamd64/-Mintel64 option to x86-64 disassembler. The most permissive ISA, which is AMD64, is the default. GDB can add an option, similar to (gdb) help set disassembly-flavor Set the disassembly flavor. The valid values are "att" and "intel", and the default value is "att". to select which ISA to disassemble. binutils/ PR binutis/18386 * doc/binutils.texi: Document -Mamd64 and -Mintel64. gas/ PR binutis/18386 * config/tc-i386.c (OPTION_MAMD64): New. (OPTION_MINTEL64): Likewise. (md_longopts): Add -mamd64 and -mintel64. (md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64. (md_show_usage): Add -mamd64 and -mintel64. * doc/c-i386.texi: Document -mamd64 and -mintel64. gas/testsuite/ PR binutis/18386 * gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3. * gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/x86-64-branch-2.d: New file. * gas/i386/x86-64-branch-2.s: Likewise. * gas/i386/x86-64-branch-3.l: Likewise. * gas/i386/x86-64-branch-3.s: Likewise. ld/testsuite/ PR binutis/18386 * ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to objdump for tlspic.dd and tlsgdesc.dd. opcodes/ PR binutis/18386 * i386-dis.c: Add comments for '@'. (x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9. (enum x86_64_isa): New. (isa64): Likewise. (print_i386_disassembler_options): Add amd64 and intel64. (print_insn): Handle amd64 and intel64. (putop): Handle '@'. (OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit. * i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64. * i386-opc.h (AMD64): New. (CpuIntel64): Likewise. (i386_cpu_flags): Add cpuamd64 and cpuintel64. * i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64. Mark direct call/jmp without Disp16|Disp32 as Intel64. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2015-05-14Update description of the ASSERT linker script command to note its ↵Nick Clifton2-0/+35
interation with PROVIDEd symbols. * ld.texinfo (ASSERT): Describe the interaction with PROVIDEd symbols.
2015-05-13Add missing ChangeLog entries for PR binutis/18386H.J. Lu1-0/+6
2015-05-12Allocate the first .plt entry space only if neededH.J. Lu7-0/+46
Commit dd7e64d45b317128f5fe813a8da0b13b4ad046ae may optimize out i386/x86-64 JUMP_SLOT relocation. If there is no JUMP_SLOT relocation left, we don't need to the first .plt entry. This patch allocates space for the first .plt entry only if we also reserve space for a PLT slot for JUMP_SLOT relocation. bfd/ * elf32-i386.c (elf_i386_allocate_dynrelocs): Allocate space for the first .plt entry only if needed. * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise. ld/testsuite/ * ld-i386/i386.exp: Run pltgot-1 for Linux targets. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pltgot-1.d: New file. * ld-i386/pltgot-1.s: Likewise. * ld-x86-64/pltgot-1.d: Likewise. * ld-x86-64/pltgot-1.s: Likewise.
2015-05-11Default e_machine to EM_IAMCU for i?86-*-elfiamcuH.J. Lu5-0/+28
This patch sets the default ELF output format of assembler and linker to EM_IAMCU when binutils is configured to i?86-*-elfiamcu target. gas/ * configure.tgt (arch): Set to iamcu for i386-*-elfiamcu target. * config/tc-i386.c (i386_mach): Support iamcu. (i386_target_format): Likewise. ld/ * configure.tgt: Support i[3-7]86-*-elfiamcu target. ld/testsuite/ * ld-i386/i386.exp (iamcu_tests): Run iamcu-4. * ld-i386/iamcu-4.d: New file.
2015-05-11Add Intel MCU support to ldH.J. Lu14-23/+185
-m elf_iamcu must be passed to i386 linker to generate Intel MCU binary. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf_iamcu.c. (eelf_iamcu.c): New. * configure.tgt (targ_extra_emuls): Add elf_iamcu if elf_i386 is enabled in BFD. * Makefile.in: Regenerated. * emulparams/elf_iamcu.sh: New file. ld/testsuite/ * ld-i386/abs-iamcu.d: New file. * ld-i386/dummy.s: Likewise. * ld-i386/foo.s: Likewise. * ld-i386/iamcu-1.d: Likewise. * ld-i386/iamcu-2.d: Likewise. * ld-i386/iamcu-3.d: Likewise. * ld-i386/start.s: Likewise. * ld-i386/i386.exp (iamcu_tests): New. Run iamcu_tests.
2015-05-09Ignore 0x66 prefix for call/jmp/jcc in 64-bit modeH.J. Lu2-6/+6
The operand size prefix (0x66) is ignored for 32-bit PC-relative call, jmp and jcc in 64-bit mode. gas/testsuite/ PR binutis/18386 * gas/i386/i386.exp: Run x86-64-jump. * gas/i386/x86-64-branch.d: Updated. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/x86-64-branch.s: Add tests for the operand size prefix with call, jmp and jb. * gas/i386/x86-64-jump.d: New file. * gas/i386/x86-64-jump.s: Likewise. ld/testsuite/ PR binutis/18386 * ld-x86-64/tlsgdesc.dd: Updated. * ld-x86-64/tlspic.dd: Likewise. opcodes/ PR binutis/18386 * i386-dis.c (X86_64_E8): New. (X86_64_E9): Likewise. Update comments on 'T', 'U', 'V'. Add comments for '^'. (dis386): Replace callT/jmpT with X86_64_E8/X86_64_E9. (x86_64_table): Add X86_64_E8 and X86_64_E9. (mod_table): Replace {T|} with ^ on Jcall/Jmp. (putop): Handle '^'. (OP_J): Ignore the operand size prefix in 64-bit. Don't check REX_W.
2015-05-05Add support to the MSP430 linker for the automatic placement of code and ↵Nick Clifton6-2/+336
data into either low or high memory regions. gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096. (msp430_make_init_symbols): New function. (msp430_section): Call it. (msp430_frob_section): Likewise. ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430. * scripttempl/msp430.sc (.text): Add .lower.text and .either.text. (.data): Add .lower.data and .either.data. (.bss): Add .lower.bss and .either.bss. (.rodata): Add .lower.rodata and .either.rodata. * emultempl/msp430.em: New file. Implements a new orphan placement algorithm that divides sections between lower and upper memory regions. * Makefile.am (emsp430elf.c): Depend upon msp430.em. *emsp430X.c): Likewise. * Makefine.in: Regenerate.
2015-04-29Link the last *normal against libfoozlib.soH.J. Lu1-0/+6
Link the last zlibnormal gnunormal and gabinormal against libfoozlib.so so that their only differences are DWARF debug sections. PR ld/18354 * ld-elf/compress.exp (run_tests): Link the last zlibnormal, gnunormal and gabinormal against libfoozlib.so.
2015-04-29Fix 18354H.J. Lu1-1/+10
2015-04-29[ARM] Update ld testcasesJiong Wang3-3/+8
2015-04-29 Renlin Li <renlin.li@arm.com> ld/testsuite/ * ld-arm/ifunc-10.dd: Adjust expected output. * ld-arm/ifunc-2.dd: Likewise.
2015-04-28Eat newlines inside INPUT statements in linker scriptsAndreas Schwab2-1/+6
ld/ PR ld/18344 * ldlex.l (INPUTLIST): Increment lineno on newline.
2015-04-27S/390: Fix gotreloc_31-1 testcase.Andreas Krebbel2-3/+6
Since we changed the default arch for objdump to zarch the following testcase needs to check for the real instruction mnemonics instead of just bytes. This fixes the following testsuite fail on s390x: FAIL: GOT: symbol address load from got to larl
2015-04-25Non-alloc sections don't belong in PT_LOAD segmentsAlan Modra4-8/+20
Taking them out showed a bug in the powerpc64 backend with .branch_lt being removed from output_bfd but not from previously set up segment section maps. Removing the bfd sections meant their sh_flags (and practically everything else) remaining zero, ie. not SHF_ALLOC, triggering complaints about "`.branch_lt' can't be allocated in segment". include/elf/ * internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and similar segments only contain alloc sections. ld/ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out. ld/testsuite/ * ld-powerpc/tocnovar.d: Revert last change.
2015-04-24[AArch64] Improve PC-relative relocation check for shared libraryJiong Wang4-0/+39
2015-04-24 Jiong. Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Reject PC-relative relocation for external symbol. ld/testsuite/ * ld-aarch64/pcrel.s: New testcase. * ld-aarch64/pcrel_pic_defiend_local.d: New expect file. * ld-aarch64/pcrel_pic_undefined.d: Ditto. * ld-aarch64/aarch64-elf.exp: Run them.
2015-04-24Fix typoDJ Delorie1-1/+1
2015-04-24Change msp430 emulation to msp430elfDJ Delorie6-9/+19
* Makefile.am (msp430): Rename primary emulation to msp430elf. (emsp430.c): Rename to emsp430elf.c, update dependencies (emsp430X.c): Update dependencies. * Makefile.in: Likewise. * configure.tgt (msp430-*-*): Rename primary emulation to msp430elf. * emulparame/msp430.sh: Rename to msp430elf.sh. * emulparams/msp430X.sh: Update.
2015-04-24[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.Richard Earnshaw24-114/+98
2015-04/24 Richard Earnshaw <rearnsha@arm.com> gas/ * config/tc-arm.h (arm_min): New function. (SUB_SEGMENT_ALIGN): Define. gas/testsuite/ * gas/arm/align64.d: Delete trailing padding NOPs. ld/testsuite/ * ld-arm/armthumb-lib.d: Regenerate expected output. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/armthumb-lib.sym: Likewise. * ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-b.d: Likewise. * ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-bcc.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-bl.d: Likewise. * ld-arm/cortex-a8-fix-blx-bcond.d: Likewise. * ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-blx.d: Likewise. * ld-arm/cortex-a8-fix-hdr.d: Likewise. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise.
2015-04-24Skip the compressed1d test for targets which do not use the elf32.em linker ↵Nick Clifton2-0/+7
emulation file. * ld-elf/compressed1d.d: Add notarget for ELF based targets that do not use elf.em.
2015-04-24Correct ld-elf/compressed1e.d to use notarget and for cris-elf, not cris-*.Hans-Peter Nilsson2-1/+6
Don't XPASS cris-linux which *does* support -shared. And xfail is for bugs, notarget is for not-applicable.
2015-04-23Xfail cris and frv for ld-elf/compressed1e.dH.J. Lu2-0/+7
cris and frv don't support -shared. * ld-elf/compressed1e.d: Only run for Linux/gnu. Xfail cris and frv.
2015-04-23Delay setting up compressed debug section namesH.J. Lu3-0/+24
When we set up st_name for output section name in elf_fake_sections, we don't know if the compressed DWARF debug section will be smaller. We may end up with compressed DWARF debug sections which are bigger than the uncompressed ones. This patch delays setting up st_name for output DWARF debug section to _bfd_elf_assign_file_positions_for_non_load which will compress the output debug section. We also postpone placement of shstrtab section after DWARF debug sections have been compressed. The net effect is .shstrtab section is now placed after .symtab and .strtab sections. bfd/ PR ld/18277 * compress.c (bfd_compress_section_contents): Remove the write_compress argument. (bfd_init_section_compress_status): Updated. (bfd_compress_section): Likewise. * elf.c (_bfd_elf_set_reloc_sh_name): New. (_bfd_elf_init_reloc_shdr): Add delay_st_name_p. Set sh_name to (unsigned int) -1 if delay_st_name_p is TRUE. Use _bfd_elf_set_reloc_sh_name. (elf_fake_sections): Don't rename DWARF debug section for linker output if it will be compressed. Instead, set delay_st_name_p to TRUE and pass it to _bfd_elf_init_reloc_shdr. (assign_section_numbers): Call _bfd_elf_strtab_addref only if sh_name != (unsigned int) -1. Don't finalize nor assign shstrtab section here. Delay setting output section names to _bfd_elf_write_object_contents. (_bfd_elf_compute_section_file_positions): Update comments on sh_offset for shstrtab section. (assign_file_positions_for_non_load_sections): Set sh_offset to -1 for shstrtab section. (assign_file_positions_except_relocs): Likewise. (_bfd_elf_assign_file_positions_for_non_load): Set up sh_name when compressing DWARF debug sections. Place shstrtab section after DWARF debug sections have been compressed. (_bfd_elf_write_object_contents): Setting sh_name for output sections. ld/testsuite/ PR ld/18277 * ld-elf/compressed1d.d: New. * ld-elf/compressed1e.d: Likewise.
2015-04-23Don't change compressed input debug section namesH.J. Lu2-0/+8
Change compressed input debug section name for objdump is very confusing. But we need to change it for linker so that linker will consider the input section as a debug section. This patch delays section rename to elf_fake_sections for objcopy and avoids it for objdump. bfd/ PR binutils/18209 * bfd.c (bfd): Add is_linker_input. * elf.c (convert_debug_to_zdebug): New. (convert_zdebug_to_debug): Likewise. (_bfd_elf_make_section_from_shdr): Don't convert .debug_* to .zdebug_* here. Use convert_zdebug_to_debug. Set SEC_ELF_RENAME. (_bfd_elf_init_reloc_shdr): Pass a pointer to section name instead of a pointer to section. (elf_fake_sections): Rename the section name if SEC_ELF_RENAME is set. * section.c (SEC_ELF_RENAME): New. * bfd-in2.h: Regenerated. binutils/ PR binutils/18209 * objcopy.c (setup_section): Copy compress status. binutils/testsuite/ PR binutils/18209 * binutils-all/compress.exp: Replace dw2-3.W with dw2-3gabi.W on zlib-gabi output. * binutils-all/dw2-1.W: Convert section names to .zdebug_*. * binutils-all/dw2-3.W: Likewise. * binutils-all/objdump.W: Likewise. * binutils-all/dw2-3gabi.W: New file. ld/ PR binutils/18209 * ldfile.c (ldfile_try_open_bfd): Set is_linker_input to 1.
2015-04-23Accept odd result in ld-powerpc/tocnovar testcaseAlan Modra2-1/+2
I didn't commit this with the relro and powerpc .TOC. changes, thinking that something should be done about the odd result of .shstrtab appearing in PT_GNU_RELRO. On looking at it further, I think that changing readelf would be wrong, so let's just accept the results. Real binaries will always have other sections past .got, so PT_GNU_RELRO won't finish past the end of loaded sections. * ld-powerpc/tocnovar.d: Adjust.
2015-04-23Align .TOC. for PowerPC64Alan Modra28-132/+164
This change, with prerequisite 0e5fabeb, provides a toc base aligned to 256 bytes rather than 8 bytes. This is necessary for a minor gcc optimisation, allowing use of d-form instructions to correctly access toc-relative items larger than 8 bytes. bfd/ * elf64-ppc.c (TOC_BASE_ALIGN): Define. (ppc64_elf_next_toc_section): Align multi-got toc base. (ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol. ld/ * emulparams/elf64ppc.sh (GOT): Align. ld/testsuite/ * ld-powerpc/ambiguousv1b.d: Update for aligned .got. * ld-powerpc/defsym.d: Likewise. * ld-powerpc/elfv2-2exe.d: Likewise. * ld-powerpc/elfv2exe.d: Likewise. * ld-powerpc/elfv2so.d: Likewise. * ld-powerpc/relbrlt.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.r: Likewise. * ld-powerpc/tocopt.d: Likewise. * ld-powerpc/tocopt2.d: Likewise. * ld-powerpc/tocopt3.d: Likewise. * ld-powerpc/tocopt4.d: Likewise. * ld-powerpc/tocopt5.d: Likewise.
2015-04-22Rewrite relro adjusting codeAlan Modra6-42/+50
The linker tries to put the end of the last section in the relro segment exactly on a page boundary, because the relro segment itself must end on a page boundary. If for any reason this can't be done, padding is inserted. Since the end of the relro segment is typically between .got and .got.plt, padding effectively increases the size of the GOT. This isn't nice for targets and code models with limited GOT addressing. The problem with the current code is that it doesn't cope very well with aligned sections in the relro segment. When making .got aligned to a 256 byte boundary for PowerPC64, I found that often the initial alignment attempt failed and the fallback attempt to be less than adequate. This is a particular problem for PowerPC64 since the distance between .got and .plt affects the size of plt call stubs, leading to "stubs don't match calculated size" errors. So this rewrite takes a direct approach to calculating a new relro base. Starting from the last section in the segment, we calculate where it must start to position its end on the boundary, or as near as possible considering alignment requirements. The new start then becomes the goal for the previous section to end, and so on for all sections. This of course ignores the possibility that user scripts will place . = ALIGN(xxx); in the relro segment, or provide section address expressions. In those cases we might fail, but the old code probably did too, and a fallback is provided. ld/ * ldexp.h (struct ldexp_control): Delete dataseg.min_base. Add data_seg.relro_offset. * ldexp.c (fold_binary <DATA_SEGMENT_ALIGN>): Don't set min_base. (fold_binary <DATA_SEGMENT_RELRO_END>): Do set relro_offset. * ldlang.c (lang_size_sections): Rewrite code adjusting relro segment base to line up last section on page boundary. ld/testsuite/ * ld-x86-64/pr18176.d: Update.
2015-04-22i386: Allow copy relocs for building PIEH.J. Lu15-0/+218
This patch allows copy relocs for R_386_GOTOFF relocations in PIE. For extern int glob_a; int foo () { return glob_a; } compiler now can optimize it from call __x86.get_pc_thunk.ax addl $_GLOBAL_OFFSET_TABLE_, %eax movl glob_a@GOT(%eax), %eax movl (%eax), %eax ret to call __x86.get_pc_thunk.ax addl $_GLOBAL_OFFSET_TABLE_, %eax movl glob_a@GOTOFF(%eax), %eax ret bfd/ PR ld/18289 * elf32-i386.c (elf_i386_link_hash_entry): Add gotoff_ref. (elf_i386_link_hash_newfunc): Initialize gotoff_ref to 0. (elf_i386_create_dynamic_sections): Always allow copy relocs for building executables. (elf_i386_copy_indirect_symbol): Also copy gotoff_ref. (elf_i386_check_relocs): Set gotoff_ref for R_386_GOTOFF. (elf_i386_adjust_dynamic_symbol): Also allocate copy relocs for PIE and R_386_GOTOFF. (elf_i386_relocate_section): Allow R_386_GOTOFF in executable. ld/testsuite/ PR ld/18289 * ld-i386/copyreloc-lib.c: New file. * ld-i386/copyreloc-main.S: Likewise. * ld-i386/copyreloc-main.out: Likewise. * ld-i386/copyreloc-main1.rd: Likewise. * ld-i386/copyreloc-main2.rd: Likewise. * ld-i386/dummy.c: Likewise. * ld-i386/pr17689.out: Likewise. * ld-i386/pr17689.rd: Likewise. * ld-i386/pr17689a.c: Likewise. * ld-i386/pr17689b.S: Likewise. * ld-i386/pr17827.rd: Likewise. * ld-i386/pr17827ver.rd: Likewise. * ld-i386/i386.exp: Run copyreloc tests.
2015-04-20Don't hardcode offset of .shstrtab sectionH.J. Lu27-26/+55
There is no requirement on placement of section name section, .shstrtab. This patch removes hardcoded offsets of .shstrtab sections. binutils/testsuite/ * binutils-all/i386/compressed-1b.d: Don't hardcode offset of .shstrtab section. * binutils-all/i386/compressed-1c.d: Likewise. * binutils-all/readelf.s-64: Likewise. * binutils-all/x86-64/compressed-1b.d: Likewise. * binutils-all/x86-64/compressed-1c.d: Likewise. gas/testsuite/ * gas/i386/ilp32/x86-64-unwind.d: Don't hardcode offset of .shstrtab section. * gas/i386/x86-64-unwind.d: Likewise. * gas/ia64/alias-ilp32.d: Likewise. * gas/ia64/alias.d: Likewise. * gas/ia64/group-1.d: Likewise. * gas/ia64/group-2.d: Likewise. * gas/ia64/secname-ilp32.d: Likewise. * gas/ia64/secname.d: Likewise. * gas/ia64/unwind-ilp32.d: Likewise. * gas/ia64/unwind.d: Likewise. * gas/mmix/bspec-1.d: Likewise. * gas/mmix/byte-1.d: Likewise. * gas/mmix/loc-1.d: Likewise. * gas/mmix/loc-2.d: Likewise. * gas/mmix/loc-3.d: Likewise. * gas/mmix/loc-4.d: Likewise. * gas/mmix/loc-5.d: Likewise. * gas/tic6x/scomm-directive-4.d: Likewise. ld/testsuite/ * ld-mmix/bspec1.d: Don't hardcode offset of .shstrtab section. * ld-mmix/bspec2.d: Likewise. * ld-mmix/local1.d: Likewise. * ld-mmix/local3.d: Likewise. * ld-mmix/local5.d: Likewise. * ld-mmix/local7.d: Likewise. * ld-mmix/undef-3.d: Likewise. * ld-sh/sh64/crangerel1.rd: Likewise. * ld-sh/sh64/crangerel2.rd: Likewise. * ld-tic6x/common.d: Likewise. * ld-tic6x/shlib-1.rd: Likewise. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-app-1.rd: Likewise. * ld-tic6x/shlib-app-1b.rd: Likewise. * ld-tic6x/shlib-app-1r.rd: Likewise. * ld-tic6x/shlib-app-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise. * ld-tic6x/static-app-1.rd: Likewise. * ld-tic6x/static-app-1b.rd: Likewise. * ld-tic6x/static-app-1r.rd: Likewise. * ld-tic6x/static-app-1rb.rd: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/split-by-file-nacl.rd: Likewise. * ld-x86-64/split-by-file.rd: Likewise.
2015-04-15Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]H.J. Lu2-0/+8
binutils/ * NEWS: Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]. gas/ * NEWS: Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]. ld/ * NEWS: Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi].
2015-04-14Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]H.J. Lu13-1/+253
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] to ld for ELF targets to support generating compressed DWARF debug sections. We always generate .zdebug_* section since section names have been finalized and they can't be changed easily when compression is being performed. bfd/ * bfd-in.h (compressed_debug_section_type): New. * compress.c (bfd_compress_section_contents): Add an argument for linker write compression and always generate .zdebug_* section when linking. (bfd_init_section_compress_status): Pass FALSE to bfd_compress_section_contents. (bfd_compress_section): New function. * elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS on DWARF debug sections if COMPRESS_DEBUG is set and rename section if COMPRESS_DEBUG_GABI_ZLIB isn't set. (assign_file_positions_for_non_load_sections): Set sh_offset to -1 if SEC_ELF_COMPRESS is set. (assign_file_positions_except_relocs): Likwise. (_bfd_elf_assign_file_positions_for_relocs): Renamed to ... (_bfd_elf_assign_file_positions_for_non_load): This. Change return time to bfd_boolean. Compress the section if SEC_ELF_COMPRESS is set. (_bfd_elf_write_object_contents): Updated. (_bfd_elf_set_section_contents): Write section contents to the buffer if SEC_ELF_COMPRESS is set. * merge.c: Include "elf-bfd.h". (sec_merge_emit): Add arguments for contents and offset. Write to contents with offset if contents isn't NULL. (_bfd_write_merged_section): Write section contents to the buffer if SEC_ELF_COMPRESS is set. Pass contents and output_offset to sec_merge_emit. * elflink.c (bfd_elf_final_link): Allocate the buffer for output section contents if SEC_ELF_COMPRESS is set. * section.c (SEC_ELF_COMPRESS): New. * bfd-in2.h: Regenerated. gas/ * as.h (compressed_debug_section_type): Removed. include/ * bfdlink.h (bfd_link_info): Add compress_debug. ld/ * ld.texinfo: Document --compress-debug-sections=. * ldmain.c (main): Set BFD_COMPRESS on output_bfd if COMPRESS_DEBUG is set. Set BFD_COMPRESS_GABI on output_bfd for COMPRESS_DEBUG_GABI_ZLIB. * lexsup.c (elf_static_list_options): Add --compress-debug-sections=. * emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New. (xtra_long): Add "compress-debug-sections". (gld${EMULATION_NAME}_handle_option): Handle OPTION_COMPRESS_DEBUG. ld/testsuite/ * ld-elf/compress.exp (build_tests): Add tests for --compress-debug-sections=. (run_tests): Likewise. Add additonal tests for --compress-debug-sections=. * ld-elf/gabiend.rt: New file. * ld-elf/gabinormal.rt: Likewise. * ld-elf/gnubegin.rS: Likewise. * ld-elf/gnunormal.rS: Likewise. * ld-elf/zlibbegin.rS: Likewise. * ld-elf/zlibnormal.rS: Likewise.
2015-04-15xfail pr18223 test for tic6xAlan Modra2-0/+5
Fails due to warning: generating a shared library containing non-PIC/PID code * ld-gc/pr18223.d: xfail tic6x.
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