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2015-06-23[AArch64] Generate DT_TEXTREL for relocation against read-only sectionJiong Wang4-0/+24
2015-06-17[AArch64] Select correct linker emulation for ILP32 according to endianesJiong Wang3-10/+24
2015-06-16ppc476 linker workaround shared lib fixes againAlan Modra4-21/+55
2015-06-15Fix a segmentation fault triggered when trying to handle an unresolved PE sym...Nick Clifton3-2/+27
2015-06-12Add new ld option: --print-memory-usageTristan Gingold20-0/+226
2015-06-08Update French Translations for LD and GOLD.Nick Clifton2-220/+223
2015-06-05Fixes a typo in the list of targets that should not run the compressed1d test.Nick Clifton2-1/+5
2015-06-05ppc476 linker workaround shared lib fixesAlan Modra6-0/+72
2015-06-03[AArch64] Revert local changes included in Matthew's commitJiong Wang1-1/+1
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab1-1/+1
2015-06-02[AArch64] Fix typo in testcaseJiong Wang2-3/+7
2015-06-01[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14Jiong Wang4-0/+31
2015-06-01[AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow checkJiong Wang4-0/+36
2015-06-01[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang4-0/+30
2015-05-29Fix building PE test executables in environments where $CFLAGS is needed.Stephen Kitt2-4/+9
2015-05-28Compact EH SupportCatherine Moore18-19/+339
2015-05-27Convert PLT reloc only if pointer equality isn't neededH.J. Lu5-0/+49
2015-05-17ELF options may be missing from `ld --help' outputChung-Lin Tang3-68/+91
2015-05-16Don't generate PLT relocations for now bindingH.J. Lu5-0/+63
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu4-4/+12
2015-05-14Update description of the ASSERT linker script command to note its interation...Nick Clifton2-0/+35
2015-05-13Add missing ChangeLog entries for PR binutis/18386H.J. Lu1-0/+6
2015-05-12Allocate the first .plt entry space only if neededH.J. Lu7-0/+46
2015-05-11Default e_machine to EM_IAMCU for i?86-*-elfiamcuH.J. Lu5-0/+28
2015-05-11Add Intel MCU support to ldH.J. Lu14-23/+185
2015-05-09Ignore 0x66 prefix for call/jmp/jcc in 64-bit modeH.J. Lu2-6/+6
2015-05-05Add support to the MSP430 linker for the automatic placement of code and data...Nick Clifton6-2/+336
2015-04-29Link the last *normal against libfoozlib.soH.J. Lu1-0/+6
2015-04-29Fix 18354H.J. Lu1-1/+10
2015-04-29[ARM] Update ld testcasesJiong Wang3-3/+8
2015-04-28Eat newlines inside INPUT statements in linker scriptsAndreas Schwab2-1/+6
2015-04-27S/390: Fix gotreloc_31-1 testcase.Andreas Krebbel2-3/+6
2015-04-25Non-alloc sections don't belong in PT_LOAD segmentsAlan Modra4-8/+20
2015-04-24[AArch64] Improve PC-relative relocation check for shared libraryJiong Wang4-0/+39
2015-04-24Fix typoDJ Delorie1-1/+1
2015-04-24Change msp430 emulation to msp430elfDJ Delorie6-9/+19
2015-04-24[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.Richard Earnshaw24-114/+98
2015-04-24Skip the compressed1d test for targets which do not use the elf32.em linker e...Nick Clifton2-0/+7
2015-04-24Correct ld-elf/compressed1e.d to use notarget and for cris-elf, not cris-*.Hans-Peter Nilsson2-1/+6
2015-04-23Xfail cris and frv for ld-elf/compressed1e.dH.J. Lu2-0/+7
2015-04-23Delay setting up compressed debug section namesH.J. Lu3-0/+24
2015-04-23Don't change compressed input debug section namesH.J. Lu2-0/+8
2015-04-23Accept odd result in ld-powerpc/tocnovar testcaseAlan Modra2-1/+2
2015-04-23Align .TOC. for PowerPC64Alan Modra28-132/+164
2015-04-22Rewrite relro adjusting codeAlan Modra6-42/+50
2015-04-22i386: Allow copy relocs for building PIEH.J. Lu15-0/+218
2015-04-20Don't hardcode offset of .shstrtab sectionH.J. Lu27-26/+55
2015-04-15Mention --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]H.J. Lu2-0/+8
2015-04-14Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]H.J. Lu13-1/+253
2015-04-15xfail pr18223 test for tic6xAlan Modra2-0/+5
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