Age | Commit message (Collapse) | Author | Files | Lines |
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bfd/
PR ld/17773
* elflink.c (bfd_elf_final_link): Assign the file position for
the symbol string table only there are symbols to be emitted.
ld/testsuite/
PR ld/17773
* ld-elf/binutils.exp (binutils_test): Add an optional
readelf_options. Replace -l with $readelf_options. Add a
gap test.
* ld/testsuite/ld-elf/gap.s: New file.
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At some stage someone fixed a bug in ld -r output, preserving
SHF_INFO_LINK from input objects. These two tests expected the old
wrong output.
* ld-sh/sh64/crangerel1.rd: Update.
* ld-sh/sh64/crangerel2.rd: Update.
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*** bfd/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_ABI_VFP_args value and replace hardcoded values by enum
values.
(elf32_arm_post_process_headers): Set e_flags in ELF header
as hard float only when Tag_ABI_VFP_args is 1, using new enum
value AEABI_VFP_args_vfp to check that.
*** binutils/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".
*** gdb/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
Tag_ABI_VFP_args. Also replace hardcoded values by enum values
in the switch handling the different values of Tag_ABI_VFP_args.
*** gold/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
header as hard float only when Tag_ABI_VFP_args is 1, using new
enum value AEABI_VFP_args_vfp to check that.
(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
value and replace hardcoded values by enum values.
*** include/elf/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
values.
*** ld/testsuite/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-2.attr: Likewise.
* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
Tag_ABI_VFP_args.
* ld-arm/attr-merge-4b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-6a.s: Likewise.
* ld-arm/attr-merge-6b.s: Likewise.
* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
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Have the assembler prepare for linker relaxation by default. This
means that users will be able to make use of linker relaxation without
having to adjust the assembler flags, this can make life easier when
compiling libraries.
Having this on by default in the assembler should make no difference to
the assembler code produced, however, some of the debug information will
be slightly less compressed.
A few tests needed to be updated as a result of this change as they
relied on linker relaxation support being off by default.
I've tightened up the definition of which sections can be relaxed on AVR
as part of this commit, the assembler used to think that all
non-debugging sections could be relaxed, when in reality only code
sections can be relaxed for AVR. The previous definition was not
dangerous, just over cautious. The new tighter definition allows an
extra test (gas/testsuite/gas/all/forward.d) to continue to pass.
gas/ChangeLog:
* config/tc-avr.c (struct avr_opt_s): Change link_relax to
no_link_relax, extend comment.
(enum options): Add new OPTION_NO_LINK_RELAX.
(md_longopts): Add entry for -mno-link-relax.
(md_parse_option): Handle OPTION_NO_LINK_RELAX, and update
OPTION_LINK_RELAX.
(md_begin): Initialise linkrelax from no_link_relax.
(md_show_usage): Include -mno-link-relax option.
(relaxable_section): Only allocatable code sections can be
relaxed.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define.
gas/testsuite/ChangeLog:
* gas/all/gas.exp: Test will not pass on AVR due to linker
relaxation support.
* gas/avr/noreloc_withoutrelax.d: Add -mno-link-relax option.
* gas/avr/link-relax-elf-flag-clear.d: Likewise.
ld/testsuite/ChangeLog:
* ld/testsuite/ld-avr/relax-elf-flags-02.d: Add -mno-link-relax
option.
* ld/testsuite/ld-avr/relax-elf-flags-03.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-04.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-05.d: Likewise.
* ld/testsuite/ld-avr/relax-elf-flags-06.d: Likewise.
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If no object files have .eh_frame, but some shared library does, then
ld creates a .eh_frame_hdr section using the shared library bfd. This
is silly since shared library .eh_frame sections don't contribute to
the output .eh_frame and thus no .eh_frame_hdr is needed.
Also, the bfd section list and count is cleared for shared libraries,
and a zero section count used as a flag in lang_check to omit a call
to bfd_merge_private_bfd_data for shared libraries. If we create a
section on a shared lib bfd then ld will wrongly attempt to merge the
shared library private bfd data.
PR 17742
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Exclude
shared libraries in loop looking for .eh_frame sections.
Similarly for build-id loop.
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* ld-scripts/defined6.s,
* ld-scripts/defined6.t,
* ld-scripts/defined6.d: New test.
* ld-scripts/defined.exp: Run it.
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The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
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or maybe not just yet, but this is better than a FIXME.
* ldexp.c (update_definedness): Return false if script symbol is
redefining a strong symbol in an object.
(exp_fold_tree_1 <etree_assign>): Set up for reporting a multiple
definition error, but for now leave disabled.
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Trying to use the SEC_LINKER_CREATED section flag to determine whether
a symbol is linker defined fails to work on targets like alpha that
define special SEC_COMMON sections. These might contain symbols that
originated in an object file.
include/
* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add
linker_def.
bfd/
* elflink.c (_bfd_elf_define_linkage_sym): Set linker_def.
* linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def
for CDEF, DEF, DEFW, COM.
ld/
* ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def.
ld/testsuite/
* ld-powerpc/sdabase.s,
* ld-powerpc/sdabase.t,
* ld-powerpc/sdabase.d: New test.
* ld-powerpc/sdabase2.t,
* ld-powerpc/sdabase2.d: New test.
* ld-powerpc/powerpc.exp: Run them.
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This:
int end[100000];
int main(void) { end[99999] = 0; return 0; }
should not segfault.
ld/
* ldexp.c (exp_fold_tree_1 <etree_provide>): Leave bfd_link_hash_common
symbols alone.
ld/testsuite/
* ld-elf/endsym.s, *ld-elf/endsym.d: New test.
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The old code missed testing bfd_link_hash_undefweak, and wrongly
excluded bfd_link_hash_common symbols. It is also clearer to invert
the set of enum bfd_link_hash_type values tested.
bfd_link_hash_indirect and bfd_link_hash_warning will never appear
here.
* ldexp.c (update_definedness): Correct logic setting by_object.
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This moves support code for DEFINED to ldexp.c where it is used,
losing the lang_ prefix on identifiers. Two new functions are needed
to initialize and clean up to hash table, but other than that there
are no functional changes here.
* ldexp.c (struct definedness_hash_entry, definedness_table)
(definedness_newfunc, symbol_defined, update_definedness): Move
and rename from..
* ldlang.h (struct lang_definedness_hash_entry): ..here,..
* ldlang.c (lang_definedness_table, lang_definedness_newfunc)
(lang_symbol_defined, lang_update_definedness): ..and here.
* ldexp.c (ldexp_init, ldexp_finish): New functions, extracted from..
* ldlang.c (lang_init, lang_finish): ..here.
* ldexp.h (ldexp_init, ldexp_finish): Declare.
* ldlang.h (lang_symbol_defined, lang_update_definedness): Delete.
* ldmain.c (main): Call ldexp_init and ldexp_finish.
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ld/testsuite/
* ld-mips-elf/attr-gnu-4-00.d: Relax check for ISA extension.
* ld-mips-elf/attr-gnu-4-01.d: Likewise.
* ld-mips-elf/attr-gnu-4-02.d: Likewise.
* ld-mips-elf/attr-gnu-4-03.d: Likewise.
* ld-mips-elf/attr-gnu-4-08.d: Likewise.
* ld-mips-elf/attr-gnu-4-10.d: Likewise.
* ld-mips-elf/attr-gnu-4-11.d: Likewise.
* ld-mips-elf/attr-gnu-4-18.d: Likewise.
* ld-mips-elf/attr-gnu-4-20.d: Likewise.
* ld-mips-elf/attr-gnu-4-22.d: Likewise.
* ld-mips-elf/attr-gnu-4-28.d: Likewise.
* ld-mips-elf/attr-gnu-4-30.d: Likewise.
* ld-mips-elf/attr-gnu-4-33.d: Likewise.
* ld-mips-elf/attr-gnu-4-38.d: Likewise.
* ld-mips-elf/attr-gnu-4-44.d: Likewise.
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ld/testsuite/
* ld-mips-elf/mips-elf.exp: Update undefweak-overflow tests.
* ld-mips-elf/undefweak-overflow-n32.d: Remove.
* ld-mips-elf/undefweak-overflow-n64.d: Likewise.
* ld-mips-elf/undefweak-overflow.s: Set mips64r6, noreorder and
add a label to mark the micromips region.
* ld-mips-elf/undefweak-overflow.d: Update expected output.
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When there is a weak symbol with a real definition, the processor
independent code will have arranged for us to see the real definition
first. We need to copy the needs_copy bit from the real definition and
check it when allowing copy reloc in PIE.
bfd/
PR ld/17689
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add needs_copy.
Change has_bnd_reloc to bit field.
(elf_x86_64_link_hash_newfunc): Initialize needs_copy and
has_bnd_reloc to 0.
(elf_x86_64_check_relocs): Set has_bnd_reloc to 1 instead
of TRUE.
(elf_x86_64_adjust_dynamic_symbol): Copy needs_copy from the
real definition to a weak symbol.
(elf_x86_64_allocate_dynrelocs): Also check needs_copy of a
weak symbol for PIE when discarding space for relocs against
symbols which turn out to need copy relocs.
(elf_x86_64_relocate_section): Also check needs_copy of a
weak symbol for PIE with copy reloc.
ld/testsuite/
PR ld/17689
* ld-x86-64/pr17689.out: New file.
* ld-x86-64/pr17689.rd: Likewise.
* ld-x86-64/pr17689a.c: Likewise.
* ld-x86-64/pr17689b.S: Likewise.
* ld-x86-64/x86-64.exp: Run PR ld/17689 tests.
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Removes a bunch of unused functions from libbfd when building ELF or
AOUT. Split off the bits we need externally when not building a COFF
target into coff-bfd.c and coff-bfd.h.
bfd/
* Makefile.am (BFD32_LIBS, BFD32_LIBS_CFILES): Remove dwarf2
and coffgen. Add coff-bfd. Sort.
(BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add coffgen and dwarf2.
* bfd-in.h (bfd_coff_get_syment, bfd_coff_get_auxent): Delete.
(struct coff_comdat_info, bfd_coff_get_comdat_section): Delete.
* coffgen.c (coff_symbol_from): Move to coff-bfd.h as macro,
without unused param. Update uses.
(bfd_coff_get_comdat_section): Move to coff-bfd.h as macro.
(bfd_coff_get_syment, bfd_coff_get_auxent): Move to coff-bfd.c.
* libcoff-in.h: #include "coff-bfd.h".
(struct coff_section_tdata, coff_section_data): Move to coff-bfd.h.
(coff_symbol_from): Delete.
* coff-bfd.c: New file.
* coff-bfd.h: New file.
* coff-i386.c: Update coff_symbol_from occurrences.
* coff-i960.c: Likewise.
* coff-m68k.c: Likewise.
* coff-sh.c: Likewise.
* coff-x86_64.c: Likewise.
* coffcode.h: Likewise.
* pe-mips.c: Likewise.
* configure.ac (elf): Add dwarf2.lo.
(coffgen, coff, ecoff, xcoff): Define. Use when mapping bfd
target vectors to .o files. Add dwarf2 for mach-o targets.
Fix the sh target FIXME.
* po/SRC-POTFILES.in: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* bfd-in2.h: Regenerate.
* libcoff.h: Regenerate.
binutils/
* objdump.c: #include "coff-bfd.h".
ld/
* ldmisc.c: #include "coff-bfd.h"
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ld/
* configure.tgt: Add Visium support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32visium.c.
(eelf32visium.c): New rule.
* Makefile.in: Regenerate.
* emulparams/elf32visium.sh: New file.
* scripttempl/visium.sc: Likewise.
ld/testsuite/
* lib/ld-lib.exp (check_shared_lib_support): Return 0 for Visium.
* ld-visium/: New directory.
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bfd/
PR 17666
* elflink.c: Include bfd_stdint.h.
(cmp_ext32l_r_offset, cmp_ext32b_r_offset,
cmp_ext64l_r_offset, cmp_ext64b_r_offset): New functions.
(elf_link_adjust_relocs): Sort relocs. Free reloc hashes after
sorting invalidates.
ld/testsuite/
* ld-powerpc/vxworks-relax.rd: Update for reloc sorting.
* ld-powerpc/vxworks-relax-2.rd: Likewise.
* ld-sh/sh64/reldl32.rd: Likewise.
* ld-sh/sh64/reldl64.rd: Likewise.
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* ld-x86-64/copyreloc-main.c: Removed.
* ld-x86-64/copyreloc-main.S: New.
* ld-x86-64/x86-64.exp: Replace copyreloc-main.c with
copyreloc-main.S.
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This patch allows copy relocs for non-GOT pc-relative relocation in PIE.
bfd/
* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Always
allow copy relocs for building executables.
(elf_x86_64_check_relocs): Allow copy relocs for non-GOT
pc-relative relocation in shared object.
(elf_x86_64_adjust_dynamic_symbol): Allocate copy relocs for
PIE.
(elf_x86_64_relocate_section): Don't copy a pc-relative
relocation into the output file if the symbol needs copy reloc.
ld/testsuite/
* ld-x86-64/copyreloc-lib.c: New file.
* ld-x86-64/copyreloc-main.c: Likewise.
* ld-x86-64/copyreloc-main.out: Likewise.
* ld-x86-64/copyreloc-main1.rd: Likewise.
* ld-x86-64/copyreloc-main2.rd: Likewise.
* ld-x86-64/x86-64.exp: Run copyreloc tests.
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check for overflow.
In MIPS the relocation calculation only ignores the overflow checks for undefined
weak symbols on relocations associated with j/jal. This patch extends this to
the relocations used by the: b* instructions; pc/gp relative symbol offsets; and the
lwpc/ldpc MIPS r6 instructions.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Only check for overflow
on non-weak undefined symbols.
ld/testsuite/
* ld-mips-elf/mips-elf.exp: Add in undefined weak overflow tests for
o32, n32 and n64.
* ld-mips-elf/undefweak-overflow.s: New test.
* ld-mips-elf/undefweak-overflow.d: New test.
* ld-mips-elf/undefweak-overflow-n32.d: New test.
* ld-mips-elf/undefweak-overflow-n64.d: New test.
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PR ld/16452
PR ld/16457
* ld-elf/pr16452.map: New file.
* ld-elf/pr16452.od: Likewise.
* ld-elf/pr16452a.c: Likewise.
* ld-elf/pr16452b.c: Likewise.
* ld-elf/pr16457.od: Likewise.
* ld-elf/shared.exp (build_tests): Add tests for PR ld/16452 and
PR ld/16457.
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* ld-mips-elf/got-vers-1.rd: Add symbol version string to
versioned symbol names in dynamic relocation.
* ld-mips-elf/reloc-estimate-1.d: Likewise.
* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
* ld-mips-elf/tlslib-o32-ver.got: Likewise.
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* ld-alpha/tlsbin.dd: Updated for secureplt.
* ld-alpha/tlsbin.rd: Likewise.
* ld-alpha/tlsbin.sd: Likewise.
* ld-alpha/tlsbinr.dd: Likewise.
* ld-alpha/tlsbinr.rd: Likewise.
* ld-alpha/tlspic.dd: Likewise.
* ld-alpha/tlspic.rd: Likewise.
* ld-alpha/tlspic.sd: Likewise.
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Both readelf/objdump know how to get symbol version string for dynamic
symbols. This patch extracts this functionality into a separate
function and uses it to add symbol version string to versioned symbol
names when dumping dynamic relocations.
bfd/
PR binutils/16496
* elf-bfd.h (bfd_elf_get_symbol_version_string): New.
* elf.c (bfd_elf_get_symbol_version_string): New. Extracted
from bfd_elf_print_symbol.
(bfd_elf_print_symbol): Use it.
binutils/
PR binutils/16496
* objdump.c (objdump_print_symname): Call
bfd_elf_get_symbol_version_string to get ELF symbol version
string. Append version string if needed.
* readelf.c (versioned_symbol_info): New enum.
(get_symbol_version_string): New. Extracted from
process_symbol_table.
(dump_relocations): Add a new argument to indicate if dynamic
symbol table is used. Use get_symbol_version_string to get
symbol version string for dynamic symbol. Append version string
if needed.
(process_relocs): Updated dump_relocations call.
(process_symbol_table): Use get_symbol_version_string.
ld/testsuite/
PR binutils/16496
* ld-cris/weakref3.d: Add symbol version string to versioned
symbol names in dynamic relocation.
* ld-cris/weakref4.d: Likewise.
* ld-elfvers/vers24.rd: Likewise.
* ld-elf/pr16496a.c: New file.
* ld-elf/pr16496a.map: Likewise.
* ld-elf/pr16496b.c: Likewise.
* ld-elf/pr16496b.od: Likewise.
* ld-elf/shared.exp (build_tests): Add libpr16496a.so and
libpr16496b.so tests.
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When there are both PLT and GOT references to the same function symbol,
linker will create a GOTPLT slot for PLT entry and a GOT slot for GOT
reference. A run-time JUMP_SLOT relocation is created to update the
GOTPLT slot and a run-time GLOB_DAT relocation is created to update the
GOT slot. Both JUMP_SLOT and GLOB_DAT relocations will apply the same
symbol value to GOTPLT and GOT slots, respectively, at run-time.
This optimization combines GOTPLT and GOT slots into a single GOT slot
and removes the run-time JUMP_SLOT relocation. It replaces the regular
PLT entry:
indirect jump [GOTPLT slot]
push relocation index
jump PLT0
with an GOT PLT entry with an indirect jump via the GOT slot:
indirect jump [GOT slot]
nop
and resolves PLT reference to the GOT PLT entry.
We must avoid this optimization if pointer equality is needed since
we don't clear symbol value in this case and the dynamic linker won't
update the GOT slot. Otherwise, the resulting binary will get into an
infinite loop at run-time.
bfd/
* elf32-i386.c (elf_i386_got_plt_entry): New.
(elf_i386_pic_got_plt_entry): Likewise.
(elf_i386_link_hash_entry): Add plt_got.
(elf_i386_link_hash_table): Likewise.
(elf_i386_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_i386_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_i386_relocate_section): Also check the GOT PLT when
resolving R_386_PLT32.
(elf_i386_finish_dynamic_symbol): Use the GOT PLT if it is
available.
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add plt_got.
(elf_x86_64_link_hash_table): Likewise.
(elf_x86_64_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_x86_64_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_x86_64_relocate_section): Also check the GOT PLT when
resolving R_X86_64_PLT32.
(elf_x86_64_finish_dynamic_symbol): Use the GOT PLT if it is
available.
ld/
* emulparams/elf_i386.sh (TINY_READONLY_SECTION): New.
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Add .plt.got.
ld/testsuite/
* ld-i386/i386.exp: Add run-time relocation tests for plt-main.
* ld-i386/plt-main.rd: New file.
* ld-x86-64/plt-main-bnd.dd: Likewise.
* ld-x86-64/plt-main.rd: Likewise.
* ld-x86-64/x86-64.exp: Add run-time relocation tests for
plt-main.
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* libtool.m4: Updated from GCC trunk.
bfd/
* configure: Regenerated.
binutils/
* configure: Regenerated.
gas/
* configure: Regenerated.
gprof/
* configure: Regenerated.
ld/
* configure: Regenerated.
opcodes/
* configure: Regenerated.
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Alignment of plt stubs was broken, firstly because the option was
being dropped due to the alignment value not being set in the "params"
struct used in elf64-ppc.c, and secondly due to not calculating the
number of alignment boundary crossings correctly.
bfd/
* elf64-ppc.c (plt_stub_pad): Correct.
ld/
* ld.texinfo: Correct --plt-align documentation.
* emultempl/ppc64elf.em (plt_stub_align): Delete. Use and set
params.plt_stub_align instead.
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This patch adds tests for function and function pointer for i386.
* ld-i386/plt-lib.c: New file.
* ld-i386/plt-main.out: Likewise.
* ld-i386/plt-main1.c: Likewise.
* ld-i386/plt-main1.rd: Likewise.
* ld-i386/plt-main2.c: Likewise.
* ld-i386/plt-main2.rd: Likewise.
* ld-i386/plt-main3.c: Likewise.
* ld-i386/plt-main3.rd: Likewise.
* ld-i386/plt-main4.c: Likewise.
* ld-i386/plt-main4.rd: Likewise.
* ld-i386/plt-main5.c: Likewise.
* ld-i386/i386.exp: Run plt-main tests.
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* ld-x86-64/x86-64.exp: Run plt-main test with -pie.
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gas/
2014-11-21 Terry Guo <terry.guo@arm.com>
* config/tc-arm.c (md_assemble): Do not consider relaxation.
(md_convert_frag): Test and set target arch attribute accordingly.
(aeabi_set_attribute_string): Turn it into a global function.
* config/tc-arm.h (md_post_relax_hook): Enable it for ARM target.
(aeabi_set_public_attributes): Declare it.
gas/testsuite/
2014-11-21 Terry Guo <terry.guo@arm.com>
* gas/arm/attr-arch-assumption.d: New file.
* gas/arm/attr-arch-assumption.s: Likewise.
ld/testsuite/
2014-11-21 Terry Guo <terry.guo@arm.com>
* ld-arm/tls-longplt-lib.s: Require ARMv6T2.
* ld-arm/tls-longplt.s: Likewise.
* ld-arm/tls-longplt-lib.d: Updated.
* ld-arm/tls-longplt.d: Likewise.
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include/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro.
(FPU_VFP_V5D16): Likewise.
(FPU_VFP_V5_SP_D16): Likewise.
(FPU_ARCH_VFP_V5D16): Likewise.
(FPU_ARCH_VFP_V5_SP_D16): Likewise.
bfd/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5.
binutils/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5.
gas/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* config/tc-arm.c (fpu_vfp_ext_armv8xd): New.
(arm_cpus): Support cortex-m7.
(arm_fpus): Support fpv5-sp-d16 and fpv5-d16.
(do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S
register only target like FPv5-SP-D16.
(do_neon_cvttb_1): Likewise.
(do_vfp_nsyn_fpv8): Likewise.
(do_vrint_1): Likewise.
(aeabi_set_public_attributes): Set proper FP arch for FPv5.
* doc/c-arm.texi: Document new cpu and fpu names for cortex-m7.
gas/testsuite/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* gas/arm/armv7e-m+fpv5-d16.s: New.
* gas/arm/armv7e-m+fpv5-d16.d: Likewise.
* gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise.
* gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.
ld/testsuite/ChangeLog:
2014-11-21 Terry Guo <terry.guo@arm.com>
* ld-arm/attr-merge-vfp-4-sp.s: New test source file.
* ld-arm/attr-merge-vfp-5-sp.s: Likewise.
* ld-arm/attr-merge-vfp-5.s: Likewise.
* ld-arm/attr-merge-vfp-8.d: New test.
* ld-arm/attr-merge-vfp-8r.d: Likewise.
* ld-arm/attr-merge-vfp-9.d: Likewise.
* ld-arm/attr-merge-vfp-9r.d: Likewise.
* ld-arm/attr-merge-vfp-10.d: Likewise.
* ld-arm/attr-merge-vfp-10r.d: Likewise.
* ld-arm/attr-merge-vfp-11.d: Likewise.
* ld-arm/attr-merge-vfp-11r.d: Likewise.
* ld-arm/attr-merge-vfp-12.d: Likewise.
* ld-arm/attr-merge-vfp-12r.d: Likewise.
* ld-arm/attr-merge-vfp-13.d: Likewise.
* ld-arm/attr-merge-vfp-13r.d: Likewise.
* ld-arm/attr-merge-vfp-14.d: Likewise.
* ld-arm/attr-merge-vfp-14r.d: Likewise.
* ld-arm/arm-elf.exp: Run the new tests.
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* ld-x86-64/pr17618.d: Don't run on x32.
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* ld-x86-64/plt-main1.rd: Updated for x32.
* ld-x86-64/plt-main2.rd: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
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This patch adds tests for function and function pointer.
* ld-x86-64/plt-lib.c: New file.
* ld-x86-64/plt-main.out: Likewise.
* ld-x86-64/plt-main1.c: Likewise.
* ld-x86-64/plt-main1.rd: Likewise.
* ld-x86-64/plt-main2.c: Likewise.
* ld-x86-64/plt-main2.rd: Likewise.
* ld-x86-64/plt-main3.c: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.c: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
* ld-x86-64/plt-main5.c: Likewise.
* ld-x86-64/x86-64.exp: Run plt-main tests.
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This patch makes sure that compiler won't optimize out loading function
into a stack variable.
* ld-ifunc/ifunc-main.c (get_bar): New function.
(main): Use it.
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* ld-ifunc/ifunc.exp: Run ifunc-main.
* ld-ifunc/ifunc-lib.c: New file.
* ld-ifunc/ifunc-main.c: Likewise.
* ld-ifunc/ifunc-main.out: Likewise.
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* lib/ld-lib.exp (check_ifunc_available): New.
* ld-ifunc/ifunc.exp: Run IFUNC run-time tests only if IFUNC
is supported.
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bfd/ChangeLog
2014-11-20 Terry Guo <terry.guo@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Skip if input bfd
hasn't attribute section.
ld/testsuite/ChangeLog:
2014-11-20 Terry Guo <terry.guo@arm.com>
* ld-arm/attr-merge-nosection-1.d: New file.
* ld-arm/attr-merge-nosection-1a.s: Likewise.
* ld-arm/attr-merge-nosection-1b.s: Likewise.
* ld-arm/arm-elf.exp: Include the new test.
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This patch checks PC-relative offset overflow in pushq instruction in
x86-64 PLT entry.
bfd/
PR ld/17618
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Check
PC-relative offset overflow in PLT entry.
ld/testsuite/
PR ld/17618
* ld-x86-64/x86-64.exp: Run pr17618 for Linux target.
* ld-x86-64/pr17618.d: New file.
* ld-x86-64/pr17618.s: Likewise.
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* ld-x86-64/mpx.exp: Always run mpx3 and mpx4 tests in 64-bit.
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This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND
prefix in PLT entries. It also updated Linux/x86-64 assembler not to
generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations.
bfd/
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only
for -z bndplt.
gas/
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* config/tc-i386-intel.c (i386_operator): Remove last argument
from lex_got call.
* config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
list. Return always BFD_RELOC_32_PCREL.
* (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
* (output_jump): Update call to reloc accordingly.
* (output_interseg_jump): Likewise.
* (output_disp): Likewise.
* (output_imm): Likewise.
* (x86_cons_fix_new): Likewise.
* (lex_got): Remove bnd_prefix from parameters' list in macro and
declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
* (x86_cons): Update call to lex_got accordingly.
* (i386_immediate): Likewise.
* (i386_displacement): Likewise.
* (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
BFD_RELOC_X86_64_PC32_BND.
* (tc_gen_reloc): Likewise.
include/
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* bfdlink.h (struct bfd_link_info): Add bndplt.
ld/
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64.
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle
"-z bndplt" if BNDPLT is yes.
(gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry.
* ld.texinfo: Add description for bndplt.
ld/testsuite/
2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
* testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
* testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly
sections.
* testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests.
* testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name.
* testsuite/ld-x86-64/mpx1c.rd: Likewise.
* testsuite/ld-x86-64/mpx2a.rd: Likewise.
* testsuite/ld-x86-64/mpx2c.rd: Likewise.
* testsuite/ld-x86-64/mpx3.dd: New file.
* testsuite/ld-x86-64/mpx3a.s: Likewise.
* testsuite/ld-x86-64/mpx3b.s: Likewise.
* testsuite/ld-x86-64/mpx4.dd: Likewise.
* testsuite/ld-x86-64/mpx4a.s: Likewise.
* testsuite/ld-x86-64/mpx4b.s: Likewise.
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Obsolete R_X86_64_GOTPLT64 and treat it the same as R_X86_64_GOT64.
bfd/
PR gas/17598
* elf64-x86-64.c (elf_x86_64_check_relocs): Treat
R_X86_64_GOTPLT64 the same as R_X86_64_GOT64.
(elf_x86_64_relocate_section): Likewise.
gas/
PR gas/17598
* config/tc-i386.c (reloc): Support BFD_RELOC_X86_64_GOTPLT64.
gas/testsuite/
PR gas/17598
* gas/i386/reloc64.s: Add @gotplt check.
* gas/i386/reloc64.d: Updated.
* gas/i386/reloc64.l: Likewise.
ld/testsuite/
PR gas/17598
* ld-x86-64/x86-64.exp: Run gotplt1.
* ld-x86-64/gotplt1.d: New file.
* ld-x86-64/gotplt1.s: Likewise.
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ld/testsuite/
* lib/ld-lib.exp (run_ld_link_exec_tests): Append board_cflags if gcc driver
used as link tool.
(run_cc_link_exec_tests): Likewise.
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Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX
prefix even if it isn't required by destination register. Otherwise
linker can't safely perform IE -> LE optimization.
bfd/
PR ld/17482
* elf64-x86-64.c (elf_x86_64_relocate_section): Update comments
for IE->LE transition.
gas/
PR ld/17482
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
for structions with R_X86_64_GOTTPOFF relocation for x32 if needed.
gas/testsuite/
PR ld/17482
* gas/i386/ilp32/x32-tls.d: New file.
* gas/i386/ilp32/x32-tls.s: Likewise.
ld/testsuite/
PR ld/17482
* ld-x86-64/tlsie4.dd: Updated.
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bfd/
* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
and E_MIPS_ARCH_64R6 support.
ld/testsuite/
* ld-mips-elf/abiflags-strip10-ph.d: New file.
* ld-mips-elf/mips-eld.exp: Run the new test.
gas/
* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
and INSN_ISA64R6 support.
gas/testsuite/
* gas/mips/elf_arch_mips32r6.d: New file.
* gas/mips/elf_arch_mips64r6.d: New file.
* gas/mips/mips.exp: Run the new tests.
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Nothing to see here, just the changed placement of section headers.
* emultempl/spu_icache.o_c: Regenerate.
* emultempl/spu_ovl.o_c: Regenerate.
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When performing linker relaxation, reduce the size of symbols that span
the deleted bytes. This ensures that, for example, function symbols
will have the correct size.
bfd/ChangeLog:
* elf32-avr.c (elf32_avr_relax_delete_bytes): During linker
relaxation, reduce the size of symbols that span the deleted
bytes.
ld/ChangeLog:
* testsuite/ld-avr/relax-02.d: Update to check size of symbols has
changed.
* testsuite/ld-avr/relax-03.d: Likewise.
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