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2016-09-30Fix pr20528 testsuiteAlan Modra2-0/+6
PR ld/20528 * testsuite/ld-elf/pr20528a.d: xfail generic elf targets. Allow multiple .text sections for hppa-linux. * testsuite/ld-elf/pr20528b.d: Likewise.
2016-09-29Don't merge 2 sections with different SHF_EXCLUDEH.J. Lu4-0/+30
SEC_EXCLUDE is ignored when doing a relocatable link. But we can't merge 2 input sections with the same name when only one of them has SHF_EXCLUDE. PR ld/20528 * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't merge 2 sections with different SHF_EXCLUDE. * testsuite/ld-elf/pr20528a.d: New file. * testsuite/ld-elf/pr20528a.s: Likewise. * testsuite/ld-elf/pr20528b.d: Likewise. * testsuite/ld-elf/pr20528b.s: Likewise.
2016-09-28[ARM] PR ld/20608 Relocation truncated to fit: R_ARM_THM_JUMP24 for ↵Christophe Lyon5-0/+206
relocation to PLT entry 2016-09-28 Christophe Lyon <christophe.lyon@linaro.org> PR ld/20608 bfd/ * elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT Thumb-ARM stub is too far. ld * testsuite/ld-arm/arm-elf.exp: Handle new testcase. * testsuite/ld-arm/farcall-mixed-app2.d: New file. * testsuite/ld-arm/farcall-mixed-app2.r: Likewise. * testsuite/ld-arm/farcall-mixed-app2.s: Likewise. * testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
2016-09-26PowerPC .gnu.attributesAlan Modra17-40/+11
This patch extends Tag_GNU_Power_ABI_FP to cover long double ABIs, makes the assembler warn about undefined tag values, and removes similar warnings from the linker. I think it is better to not warn in the linker about undefined tag values as future extensions to the tags then won't result in likely bogus warnings. This is consistent with the fact that an older linker won't warn on an entirely new tag. include/ * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment. bfd/ * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function. (ppc_elf_merge_obj_attributes): Use it. Don't copy first file attributes, merge them. Don't warn about undefined tag bits, or copy unknown values to output. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call _bfd_elf_ppc_merge_fp_attributes. binutils/ * readelf.c (display_power_gnu_attribute): Catch truncated section for all powerpc attributes. Display long double ABI. Don't capitalize words, except for names. Show known bits of tag values when some unknown bits are present. Whitespace fixes. gas/ * config/tc-ppc.c (ppc_elf_gnu_attribute): New function. (md_pseudo_table <ELF>): Handle "gnu_attribute". ld/ * testsuite/ld-powerpc/attr-gnu-4-4.s: Delete. * testsuite/ld-powerpc/attr-gnu-4-14.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-24.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-34.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-41.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning. * testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output. * testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise. * testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
2016-09-23Delete relocations associatesd with deleted exidx entries.Akihiko Odaki1-2/+16
PR ld/20595 ld * testsuite/ld-arm/unwind-4.d: Add -q option to linker command line and -r option to objdump command line. Match emitted relocs to make sure that superflous relocs are not generated. bfd * elf-bfd.h (struct elf_backend_data): Add elf_backend_count_output_relocs callback to count relocations in the final output. * elf-arm.c (elf32_arm_add_relocation): Deleted. (elf32_arm_write_section): Move additional relocation to emit_relocs. (elf32_arm_count_output_relocs): New function. (emit_relocs): New function. (elf32_arm_emit_relocs): New function. (elf32_arm_vxworks_emit_relocs): New function. (elf_backend_emit_relocs): Updated to use the new functions. (elf_backend_count_output_relocs): New define. * bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count to the relocation count. (_bfd_elf_link_size_reloc_section): Use callback to count the relocations which will be in output. (_bfd_elf_default_count_output_relocs): New function. * bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
2016-09-23S/390: Move start of 64 bit binaries from 2GB to 256MB.Andreas Krebbel2-3/+4
ld/ChangeLog: 2016-09-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * emulparams/elf64_s390.sh: Change TEXT_START_ADDR to 256MB. * testsuite/ld-s390/tlsbin_64.dd: Adjust testcase accordingly. * testsuite/ld-s390/tlsbin_64.rd: Likewise.
2016-09-21[AArch64] Print spaces after commas in addressesRichard Sandiford40-92/+92
I got an off-list request to make the AArch64 disassembler print spaces after commas in addresses. This patch does that. The same code is used to print operands in "did you mean" errors, so to keep things consistent, the patch also prints spaces between operands in those messages. opcodes/ * aarch64-opc.c (print_immediate_offset_address): Print spaces after commas in addresses. (aarch64_print_operand): Likewise. gas/ * config/tc-aarch64.c (print_operands): Print spaces between operands. * testsuite/gas/aarch64/ilp32-basic.d: Expect spaces after "," in addresses. * testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise. * testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise. * testsuite/gas/aarch64/ldst-reg-pair.d: Likewise. * testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise. * testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise. * testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. * testsuite/gas/aarch64/reloc-insn.d: Likewise. * testsuite/gas/aarch64/sve.d: Likewise. * testsuite/gas/aarch64/symbol.d: Likewise. * testsuite/gas/aarch64/system.d: Likewise. * testsuite/gas/aarch64/tls-desc.d: Likewise. * testsuite/gas/aarch64/sve-invalid.l: Expect spaces after "," in suggested alternatives. * testsuite/gas/aarch64/verbose-error.l: Likewise. ld/ * testsuite/ld-aarch64/emit-relocs-28.d: Expect spaces after "," in addresses. * testsuite/ld-aarch64/emit-relocs-301-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-301.d: Likewise. * testsuite/ld-aarch64/emit-relocs-302-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-302.d: Likewise. * testsuite/ld-aarch64/emit-relocs-310-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-310.d: Likewise. * testsuite/ld-aarch64/emit-relocs-313.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516.d: Likewise. * testsuite/ld-aarch64/emit-relocs-531.d: Likewise. * testsuite/ld-aarch64/emit-relocs-532.d: Likewise. * testsuite/ld-aarch64/emit-relocs-533.d: Likewise. * testsuite/ld-aarch64/emit-relocs-534.d: Likewise. * testsuite/ld-aarch64/emit-relocs-535.d: Likewise. * testsuite/ld-aarch64/emit-relocs-536.d: Likewise. * testsuite/ld-aarch64/emit-relocs-537.d: Likewise. * testsuite/ld-aarch64/emit-relocs-538.d: Likewise. * testsuite/ld-aarch64/erratum835769.d: Likewise. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/ifunc-7c.d: Likewise. * testsuite/ld-aarch64/tls-desc-ie.d: Likewise. * testsuite/ld-aarch64/tls-large-desc-be.d: Likewise. * testsuite/ld-aarch64/tls-large-desc.d: Likewise. * testsuite/ld-aarch64/tls-large-ie-be.d: Likewise. * testsuite/ld-aarch64/tls-large-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-all.d: Likewise. * testsuite/ld-aarch64/tls-relax-gd-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d: Likewise. * testsuite/ld-aarch64/tls-relax-gdesc-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise. * testsuite/ld-aarch64/tls-relax-large-desc-ie.d: Likewise. * testsuite/ld-aarch64/tls-tiny-desc.d: Likewise. * testsuite/ld-aarch64/tls-tiny-gd.d: Likewise.
2016-09-21[AArch64] Add SVE condition codesRichard Sandiford2-8/+8
SVE defines new names for existing NZCV conditions, to reflect the result of instructions like PTEST. This patch adds support for these names. The patch also adds comments to the disassembly output to show the alternative names of a condition code. For example: cinv x0, x1, cc becomes: cinv x0, x1, cc // cc = lo, ul, last and: b.cc f0 <...> becomes: b.cc f0 <...> // b.lo, b.ul, b.last Doing this for the SVE names follows the practice recommended by the SVE specification and is definitely useful when reading SVE code. If the feeling is that it's too distracting elsewhere, we could add an option to turn it off. include/ * opcode/aarch64.h (aarch64_cond): Bump array size to 4. opcodes/ * aarch64-dis.c (remove_dot_suffix): New function, split out from... (print_mnemonic_name): ...here. (print_comment): New function. (print_aarch64_insn): Call it. * aarch64-opc.c (aarch64_conds): Add SVE names. (aarch64_print_operand): Print alternative condition names in a comment. gas/ * config/tc-aarch64.c (opcode_lookup): Search for the end of a condition name, rather than assuming that it will have exactly 2 characters. (parse_operands): Likewise. * testsuite/gas/aarch64/alias.d: Add new condition-code comments to the expected output. * testsuite/gas/aarch64/beq_1.d: Likewise. * testsuite/gas/aarch64/float-fp16.d: Likewise. * testsuite/gas/aarch64/int-insns.d: Likewise. * testsuite/gas/aarch64/no-aliases.d: Likewise. * testsuite/gas/aarch64/programmer-friendly.d: Likewise. * testsuite/gas/aarch64/reloc-insn.d: Likewise. * testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s: New test. ld/ * testsuite/ld-aarch64/emit-relocs-280.d: Match branch comments. * testsuite/ld-aarch64/weak-undefined.d: Likewise.
2016-09-14Fix ld --gc-section segfault with ARMv8-M entry function in absolute sectionThomas Preud'homme2-0/+12
bfd/ 2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section not already marked. ld/ 2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com> * testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security Extensions entry functions in absolute section. * testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
2016-09-14[ARC] Fix parsing dtpoff relocation expression.Claudiu Zissulescu5-0/+52
The assembler accepts dtpoff complex relocation expression like identifier@dtpoff + const. However, it doesn't accept an expression such as identifier@dtpoff@base + const. This patch solves this issue, and adds a number of tests. ld/ 2016-09-14 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/tls-dtpoff.dd: New file. * testsuite/ld-arc/tls-dtpoff.rd: Likewise. * testsuite/ld-arc/tls-dtpoff.s: Likewise. * testsuite/ld-arc/tls-relocs.ld: Likewise. * testsuite/ld-arc/arc.exp: Add new tdpoff test. gas/ 2016-09-14 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/tls-relocs2.d: New file. * testsuite/gas/arc/tls-relocs2.s: Likewise. * config/tc-arc.c (tokenize_arguments): Accept offsets when base is used.
2016-09-06Resolve size relocation with copy relocationH.J. Lu3-0/+22
We can resolve size relocation against symbol which needs copy relocation when building executable. bfd/ PR ld/20550 * elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size relocation with copy relocation when building executable. ld/ PR ld/20550 * testsuite/ld-x86-64/pr20550a.s: New file. * testsuite/ld-x86-64/pr20550b.s: Likewise. * testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for PR ld/20550.
2016-09-06Fix PR ld/20545 - relaxation bugs in avr backendSenthil Kumar Selvaraj4-0/+43
Prior to the patch, addends for relocs were being adjusted even if they went beyond an alignment boundary. This is wrong - to preserve alignment constraints, the relaxation logic adds as many padding bytes at the alignment boundary as was deleted, so addends beyond the boundary should not be adjusted. avr-prop-7.s reproduces this scenario. Also, prior to this patch, the relaxation logic assumed that the addr parameter pointed to the middle of the instruction to be deleted, and that addr - count would therefore be the shrinked instruction's address. This is true when actually shrinking instructions. The alignment constraints handling logic also invokes the same logic though, with addr as the starting offset of padding bytes and with count as the number of bytes to be deleted. Calculating the shrinked insn's address as addr - count is obviously wrong in this case - that offset would point to count bytes before the last non-padded byte. avr-prop-8.s reproduces this scenario. To fix scenario 1, the patch adds an additional check to ensure reloc addends aren't adjusted if they cross a shrink boundary. The shrink boundary is either the section size or an alignment boundary. Addends pointing at an alignment boundary don't need to be adjusted, as padding would occur and keep the boundary the same. Addends pointing at section size need to be adjusted though, as no padding occurs and the section size itself would get decremented. The patch records whether padding occured (did_pad) and uses that to detect and handle this condition. To fix scenario 2, the patch adds an additional parameter (delete_shrinks_insn) to elf32_avr_relax_delete_bytes to distinguish instruction bytes deletion from padding bytes deletion. It then uses that to correctly set shrinked_insn_address. bfd/ChangeLog: 2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> PR ld/20545 * elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter delete_shrinks_insn. Modify computation of shrinked_insn_address. Compute shrink_boundary and adjust addend only if addend_within_shrink_boundary. (elf32_avr_relax_section): Modify calls to elf32_avr_relax_delete_bytes to pass extra parameter. ld/ChangeLog: 2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> PR ld/20545 * testsuite/ld-avr/avr-prop-7.d: New test. * testsuite/ld-avr/avr-prop-7.s: New test. * testsuite/ld-avr/avr-prop-8.d: New test. * testsuite/ld-avr/avr-prop-8.s: New test.
2016-09-02Limit pr20513c/pr20513d to Linux and GNU targetsH.J. Lu2-0/+2
* testsuite/ld-elf/pr20513c.d: Limit to *-*-linux* and *-*-gnu* targets. * testsuite/ld-elf/pr20513d.d: Likewise.
2016-09-01Add tests for PR ld/20513H.J. Lu8-0/+72
PR ld/20513 * testsuite/ld-elf/pr20513a.d: New file. * testsuite/ld-elf/pr20513a.s: Likewise. * testsuite/ld-elf/pr20513b.d: Likewise. * testsuite/ld-elf/pr20513b.s: Likewise. * testsuite/ld-elf/pr20513c.d: Likewise. * testsuite/ld-elf/pr20513d.d: Likewise. * testsuite/ld-elf/pr20513e.d: Likewise. * testsuite/ld-elf/pr20513f.d: Likewise.
2016-08-31Adjust VLE testsuiteAlan Modra5-107/+97
To suit f7d69005. * testsuite/ld-powerpc/vle-multiseg-1.d: Adjust to suit segment change. * testsuite/ld-powerpc/vle-multiseg-2.d: Likewise. * testsuite/ld-powerpc/vle-multiseg-3.d: Likewise. * testsuite/ld-powerpc/vle-multiseg-6.d: Likewise. * testsuite/ld-powerpc/vle-reloc-2.d: Likewise.
2016-08-30Made tests to XFAIL for arc*-*-elf*.Cupertino Miranda2-0/+2
ld/ChangeLog: Cupertino Miranda <cmiranda@synopsys.com> * testsuite/ld-arc/tls_gs-01.d: Set to XFAIL on arc*-*-elf*. * testsuite/ld-arc/tls_ie-01.d: Likewise.
2016-08-29Run PR ld/19784 tests only if ifunc attribute worksH.J. Lu1-38/+47
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19784 tests only if ifunc attribute works.
2016-08-29i386: Issue an error on non-PIC call to IFUNC in PIC objectH.J. Lu12-44/+58
On i386, IFUNC function must be called via PLT. Since PLT in PIC object uses EBX register, R_386_PLT32 relocation must be used to call IFUNC function even when IFUNC function is defined locally. Linker should issue an error when R_386_PC32 relocation is used to call IFUNC function. Since PR ld/19784 tests doesn't use PLT relocation to local IFUNC function, they are moved to the x86-64 test directory. bfd/ PR ld/14961 PR ld/20515 * elf32-i386.c (elf_i386_check_relocs): Issue an error when R_386_PC32 relocation is used to call IFUNC function in PIC object. ld/ PR ld/14961 PR ld/20515 * testsuite/ld-i386/i386.exp: Run pr20515. * testsuite/ld-i386/pr20515.d: New file. * testsuite/ld-i386/pr20515.s: Likewise. * testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC function. * testsuite/ld-ifunc/ifunc-14c.s: Likewise. * testsuite/ld-ifunc/ifunc-2-i386.s: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise. * testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ... * testsuite/ld-x86-64/x86-64.exp: Here. * testsuite/ld-ifunc/pr19784a.c: Moved to ... * testsuite/ld-x86-64/pr19784a.c: Here. * testsuite/ld-ifunc/pr19784b.c: Moved to ... * testsuite/ld-x86-64/pr19784b.c: Here. * testsuite/ld-ifunc/pr19784c.c: Moved to ... * testsuite/ld-x86-64/pr19784c.c: Here.
2016-08-26Dynamic TLS GOT entries would not be relocated.Cupertino Miranda2-0/+20
Forgot to set should_relocate to TRUE in case of GOT and TLS relocations of undefined symbols for shared libraries. In dynamic libraries if symbol is not known the instruction relocation would not be resolved to point to the respective .got entry. A test was created to detect similar future mistakes. bfd/ChangeLog: Cupertino Miranda <cmiranda@synopsys.com> * elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate to TRUE for GOT and TLS relocs. ld/ChangeLog: Cupertino Miranda <cmiranda@synopsys.com> * ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch. * ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
2016-08-26Content for TLS_IE_GOT not written to .got.Cupertino Miranda2-0/+19
When no dynamic relocation was generated the .got content would not be updated for the TLS_IE_GOT relocation addresses. bfd/ChangeLog: Cupertino Miranda <cmiranda@synopsys.com> * arc-got.h (relocate_fix_got_relocs_for_got_info): Fixed addresses in debug comments. Fixed address in .got related to TLS_IE_GOT dynamic relocation. ld/ChangeLog: Cupertino Miranda <cmiranda@synopsys.com> * testsuite/ld-arc/tls_ie-01.s: Added to verify associated fix. * testsuite/ld-arc/tls_ie-01.d: Likewise
2016-08-26Add support for stable secure gateway veneers addressesThomas Preud'homme9-2/+104
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for the input import library bfd. * bfd-in2.h: Regenerate. * elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd and new_cmse_stub_offset fields. (stub_hash_newfunc): Initialize stub_offset and stub_template_size to -1. (elf32_arm_add_stub): Likewise for stub_offset. (arm_new_stubs_start_offset_ptr): New function. (arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow empty SG veneers to have zero relocations. (arm_size_one_stub): Only initialize stub size and template information for non empty veneers. Do not update veneer section size if veneer already has an offset. (elf32_arm_create_stub): Return the stub entry pointer or NULL instead of a boolean indicating success or failure. (cmse_scan): Change stub_changed parameter into an integer pointer parameter cmse_stub_created to count the number of stub created and adapt to change of return value in elf32_arm_create_stub. (cmse_entry_fct_p): New function. (arm_list_new_cmse_stub): Likewise. (set_cmse_veneer_addr_from_implib): Likewise. (elf32_arm_size_stubs): Define cmse_stub_created, pass its address to cmse_scan instead of that of cmse_stub_changed to compute the number of stub created and use it to initialize stub_changed. Call set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change of return value in elf32_arm_create_stub. Use arm_stub_section_start_offset () if not NULL to initialize size of secure gateway veneers section. Initialize stub_offset of Cortex-A8 erratum fix to -1. Use ret to hold return value. (elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not NULL to initialize size of secure gateway veneers section. Adapt comment to stress the importance of zeroing veneer section content. (bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to initialize eponymous field in struct elf32_arm_link_hash_table. ld/ * emultempl/armelf.em (in_implib_filename): Declare and initialize new variable. (arm_elf_create_output_section_statements): Open import input library file for writing and pass resulting in_implib_bfd to bfd_elf32_arm_set_target_relocs. (PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option. (PARSE_AND_LIST_LONGOPTS): Define --in-implib option. (PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option. (PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case. * ld.texinfo (--cmse-implib): Update to mention --in-implib. (--in-implib): Document new option. * NEWS: Likewise. * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): add --defsym VER=1 to gas CLI. (Secure gateway import library generation: errors): Likewise. (Input secure gateway import library): New test. (Input secure gateway import library: no output import library): Likewise. (Input secure gateway import library: not an SG input import library): Likewise. (Input secure gateway import library: earlier stub section base): Likewise. (Input secure gateway import library: later stub section base): Likewise. (Input secure gateway import library: veneer comeback): Likewise. (Input secure gateway import library: entry function change): Likewise. * testsuite/ld-arm/cmse-implib.s: Add input import library testing. * testsuite/ld-arm/cmse-implib.rd: Update accordingly. * testsuite/ld-arm/cmse-new-implib.out: New file. * testsuite/ld-arm/cmse-new-implib.rd: Likewise. * testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise. * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise. * testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise. * testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise. * testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
2016-08-23Fix duplicate FAILs from ld testsuiteAlan Modra1-10/+4
* testsuite/lib/ld-lib.exp (run_cc_link_tests): Don't fail tests twice.
2016-08-19Place .shstrtab section after .symtab and .strtab, thus restoring ↵Nick Clifton100-187/+189
monotonically increasing section offsets. bfd * elf.c (assign_section_numbers): Assign number for the .shstrtab section after the symbol table and string table sections. binutils * testsuite/binutils-all/readelf.s: Adjust expected ordering of sections. * testsuite/binutils-all/readelf.s-64: Likewise. gas * testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected ordering of sections. * testsuite/gas/i386/x86-64-unwind.d: Likewise. * testsuite/gas/ia64/alias-ilp32.d: Likewise. * testsuite/gas/ia64/alias.d: Likewise. * testsuite/gas/ia64/group-1.d: Likewise. * testsuite/gas/ia64/group-2.d: Likewise. * testsuite/gas/ia64/secname-ilp32.d: Likewise. * testsuite/gas/ia64/secname.d: Likewise. * testsuite/gas/ia64/unwind-ilp32.d: Likewise. * testsuite/gas/ia64/unwind.d: Likewise. * testsuite/gas/ia64/xdata-ilp32.d: Likewise. * testsuite/gas/ia64/xdata.d: Likewise. * testsuite/gas/mmix/bspec-1.d: Likewise. * testsuite/gas/mmix/bspec-2.d: Likewise. * testsuite/gas/mmix/byte-1.d: Likewise. * testsuite/gas/mmix/loc-1.d: Likewise. * testsuite/gas/mmix/loc-2.d: Likewise. * testsuite/gas/mmix/loc-3.d: Likewise. * testsuite/gas/mmix/loc-4.d: Likewise. * testsuite/gas/mmix/loc-5.d: Likewise. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise. ld * testsuite/ld-alpha/tlsbin.rd: Adjust expected ordering of sections. * testsuite/ld-alpha/tlsbinr.rd: Likewise. * testsuite/ld-alpha/tlspic.rd: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-i386/nogot1.d: Likewise. * testsuite/ld-i386/pr12718.d: Likewise. * testsuite/ld-i386/pr12921.d: Likewise. * testsuite/ld-i386/tlsbin-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbin2-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin2.rd: Likewise. * testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsgdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic-nacl.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic-nacl.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-i386/tlspic2-nacl.rd: Likewise. * testsuite/ld-i386/tlspic2.rd: Likewise. * testsuite/ld-ia64/tlsbin.rd: Likewise. * testsuite/ld-ia64/tlspic.rd: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-10.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise. * testsuite/ld-mmix/bspec1.d: Likewise. * testsuite/ld-mmix/bspec2.d: Likewise. * testsuite/ld-mmix/local1.d: Likewise. * testsuite/ld-mmix/local3.d: Likewise. * testsuite/ld-mmix/local5.d: Likewise. * testsuite/ld-mmix/local7.d: Likewise. * testsuite/ld-mmix/undef-3.d: Likewise. * testsuite/ld-powerpc/tlsexe.r: Likewise. * testsuite/ld-powerpc/tlsexe32.r: Likewise. * testsuite/ld-powerpc/tlsexetoc.r: Likewise. * testsuite/ld-powerpc/tlsso.r: Likewise. * testsuite/ld-powerpc/tlsso32.r: Likewise. * testsuite/ld-powerpc/tlstocso.r: Likewise. * testsuite/ld-s390/tlsbin.rd: Likewise. * testsuite/ld-s390/tlsbin_64.rd: Likewise. * testsuite/ld-s390/tlspic.rd: Likewise. * testsuite/ld-s390/tlspic_64.rd: Likewise. * testsuite/ld-sh/sh64/crange1.rd: Likewise. * testsuite/ld-sh/sh64/crange2.rd: Likewise. * testsuite/ld-sh/sh64/crange3-cmpct.rd: Likewise. * testsuite/ld-sh/sh64/crange3-media.rd: Likewise. * testsuite/ld-sh/sh64/crange3.rd: Likewise. * testsuite/ld-sh/sh64/crangerel1.rd: Likewise. * testsuite/ld-sh/sh64/crangerel2.rd: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-sparc/gotop32.rd: Likewise. * testsuite/ld-sparc/gotop64.rd: Likewise. * testsuite/ld-sparc/tlssunbin32.rd: Likewise. * testsuite/ld-sparc/tlssunbin64.rd: Likewise. * testsuite/ld-sparc/tlssunnopic32.rd: Likewise. * testsuite/ld-sparc/tlssunnopic64.rd: Likewise. * testsuite/ld-sparc/tlssunpic32.rd: Likewise. * testsuite/ld-sparc/tlssunpic64.rd: Likewise. * testsuite/ld-tic6x/common.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/nogot1.d: Likewise. * testsuite/ld-x86-64/pr12718.d: Likewise. * testsuite/ld-x86-64/pr12921.d: Likewise. * testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise. * testsuite/ld-x86-64/split-by-file.rd: Likewise. * testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin2.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic2.rd: Likewise. * testsuite/ld-xtensa/tlsbin.rd: Likewise. * testsuite/ld-xtensa/tlspic.rd: Likewise.
2016-08-18Fix thinko in new weak undefined function testAlan Modra1-1/+1
* testsuite/ld-undefined/weak-undef.exp: Use unsupported not unresolved.
2016-08-13Correct .dynsym sh_infoAlan Modra13-13/+13
bfd/ * elf-bfd.h (struct elf_link_hash_table): Add local_dynsymcount. * elflink.c (_bfd_elf_link_renumber_dynsyms): Set local_dynsymcount. (bfd_elf_final_link): Set .dynsym sh_info from local_dynsymcount. ld/ * testsuite/ld-tic6x/shlib-1.rd: Correct expected .dynsym sh_info. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
2016-08-12Add undefined weak function testsAlan Modra3-45/+84
* testsuite/ld-undefined/weak-fundef.s: New. * testsuite/ld-undefined/weak-undef.t: Don't specify filename. * testsuite/ld-undefined/weak-undef.exp: Run new tests. Rearrange much of old code. Use is_elf_format to select targets.
2016-08-11Fix ERROR: target-cc does not existAlan Modra1-6/+9
PR ld/20436 * testsuite/lib/ld-lib.exp (at_least_gcc_version): Don't ignore remote_exec status. (check_gcc_plugin_enabled): Likewise.
2016-08-11Avoid testsuite errors about missing compilers.Nick Clifton1-1/+4
PR ld/20436 * testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): When not testing remotely, check to see if target compiler is installed before trying to run it.
2016-08-11PR ld/15428: MIPS/LD/testsuite: Un-KFAIL `__ehdr_start' test 2Maciej W. Rozycki1-3/+0
Complement commit b75d42bce560 ("Fix mips segfault on GOT access of absolute symbol") and unmark the `__ehdr_start' test 2 as known to fail for the n32 and n64 ABIs, as with the change referred in place the causing issue has been properly addressed and consequently the tests do not fail anymore and neither are supposed to. ld/ PR ld/15428 * testsuite/ld-mips-elf/mips-elf.exp: Un-KFAIL `__ehdr_start' test 2.
2016-08-10MIPS/LD/testsuite: Verify microMIPS LA25 stub generationMaciej W. Rozycki7-0/+182
Repeat `PIC and non-PIC test 1' checks for microMIPS LA25 stubs, covering code generation and stub symbol annotation. ld/ * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1a-micromips.s: New test source. * testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-08-09Skip LTO tests for --disable-pluginH.J. Lu1-3/+25
Don't run LTO tests if compiler is configured with --disable-plugin. PR ld/20436 * testsuite/lib/ld-lib.exp (check_gcc_plugin_enabled): New proc. (check_lto_available): Return 0 if check_gcc_plugin_enabled returns 0. (check_lto_fat_available): Likewise. (check_lto_shared_available): Likewise.
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme4-0/+90
bfd/ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter. * bfd-in2.h: Regenerate. * elf32-arm.c (struct elf32_arm_link_hash_table): Declare new cmse_implib field. (bfd_elf32_arm_set_target_relocs): Add new parameter to initialize cmse_implib field in struct elf32_arm_link_hash_table. (elf32_arm_filter_cmse_symbols): New function. (elf32_arm_filter_implib_symbols): Likewise. (elf_backend_filter_implib_symbols): Define to elf32_arm_filter_implib_symbols. ld/ * emultempl/armelf.em (cmse_implib): Declare and define this new static variable. (arm_elf_create_output_section_statements): Add new cmse_implib parameter. (OPTION_CMSE_IMPLIB): Define macro. (PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case. * ld.texinfo (--cmse-implib): Document new option. * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): New test. (Secure gateway import library generation: errors): Likewise. * testsuite/ld-arm/cmse-implib.s: New file. * testsuite/ld-arm/cmse-implib-errors.out: Likewise. * testsuite/ld-arm/cmse-implib.rd: Likewise.
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme7-0/+183
bfd/ * elf32-arm.c (CMSE_PREFIX): Define macro. (elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence. (cmse_branch_thumb_only): Declare stub. (struct elf32_arm_link_hash_table): Define cmse_stub_sec field. (elf32_arm_get_plt_info): Add globals parameter. Use it to return FALSE if there is no PLT. (arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature. (elf32_arm_final_link_relocate): Likewise. (elf32_arm_gc_sweep_hook): Likewise. (elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M secure entry functions. (arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required): Change to a switch case and add a case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required_alignment): Likewise. (arm_stub_dedicated_output_section_name): Likewise. (arm_stub_dedicated_input_section_ptr): Likewise and remove ATTRIBUTE_UNUSED for htab parameter. (arm_stub_required_alignment): Likewise. (arm_stub_sym_claimed): Likewise. (arm_dedicated_stub_section_padding): Likewise. (cmse_scan): New function. (elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets. Set stub_changed to TRUE if such veneers were created. (elf32_arm_swap_symbol_in): Add detection code for CMSE special symbols. include/ * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro. (ARM_SET_SYM_CMSE_SPCL): Likewise. ld/ * ld.texinfo (Placement of SG veneers): New concept entry. * testsuite/ld-arm/arm-elf.exp (Secure gateway veneers: no .gnu.sgstubs section): New test. (Secure gateway veneers: wrong entry functions): Likewise. (Secure gateway veneers (ARMv8-M Baseline)): Likewise. (Secure gateway veneers (ARMv8-M Mainline)): Likewise. * testsuite/ld-arm/cmse-veneers.s: New file. * testsuite/ld-arm/cmse-veneers.d: Likewise. * testsuite/ld-arm/cmse-veneers.rd: Likewise. * testsuite/ld-arm/cmse-veneers.sd: Likewise. * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise. * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-07-27MIPS/GAS: Implement microMIPS branch/jump compactionMaciej W. Rozycki2-16/+10
Convert microMIPS branches and jumps whose delay slot would be filled by a generated NOP instruction to the corresponding compact form where one exists, in a manner similar to MIPS16 JR->JRC and JALR->JALRC swap. Do so even where the transformation switches from a 16-bit to a 32-bit branch encoding for no benefit in code size reduction, as this is still advantageous. This is because a branch/NOP pair takes 2 pipeline slots or a 2-cycle completion latency except in superscalar implementations. Whereas a compact branch may or may not stall on its target fetch, so it will at most have a 2-cycle completion latency and may have only 1 even in scalar implementations, and in superscalar implementations it is expected to have no worse latency as a branch/NOP pair has. Also it won't stall and therefore take the extra latency cycle in the not-taken case. Technically this is the same as MIPS16 compaction: for the qualifying instruction encodings the APPEND_ADD_COMPACT machine code generation method is selected where APPEND_ADD_WITH_NOP otherwise would and tells the code generator in `append_insn' to convert the regular form of an instruction to its corresponding compact form. For this the opcode is tweaked as necessary and the microMIPS opcode table is scanned for the matching updated instruction. A non-$0 `rt' operand to BEQ and BNE instructions is moved to the `rs' operand field of BEQZC and BNEZC encodings as required. Unlike with MIPS16 compaction however we need to handle out-of-distance branch relaxation as well. We do this by deferring the generation of any delay-slot NOP required to relaxation made in `md_convert_frag', by converting the APPEND_ADD_WITH_NOP machine code generation to APPEND_ADD where a relaxed instruction is recorded. Relaxation then, depending on actual code produced, chooses between either using a compact branch or jump encoding and emitting the NOP outstanding if no compact encoding is possible. For code simplicity's sake the relaxation pass is retained even if the principle of preferring a compact encoding to a 16-bit branch/NOP pair means, in the absence of out-of-range branch relaxation, that a single compact branch machine code instruction will eventually be produced from a given assembly source instruction. gas/ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16) (RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16) (RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32) (RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits. (get_append_method): Also return APPEND_ADD_COMPACT for microMIPS instructions. (find_altered_mips16_opcode): Exclude macros from matching. Factor code out... (find_altered_opcode): ... to this new function. (find_altered_micromips_opcode): New function. (frag_branch_delay_slot_size): Likewise. (append_insn): Handle microMIPS branch/jump compaction. (macro_start): Likewise. (relaxed_micromips_32bit_branch_length): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/micromips.s: Add conditional explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-size-1.s: Likewise. * testsuite/gas/mips/micromips.l: Adjust line numbers. * testsuite/gas/mips/micromips-warn.l: Likewise. * testsuite/gas/mips/micromips-size-1.l: Likewise. * testsuite/gas/mips/micromips.d: Adjust padding. * testsuite/gas/mips/micromips-trap.d: Likewise. * testsuite/gas/mips/micromips-insn32.d: Likewise. * testsuite/gas/mips/micromips-noinsn32.d: Likewise. * testsuite/gas/mips/micromips@beq.d: Update patterns for branch/jump compaction. * testsuite/gas/mips/micromips@bge.d: Likewise. * testsuite/gas/mips/micromips@bgeu.d: Likewise. * testsuite/gas/mips/micromips@blt.d: Likewise. * testsuite/gas/mips/micromips@bltu.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: Likewise. * testsuite/gas/mips/micromips@loc-swap.d: Likewise. * testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise. * testsuite/gas/mips/micromips@relax.d: Likewise. * testsuite/gas/mips/micromips@relax-at.d: Likewise. * testsuite/gas/mips/micromips@relax-swap3.d: Likewise. * testsuite/gas/mips/branch-extern-2.d: Likewise. * testsuite/gas/mips/branch-extern-4.d: Likewise. * testsuite/gas/mips/branch-section-2.d: Likewise. * testsuite/gas/mips/branch-section-4.d: Likewise. * testsuite/gas/mips/branch-weak-2.d: Likewise. * testsuite/gas/mips/branch-weak-5.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/micromips-compact.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. ld/ * testsuite/ld-mips-elf/micromips-branch-absolute.d: Update patterns for branch compaction. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b", "beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to "j".
2016-07-27Restrict linker garbage collection personality test to cfi enabled targets.Nick Clifton1-2/+1
* testsuite/ld-gc/personality.d: Use "target cfi" to restrict the test to targets which support cfi.
2016-07-26MIPS/BFD: Handle branches in PLT compression selectionMaciej W. Rozycki14-24/+520
Complement: commit 1bbce132647e6d72aaa065cce5c1d5dd6585c2b2 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Jun 24 23:55:46 2013 +0000 <https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS: Compressed PLT/stubs support"), and also choose between regular and compressed PLT entries as appropriate for any branches referring. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): Handle branches in PLT compression selection. (_bfd_mips_elf_check_relocs): Likewise. ld/ * testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support. * testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise. * testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise. * testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-25Revise targets able to run ELF 64k section testAlan Modra1-8/+4
* testsuite/ld-elf/sec64k.exp: Run test for arc, msp430, or1k and m32r. Correct comment. Relax ld -r match to account for msp increased number of default sections.
2016-07-22Fix segfault in ARC linker when generating got entries for local symbols.Cupertino Miranda2-0/+12
bfd * arc-got.h (relocate_fix_got_relocs_for_got_info): Handle the case where there's no elf_link_hash_entry while processing GOT_NORMAL got entries. ld * testsuite/ld-arc/got-01.d: New file. * testsuite/ld-arc/got-01.s: New file.
2016-07-21Use variable args in run_ld_link_exec_testsAlan Modra18-37/+37
If the last parameter of a tcl function is "args" then it can take zero or more arguments. Make use of this language feature in run_ld_link_exec_tests. * testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Replace "targets_to_xfail" parameter with "args". * testsuite/ld-elf/compress.exp: Remove empty list of xfails on all calls to run_ld_link_exec_tests. * testsuite/ld-elf/dwarf.exp: Likewise. * testsuite/ld-elf/indirect.exp: Likewise. * testsuite/ld-elf/wrap.exp: Likewise. * testsuite/ld-i386/i386.exp: Likewise. * testsuite/ld-i386/no-plt.exp: Likewise. * testsuite/ld-i386/tls.exp: Likewise. * testsuite/ld-ifunc/ifunc.exp: Likewise. * testsuite/ld-pie/pie.exp: Likewise. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-size/size.exp: Likewise. * testsuite/ld-x86-64/mpx.exp: Likewise. * testsuite/ld-x86-64/no-plt.exp: Likewise. * testsuite/ld-x86-64/tls.exp: Likewise. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-elf/elf.exp: Likewise. Reorder args when providing xfails and simplify lists. * testsuite/ld-elf/shared.exp: Likewise.
2016-07-21Fix implib test failuresAlan Modra5-20/+45
bfd/ * elf.c (_bfd_elf_filter_global_symbols): Skip local symbols. (swap_out_syms): Return an error when not finding ELF output section rather than asserting. * elflink.c (elf_output_implib): Call bfd_set_error on no symbols. ld/ * testsuite/lib/ld-lib.exp (run_ld_link_tests): Add optional parameter to pass list of xfails. * testsuite/ld-elf/elf.exp: Add xfails for implib tests. Tidy implib test formatting. Don't set .data start address. * testsuite/ld-elf/implib.s: Remove first .bss directive and replace second one with equivalent .section directive. * testsuite/ld-elf/empty-implib.out: Add expected final error. * testsuite/ld-elf/implib.rd: Update.
2016-07-20Early expression evaluationAlan Modra1-1/+2
Folding a constant expression early can lead to loss of tokens, eg. ABSOLUTE, that are significant in ld's horrible context sensitive expression evaluation. Also, MAXPAGESIZE and other "constants" may not have taken values specified on the command line, leading to the wrong value being cached. * ldexp.c (exp_unop, exp_binop, exp_trinop, exp_nameop): Don't fold expression. * testsuite/ld-elf/maxpage3b.d: Expect correct maxpagesize.
2016-07-19MIPS: Convert cross-mode BAL to JALXMaciej W. Rozycki22-102/+278
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX, similarly to how JAL instructions are converted. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode BAL to JALX. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a corresponding error message. gas/ * config/tc-mips.c (mips_force_relocation, mips_fix_adjustable): Adjust comments for BAL to JALX linker conversion. (fix_bad_cross_mode_branch_p): Accept cross-mode BAL. * testsuite/gas/mips/unaligned-branch-1.l: Update error messages expected. * testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise. * testsuite/gas/mips/branch-local-4.d: New test. * testsuite/gas/mips/branch-local-n32-4.d: New test. * testsuite/gas/mips/branch-local-n64-4.d: New test. * testsuite/gas/mips/branch-addend.d: New test. * testsuite/gas/mips/branch-addend-n32.d: New test. * testsuite/gas/mips/branch-addend-n64.d: New test. * testsuite/gas/mips/branch-local-4.s: New test source. * testsuite/gas/mips/branch-addend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/unaligned-branch-2.d: Update error messages expected. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend.d: New test. * testsuite/ld-mips-elf/bal-jalx-local.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19MIPS: Verify the ISA mode and alignment of branch and jump targetsMaciej W. Rozycki17-42/+898
Verify that the ISA mode of branch targets is the same as the referring relocation, so that an attempt to produce a branch between instructions encoded in different ISA modes each causes an error rather than silently producing non-functional code. Make sure that no symbol or addend bits are silently truncated: terminate with an error if the relocation value calculated cannot be encoded in the relocatable field of a branch; for REL targets also applying to any intermediate addend. Also make jump target's alignment verification consistent with that for branches. This change will require an update to some obscure handcoded assembly sources which make branches to labels placed at data objects, however for microMIPS code only. These labels will have to be updated with the `.insn' directive for containing code to assemble and link successfully. Such code is broken as any such labels have always been required by the microMIPS architecture specification[1][2] to be annotated this way for correct interpretation, and with our old code missing `.insn' directives caused labels to present different semantics depending on whether they were referred with branch (ISA bit ignored) or other relocations (ISA bit respected). Enforcing these checks however will ensure errors in building software, like mixed regular MIPS and microMIPS code links with branches between, will be diagnosed at the build time rather than causing odd run-time errors such as intermittent crashes. It will also let cross-mode BAL instructions be converted to JALX instructions, with a separate change. References: [1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level Compatibility", p. 533 [2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level Compatibility", p. 623 bfd/ * elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1. (branch_reloc_p): New function. (mips_elf_calculate_relocation): Handle ISA mode determination for relocations against section symbols, against absolute symbols and absolute relocations. Also set `*cross_mode_jump_p' for branches. <R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment checks for weak undefined symbols. Also check target alignment within the same ISA mode. <R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches in the alignment check. <R_MICROMIPS_PC7_S1>: Add an alignment check. <R_MICROMIPS_PC10_S1>: Likewise. <R_MICROMIPS_PC16_S1>: Likewise. (mips_elf_perform_relocation): Report a failure for unsupported same-mode JALX instructions and cross-mode branches. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add error messages for jumps to misaligned addresses. gas/ * config/tc-mips.c (mips_force_relocation): Also retain branch relocations against MIPS16 and microMIPS symbols. (fix_bad_cross_mode_jump_p): New function. (fix_bad_same_mode_jalx_p): Likewise. (fix_bad_misaligned_jump_p): Likewise. (fix_bad_cross_mode_branch_p): Likewise. (fix_bad_misaligned_branch_p): Likewise. (fix_validate_branch): Likewise. (md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP> <BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5, etc. Verify the ISA mode and alignment of the jump target. <BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check with a call to `fix_validate_branch'. <BFD_RELOC_MIPS_26_PCREL_S2>: Likewise. <BFD_RELOC_16_PCREL_S2>: Likewise. <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend. Verify the ISA mode and alignment of the branch target. (md_convert_frag): Verify the ISA mode and alignment of resolved MIPS16 branch targets. * testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction branch targets with `.insn'. * testsuite/gas/mips/branch-misc-5.s: Likewise. * testsuite/gas/mips/micromips@branch-misc-5-64.d: Update accordingly. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise. * testsuite/gas/mips/micromips-branch-relax.s: Annotate non-instruction branch target with `.insn'. * testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets with external symbols. * testsuite/gas/mips/micromips-insn32.d: Update accordingly. * testsuite/gas/mips/micromips-noinsn32.d: Likewise. * testsuite/gas/mips/micromips-trap.d: Likewise. * testsuite/gas/mips/micromips.d: Likewise. * testsuite/gas/mips/mips16.s: Annotate non-instruction branch targets with `.insn'. * testsuite/gas/mips/mips16.d: Update accordingly. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction branch target with `.insn'. * testsuite/gas/mips/relax-swap3.s: Likewise. * testsuite/gas/mips/branch-local-2.l: New list test. * testsuite/gas/mips/branch-local-3.l: New list test. * testsuite/gas/mips/branch-local-n32-2.l: New list test. * testsuite/gas/mips/branch-local-n32-3.l: New list test. * testsuite/gas/mips/branch-local-n64-2.l: New list test. * testsuite/gas/mips/branch-local-n64-3.l: New list test. * testsuite/gas/mips/unaligned-jump-1.l: New list test. * testsuite/gas/mips/unaligned-jump-2.l: New list test. * testsuite/gas/mips/unaligned-jump-3.d: New test. * testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test. * testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test. * testsuite/gas/mips/unaligned-jump-mips16-3.d: New test. * testsuite/gas/mips/unaligned-jump-micromips-1.l: New list test. * testsuite/gas/mips/unaligned-jump-micromips-2.l: New list test. * testsuite/gas/mips/unaligned-jump-micromips-3.d: New test. * testsuite/gas/mips/unaligned-branch-1.l: New list test. * testsuite/gas/mips/unaligned-branch-2.l: New list test. * testsuite/gas/mips/unaligned-branch-3.d: New test. * testsuite/gas/mips/unaligned-branch-r6-1.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-2.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-3.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-4.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-5.d: New test. * testsuite/gas/mips/unaligned-branch-r6-6.d: New test. * testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test. * testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test. * testsuite/gas/mips/unaligned-branch-mips16-3.d: New test. * testsuite/gas/mips/unaligned-branch-micromips-1.l: New list test. * testsuite/gas/mips/unaligned-branch-micromips-2.l: New list test. * testsuite/gas/mips/unaligned-branch-micromips-3.d: New test. * testsuite/gas/mips/branch-local-2.s: New test source. * testsuite/gas/mips/branch-local-3.s: New test source. * testsuite/gas/mips/branch-local-n32-2.s: New test source. * testsuite/gas/mips/branch-local-n32-3.s: New test source. * testsuite/gas/mips/branch-local-n64-2.s: New test source. * testsuite/gas/mips/branch-local-n64-3.s: New test source. * testsuite/gas/mips/unaligned-jump-1.s: New test source. * testsuite/gas/mips/unaligned-jump-2.s: New test source. * testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source. * testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source. * testsuite/gas/mips/unaligned-jump-micromips-1.s: New test source. * testsuite/gas/mips/unaligned-jump-micromips-2.s: New test source. * testsuite/gas/mips/unaligned-branch-1.s: New test source. * testsuite/gas/mips/unaligned-branch-2.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-1.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-2.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-3.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-4.s: New test source. * testsuite/gas/mips/unaligned-branch-mips16-1.s: New test source. * testsuite/gas/mips/unaligned-branch-mips16-2.s: New test source. * testsuite/gas/mips/unaligned-branch-micromips-1.s: New test source. * testsuite/gas/mips/unaligned-branch-micromips-2.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message expected. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps, microMIPS BAL and MIPS16 instructions. * testsuite/ld-mips-elf/undefweak-overflow.d: Update accordingly. * testsuite/ld-mips-elf/unaligned-branch-2.d: New test. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test. * testsuite/ld-mips-elf/unaligned-jump.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19ld: Restore file offset after a plugin fails to claim a fileAndrew Burgess2-1/+32
When using the plugin interface to claim an input file the claim method from (possible) many plugins can be called on an input file. If these claim methods read content from the input file then the file offset stored in the underlying file descriptor will change. As we share a file descriptor between the plugin interface (created with dup in ld/plugin.c:plugin_object_p) and the input bfd object, then any changes to the file offset in the file descriptor will effect the bfd object. Also, as the changes to the file offset did not originate from calls through the bfd interface, but instead came from the plugin directly, then the bfd will not be aware that the file offset has changed. This is a problem as the bfd library caches the file offset. If the plugin decides not to claim an input file then, currently, we leave the bfd in a state where the actual file offset is out of sync with the cached file offset. This problem came to light after a recent commit 7d0b9ebc1e0079271a7c7737b53bc026525eab64 (Don't include libbfd.h outside of bfd, part 6) however, I don't believe that commit actual introduces the bug, it just exposed the existing issue. This commit solves the problem by backing up and restoring the file offset for the file descriptor of the input file. The restore is only done if the plugin does not claim the input file, as it is in this case that the bfd library might be used again to try and identify the unclaimed file. ld/ChangeLog: * plugin.c (plugin_call_claim_file): Restore the file offset after an unsuccessful attempt to claim a file. * testplug.c (bytes_to_read_before_claim): New global. (record_read_length): New function, sets new global bytes_to_read_before_claim. (parse_option): Handle 'read:<NUMBER>' option. (onclaim_file): Read file content before checking for claim. * testsuite/ld-plugin/plugin-30.d: New file. * testsuite/ld-plugin/plugin.exp: Add new test.
2016-07-15Add support for creating ELF import librariesThomas Preud'homme4-0/+51
2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf-bfd.h (elf_backend_filter_implib_symbols): Declare backend hook. (_bfd_elf_filter_global_symbols): Declare. * elf.c (_bfd_elf_filter_global_symbols): New function. * elflink.c (elf_filter_global_symbols): Likewise. (elf_output_implib): Likewise. (bfd_elf_final_link): Call above function, failing if it does. * elfxx-target.h (elf_backend_filter_implib_symbols): Define macro and default it to NULL. (elf_backend_copy_indirect_symbol): Fix spacing. (elf_backend_hide_symbol): Likewise. (elfNN_bed): Initialize elf_backend_filter_implib_symbols backend hook. include/ * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and out_implib_bfd fields. 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com> Nick Clifton <nickc@redhat.com> ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Open import library file for writing and initialize implib_bfd field of link_info structure. * emultempl/pe.em (pe_implib_filename): Remove variable declaration. (OPTION_IMPLIB_FILENAME): Remove macro definition. (gld${EMULATION_NAME}_add_options): Remove --out-implib option. (gld_${EMULATION_NAME}_list_options): Likewise. (gld${EMULATION_NAME}_handle_option): Likewise. (gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename instead of pe_implib_filename. * emultempl/pep.em (pep_implib_filename): Remove variable declaration. (OPTION_IMPLIB_FILENAME): Remove enumerator. (gld${EMULATION_NAME}_add_options): Remove --out-implib option. (gld_${EMULATION_NAME}_list_options): Likewise. (gld${EMULATION_NAME}_handle_option): Likewise. (gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename instead of pep_implib_filename. * ld.h (args_type): Declare new out_implib_filename field. * ld.texinfo (--out-implib): Move documentation to arch-independent part and rephrase to apply to ELF targets. * ldexp.c (exp_fold_tree_1): Set ldscript_def field to 1 for symbols defined in linker scripts. * ldlex.h (enum option_values): Declare new OPTION_OUT_IMPLIB enumerator. * lexsup.c (ld_options): Add entry for new --out-implib switch. (parse_args): Handle OPTION_OUT_IMPLIB case. * testsuite/ld-elf/elf.exp (Generate empty import library): New test. (Generate import library): Likewise. * testsuite/ld-elf/implib.s: Likewise. * testsuite/ld-elf/implib.rd: New file. * testsuite/ld-elf/empty-implib.out: Likewise
2016-07-15Tidy up debugging in the ARC port of the BFD library.Nick Clifton1-1/+3
bfd * elf32-arc.c (PR_DEBUG): Delete. Fix printing of debug information. Fix formatting of debug statements. (debug_arc_reloc): Handle symbols that are not from an input file. (arc_do_relocation): Remove excessive exclamation points. (elf_arc_relocate_section): Print an informative message if the relocation fails, even if debugging is not enabled. * arc-got.h: Fix formatting. Fix printing of debug information. (new_got_entry_to_list): Use xmalloc. * config.bfd: use the big-endian arc vector as the default vector for big-endian arc targets. ld * testsuite/ld-arc/arc.exp: Always run the sda-relocs test in little endian mode.
2016-07-14MIPS/GAS: Don't convert PC-relative REL relocs against absolute symbolsMaciej W. Rozycki1-0/+6
Don't convert PC-relative REL relocations against absolute symbols to section-relative references and retain the original symbol reference instead. Offsets into the absolute section may overflow the limited range of their in-place addend field, causing an assembly error, e.g.: $ cat test.s .text .globl foo .ent foo foo: b bar .end foo .set bar, 0x12345678 $ as -EB -32 -o test.o test.s test.s: Assembler messages: test.s:3: Error: relocation overflow $ With the original reference retained the source can now be assembled and linked successfully: $ as -EB -32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000ffff b 0 <foo> 0: R_MIPS_PC16 bar 4: 00000000 nop ... $ ld -melf32btsmip -Ttext 0x12340000 -e foo -o test test.o $ objdump -dr test test: file format elf32-tradbigmips Disassembly of section .text: 12340000 <foo>: 12340000: 1000159d b 12345678 <bar> 12340004: 00000000 nop ... $ For simplicity always retain the original symbol reference, even if it would indeed fit. Making TC_FORCE_RELOCATION_ABS separate from TC_FORCE_RELOCATION causes R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 branch relocations against absolute symbols to be converted on RELA targets to section-relative references. This is an intended effect of this change. Absolute symbols carry no ISA annotation in their `st_other' field and their value is not going to change with linker relaxation, so it is safe to discard the original reference and keep the calculated final symbol value only in the relocation's addend. Similarly R6 R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations referring absolute symbols can be safely converted even on REL targets, as there the in-place addend of these relocations covers the entire 32-bit address space so it can hold the calculated final symbol value, and likewise the value referred won't be affected by any linker relaxation. Add a set of suitable test cases and enable REL linker tests which now work and were previously used as dump patterns for RELA tests only. gas/ * config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro. (mips_force_relocation_abs): New prototype. * config/tc-mips.c (mips_force_relocation_abs): New function. * testsuite/gas/mips/branch-absolute.d: Adjust dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/branch-absolute-addend.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf.exp: Run `branch-absolute-addend', `mips16-branch-absolute', `mips16-branch-absolute-addend' and `micromips-branch-absolute-addend'.
2016-07-14MIPS/GAS: Keep the ISA bit in the addend of branch relocationsMaciej W. Rozycki7-0/+68
Correct a problem with the ISA bit being stripped from the addend of compressed branch relocations, affecting RELA targets. It has been there since microMIPS support has been added, with: commit df58fc944dbc6d5efd8d3826241b64b6af22f447 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Sun Jul 24 14:20:15 2011 +0000 <https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS: microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 relocations originally affected, and the R_MIPS16_PC16_S1 relocation recently added with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually triggering a linker error, due to its heightened processing strictness level: $ cat test.s .text .set mips16 foo: b bar .set bar, 0x1235 .align 4, 0 $ as -EB -n32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 *ABS*+0x1230 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o test.o: In function `foo': (.text+0x0): Branch to a non-instruction-aligned address $ This is because the ISA bit of the branch target does not match the ISA bit of the referring branch, hardwired to 1 of course. Retain the ISA bit then, so that the linker knows this is really MIPS16 code referred: $ objdump -dr fixed.o fixed.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 *ABS*+0x1231 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o $ Add a set of MIPS16 tests to cover the relevant cases, excluding linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. gas/ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1> <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the addend calculated. * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit in `bar', export `foo'. * testsuite/gas/mips/mips16-branch-absolute.d: Adjust accordingly. * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: Likewise. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `mips16-branch-absolute' and `mips16-branch-absolute-addend', referred indirectly only.
2016-07-14BFD: Let targets handle relocations against absolute symbolsMaciej W. Rozycki13-0/+155
Fix a generic BFD issue with relocations against absolute symbols, which are installed without using any individual relocation handler provided by the backend. This causes any absolute section's addend to be lost on REL targets such as o32 MIPS, and also relocation-specific calculation adjustments are not made. As an example assembling this program: $ cat test.s .text foo: b bar b baz .set bar, 0x1234 $ as -EB -32 -o test-o32.o test.s $ as -EB -n32 -o test-n32.o test.s produces this binary code: $ objdump -dr test-o32.o test-n32.o test-o32.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 10000000 b 4 <foo+0x4> 0: R_MIPS_PC16 *ABS* 4: 00000000 nop 8: 1000ffff b 8 <foo+0x8> 8: R_MIPS_PC16 baz c: 00000000 nop test-n32.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: 10000000 b 4 <foo+0x4> 0: R_MIPS_PC16 *ABS*+0x1230 4: 00000000 nop 8: 10000000 b c <foo+0xc> 8: R_MIPS_PC16 baz-0x4 c: 00000000 nop $ where it is clearly visible in `test-o32.o', which uses REL relocations, that the absolute section's addend equivalent to the value of `bar' -- a reference to which cannot be fully resolved at the assembly time, because the reference is PC-relative -- has been lost, as has been the relocation-specific adjustment of -4, required to take into account the PC+4-relative calculation made by hardware with branches and seen in the external symbol reference to `baz' as the `ffff' addend encoded in the instruction word. In `test-n32.o', which uses RELA relocations, the absolute section's addend has been correctly retained. Give precedence then in `bfd_perform_relocation' and `bfd_install_relocation' to any individual relocation handler the backend selected may have provided, while still resorting to the generic calculation otherwise. This retains the semantics which we've had since forever or before the beginning of our repository history, and is at the very least compatible with `bfd_elf_generic_reloc' being used as the handler. Retain the `bfd_is_und_section' check unchanged at the beginning of `bfd_perform_relocation' since this does not affect the semantics of the function. The check returns the same `bfd_reloc_undefined' code the check for a null `howto' does, so swapping the two does not matter. Also the check is is mutually exclusive with the `bfd_is_abs_section' check, since a section cannot be absolute and undefined both at once, so swapping the two does not matter either. With this change applied the program quoted above now has the in-place addend correctly calculated and installed in the field being relocated: $ objdump -dr fixed-o32.o fixed-o32.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000048c b 1234 <bar> 0: R_MIPS_PC16 *ABS* 4: 00000000 nop 8: 1000ffff b 8 <foo+0x8> 8: R_MIPS_PC16 baz c: 00000000 nop $ Add a set of MIPS tests to cover the relevant cases, including absolute symbols with addends, and verifying that PC-relative relocations against symbols concerned resolve to the same value in the final link regardless of whether the REL or the RELA relocation form is used. Exclude linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. bfd/ * reloc.c (bfd_perform_relocation): Try the `howto' handler first with relocations against absolute symbols. (bfd_install_relocation): Likewise. gas/ * testsuite/gas/mips/mips16-branch-absolute.d: Update patterns. * testsuite/gas/mips/branch-absolute.d: New test. * testsuite/gas/mips/branch-absolute-n32.d: New test. * testsuite/gas/mips/branch-absolute-n64.d: New test. * testsuite/gas/mips/branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/micromips-branch-absolute.d: New test. * testsuite/gas/mips/micromips-branch-absolute-n32.d: New test. * testsuite/gas/mips/micromips-branch-absolute-n64.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/branch-absolute.s: New test source. * testsuite/gas/mips/branch-absolute-addend.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-addend.s: New test source. * testsuite/gas/mips/micromips-branch-absolute.s: New test source. * testsuite/gas/mips/micromips-branch-absolute-addend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/branch-absolute.d: New test. * testsuite/ld-mips-elf/branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `branch-absolute-addend' and `micromips-branch-absolute-addend', referred indirectly only.
2016-07-14[ARC] Fix/improve small data support.Claudiu Zissulescu5-0/+98
The R_ARC_SDA32 is wrongly described as a ME relocation, fix it. Offset the __SDATA_BEGIN__ to take advantage of the signed 9-bit field of the load/store instructions. include/ 2016-07-08 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation. ld/ 2016-07-08 Claudiu Zissulescu <claziss@synopsys.com> * emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset. * testsuite/ld-arc/sda-relocs.dd: New file. * testsuite/ld-arc/sda-relocs.ld: Likewise. * testsuite/ld-arc/sda-relocs.rd: Likewise. * testsuite/ld-arc/sda-relocs.s: Likewise. * testsuite/ld-arc/arc.exp: Add SDA tests.
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