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2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner4-0/+40
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-11-03[LD][AARCH64]Add test cases for big-endian.Renlin Li24-0/+316
ld/testsuite 2015-11-03 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run newly added test cases. * ld-aarch64/emit-relocs-301.d: Skip aarch64_be. * ld-aarch64/emit-relocs-302.d: Likwise. * ld-aarch64/emit-relocs-310.d: Likwise. * ld-aarch64/emit-relocs-515.d: Likwise. * ld-aarch64/emit-relocs-516.d: Likwise. * ld-aarch64/tls-large-desc.d: Likwise. * ld-aarch64/tls-large-ie.d: Likwise. * ld-aarch64/tls-relax-large-desc-ie.d: Likwise. * ld-aarch64/tls-relax-large-desc-le.d: Likwise. * ld-aarch64/tls-relax-large-gd-ie.d: Likwise. * ld-aarch64/tls-relax-large-gd-le.d: Likwise. * ld-aarch64/emit-relocs-301-be.d: New for aarch64_be. * ld-aarch64/emit-relocs-302-be.d: Likewise. * ld-aarch64/emit-relocs-310-be.d: Likewise. * ld-aarch64/emit-relocs-515-be.d: Likewise. * ld-aarch64/emit-relocs-516-be.d: Likewise. * ld-aarch64/tls-large-desc-be.d: Likewise. * ld-aarch64/tls-large-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-desc-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-desc-le-be.d: Likewise. * ld-aarch64/tls-relax-large-gd-ie-be.d: Likewise. * ld-aarch64/tls-relax-large-gd-le-be.d: Likewise.
2015-10-29Also check GOTPCRELXH.J. Lu2-1/+5
* ld-x86-64/plt-main3.rd: Also check GOTPCRELX.
2015-10-292015-10-29 Catherine Moore <clm@codesourcery.com>Catherine Moore6-3/+124
bfd/ * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output section to bfd_abs_section_ptr if the stub is discarded. ld/testsuite/ * ld-mips-elf/mips16-fp-stub-1.s: New. * ld-mips-elf/mips16-fp-stub-2.s: New. * ld-mips-elf/mips16-fp-stub.d: New. * ld-mips-elf/mips-elf.exp: Run new tests. * ld-mips-elf/mips16-intermix.d: Update expected output. https://sourceware.org/ml/binutils/2015-10/msg00137.html
2015-10-28Add a test for PR ld/19162H.J. Lu5-0/+23
PR ld/19162 * ld-x86-64/x86-64.exp: Run pr19162. * ld-x86-64/pr19162.d: New file. * ld-x86-64/pr19162a.s: Likewise. * ld-x86-64/pr19162b.s: Likewise.
2015-10-27Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time ↵Laurent Alfonsi14-0/+902
workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx). bfd * bfd-in2.h: Regenerate. * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how STM32L4XX instruction scanning should be done. (bfd_elf32_arm_set_stm32l4xx_fix) (bfd_elf32_arm_stm32l4xx_erratum_scan) (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes. (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument to prototype. * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME) (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros. (elf32_stm32l4xx_erratum_type): New enum. (elf32_stm32l4xx_erratum_list): New struct. List of veneers or jumps to veneers. (_arm_elf_section_data): Add stm32l4xx_erratumcount, stm32l4xx_erratumlist. (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size, stm32l4xx_fix and num_stm32l4xx_fixes fields. (ctz): New function. (popcount): New function. (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix. (put_thumb2_insn): New function. (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for LDM instructions. (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for VLDM instructions. (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum glue section. (record_stm32l4xx_erratum_veneer) : New function. Create a single veneer, and its associated symbols. (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue. (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of erratum workaround required. (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find out where veneers and branches to veneers have been placed in virtual memory after layout. (is_thumb2_ldmia): New function. (is_thumb2_ldmdb): Likewise. (is_thumb2_vldm ): Likewise. (stm32l4xx_need_create_replacing_stub): New function. Decide if a veneer must be emitted. (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an input BFD for potential erratum-triggering insns. Record results. (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in global hash table. (elf32_arm_size_dynamic_sections): Collect glue information. (create_instruction_branch_absolute): New function. (create_instruction_ldmia): Likewise. (create_instruction_ldmdb): Likewise. (create_instruction_mov): Likewise. (create_instruction_sub): Likewise. (create_instruction_vldmia): Likewise. (create_instruction_vldmdb): Likewise. (create_instruction_udf_w): Likewise. (create_instruction_udf): Likewise. (push_thumb2_insn32): Likewise. (push_thumb2_insn16): Likewise. (stm32l4xx_fill_stub_udf): Likewise. (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the replacing stub for ldmia instructions. (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb. (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm. (stm32l4xx_create_replacing_stub): New function. Dispatches the stub emission to the appropriate functions. (elf32_arm_write_section): Output veneers, and branches to veneers. ld * ld.texinfo: Description of the STM32L4xx erratum workaround. * emultempl/armelf.em (stm32l4xx_fix): New. (arm_elf_before_allocation): Choose the type of fix, scan for erratum. (gld${EMULATION_NAME}_finish): Fix veneer locations. (arm_elf_create_output_section_statements): Propagate stm32l4xx_fix value. (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX. (PARSE_AND_LIST_LONGOPTS): Add entry for handling --fix-stm32l4xx-629360. (PARSE_AND_LIST_OPTION): Add entry for helping on --fix-stm32l4xx-629360. (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX. tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX tests. * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New. * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-all.d: Likewise. * ld-arm/stm32l4xx-fix-all.s: Likewise. * ld-arm/stm32l4xx-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-ldm.d: Likewise. * ld-arm/stm32l4xx-fix-ldm.s: Likewise. * ld-arm/stm32l4xx-fix-vldm.d: Likewise. * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-10-27xfail pr19161 test on hppa-linuxAlan Modra2-1/+6
HPPA linux needs libgcc.a for millicode routine $$dyncall. * ld-gc/pr19161.d: xfail hppa-*-*.
2015-10-26Check symbol defined by assignment in linker scriptH.J. Lu9-0/+72
Symbol symbol defined by an assignment in a linker script has type bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load should check bfd_link_hash_new to see if a symbol is defined by a linker script. bfd/ PR ld/19175 * elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new instead of calling bfd_link_get_defined_symbol. * elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip relocation overflow for bfd_link_hash_new. * linker.c (bfd_link_get_defined_symbol): Removed. * bfd-in2.h: Regenerated. ld/testsuite/ PR ld/19175 * ld-i386/i386.exp: Run pr19175. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr19175.d: New file. * ld-i386/pr19175.s: Likewise. * ld-i386/pr19175.t: Likewise. * ld-x86-64/pr19175.d: Likewise. * ld-x86-64/pr19175.s: Likewise. * ld-x86-64/pr19175.t: Likewise.
2015-10-26Properly convert address load of __start_XXX/__stop_XXXH.J. Lu20-0/+70
Since __start_XXX and __stop_XXX symbols aren't defined when address load is being converted, we need to check if there is an XXX output section to get their section and value. This patch adds a new function, bfd_link_get_defined_symbol, to search for the XXX output section to check if __start_XXX and __stop_XXX symbols are defined. bfd/ PR ld/19171 * elf32-i386.c (elf_i386_convert_load): Call bfd_link_get_defined_symbol to check if a symbol is defined. * elf64-x86-64.c (elf_x86_64_convert_load): Call bfd_link_get_defined_symbol to get defined symbol section and value. * linker.c (bfd_link_get_defined_symbol): New function. * bfd-in2.h: Regenerated. ld/testsuite/ PR ld/19171 * ld-i386/lea1.s: Add tests for address load of __start_XXX and __stop_XXX. * ld-i386/mov1.s: Likewise. * ld-x86-64/lea1.s: Likewise. * ld-x86-64/mov1.s: Likewise. * ld-i386/lea1a.d: Updated. * ld-i386/lea1b.d: Likewise. * ld-i386/lea1c.d: Likewise. * ld-i386/mov1a.d: Likewise. * ld-i386/mov1b.d: Likewise. * ld-x86-64/lea1a.d: Likewise. * ld-x86-64/lea1b.d: Likewise. * ld-x86-64/lea1c.d: Likewise. * ld-x86-64/lea1d.d: Likewise. * ld-x86-64/lea1e.d: Likewise. * ld-x86-64/lea1f.d: Likewise. * ld-x86-64/mov1a.d: Likewise. * ld-x86-64/mov1b.d: Likewise. * ld-x86-64/mov1c.d: Likewise. * ld-x86-64/mov1d.d: Likewise.
2015-10-23Add a test for PR ld/19167H.J. Lu5-0/+28
PR ld/19167 * ld-gc/gc.exp: Run pr19167 test. * ld-gc/pr19167.d: New file. * ld-gc/pr19167a.s: Likewise. * ld-gc/pr19167b.s: Likewise.
2015-10-22Always keep sections marked with SEC_KEEPH.J. Lu5-0/+49
SEC_KEEP check in elf_gc_sweep was missing in commit: commit bde6f3eb6dff94cea1d471e15c6154d55d49820f Author: H.J. Lu <hjl.tools@gmail.com> Date: Fri Jan 8 01:43:23 2010 +0000 Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX bfd/ 2010-01-07 H.J. Lu <hongjiu.lu@intel.com> PR ld/11133 * elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for undefined __start_XXX/__stop_XXX in all input files and set SEC_KEEP. This patch adds SEC_KEEP check to elf_gc_sweep. bfd/ PR ld/19161 * elflink.c (elf_gc_sweep): Always keep sections marked with SEC_KEEP. ld/testsuite/ PR ld/19161 * ld-gc/gc.exp: Run pr19161 test. * ld-gc/pr19161-1.c: New file. * ld-gc/pr19161-2.c: Likewise. * ld-gc/pr19161.d: Likewise.
2015-10-22Allow mmix-knuth-mmixware adjustments to objcopy --extract-symbols test.Hans-Peter Nilsson2-1/+22
* ld-scripts/script.exp (extract_symbol_test): Allow nm output of objcopy --extract-symbols result to differ from original on mmix-knuth-mmixware.
2015-10-22Add "-z call-nop=PADDING" option to ldH.J. Lu32-0/+569
The ld linker can transform indirect call to a locally defined function, foo, via its GOT slot, to either "NOP call foo" or "call foo NOP" where NOP is a 1-byte NOP padding. This patch adds a "-z call-nop=PADDING" option to x86 ld to control 1-byte NOP padding for x86 call instruction. PADDING is one of prefix-addr, prefix-nop, suffix-nop, prefix-NUMBER or suffix-NUMBER. bfd/ * elf32-i386.c (elf_i386_convert_load): Use call_nop_byte and check call_nop_as_suffix for 1-byte NOP padding to pad call. * elf64-x86-64.c (elf_x86_64_convert_load): Likewise. include/ * bfdlink.h (bfd_link_info): Add call_nop_as_suffix and call_nop_byte. ld/ * ld/ld.texinfo: Document "-z call-nop=PADDING" option. * emulparams/call_nop.sh: New file. * emulparams/elf_i386_be.sh: Source ${srcdir}/emulparams/call_nop.sh. * emulparams/elf_i386_chaos.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_iamcu.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set link_info.call_nop_byte if $CALL_NOP_BYTE isn't empty. ld/testsuite/ * ld-i386/call3.s: New file. * ld-i386/call3a.d: Likewise. * ld-i386/call3b.d: Likewise. * ld-i386/call3c.d: Likewise. * ld-i386/call3d.d: Likewise. * ld-i386/call3e.d: Likewise. * ld-i386/call3f.d: Likewise. * ld-i386/call3g.d: Likewise. * ld-i386/call3h.d: Likewise. * ld-i386/load1-nacl.d: Likewise. * ld-x86-64/call1.s: Likewise. * ld-x86-64/call1a.d: Likewise. * ld-x86-64/call1b.d: Likewise. * ld-x86-64/call1c.d: Likewise. * ld-x86-64/call1d.d: Likewise. * ld-x86-64/call1e.d: Likewise. * ld-x86-64/call1f.d: Likewise. * ld-x86-64/call1g.d: Likewise. * ld-x86-64/call1h.d: Likewise. * ld-x86-64/call1i.d: Likewise. * ld-x86-64/load1a-nacl.d: Likewise. * ld-x86-64/load1b-nacl.d: Likewise. * ld-x86-64/load1c-nacl.d: Likewise. * ld-x86-64/load1d-nacl.d: Likewise.
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu17-4/+390
This patch adds support for the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we convert mov foo@GOTPCREL(%rip), %reg to lea foo(%rip), %reg and convert call/jmp *foo@GOTPCREL(%rip) to nop call foo/jmp foo nop When PIC is false, convert test %reg, foo@GOTPCREL(%rip) to test $foo, %reg and convert binop foo@GOTPCREL(%rip), %reg to binop $foo, %reg where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf64-x86-64.c: Include opcode/i386.h. (x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (R_X86_64_standard): Replace R_X86_64_PLT32_BND with R_X86_64_REX_GOTPCRELX. (x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with need_convert_load. (elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_convert_mov_to_lea): Renamed to ... (elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX transformations. * reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New. (BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (tc_gen_reloc): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return true for BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-gotpcrel. * gas/i386/x86-64-gotpcrel.d: New file. * gas/i386/x86-64-gotpcrel.s: Likewise. * gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. * gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * gas/i386/ilp32/x86-64-localpic.d: Likewise. include/elf/ * x86-64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. ld/testsuite/ * ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/gotpcrel1.dd: New file. * ld-x86-64/gotpcrel1.out: Likewise. * ld-x86-64/gotpcrel1a.S: Likewise. * ld-x86-64/gotpcrel1b.c: Likewise. * ld-x86-64/gotpcrel1c.c: Likewise. * ld-x86-64/gotpcrel1d.S: Likewise. * ld-x86-64/load1.s: Likewise. * ld-x86-64/load1a.d: Likewise. * ld-x86-64/load1b.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d tests. Run gotpcrel1 test.
2015-10-22Add R_386_GOT32X support to gas and ldH.J. Lu36-5/+519
This patch adds support for the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I to gas and ld. It updates gas to generate R_386_GOT32X relocation for memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax" with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be transformed to "lea foo, %eax". With the locally defined symbol, foo, we convert mov foo@GOT[(%reg1)], %reg2 to lea foo[@GOTOFF(%reg1)], %reg2 and convert call/jmp *foo@GOT[(%reg)] to nop call foo/jmp foo nop When PIC is false, convert test %reg1, foo@GOT[(%reg2)] to test $foo, %reg1 and convert binop foo@GOT[(%reg1)], %reg2 to binop $foo, %reg2 where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf32-i386.c: Include opcode/i386.h. (elf_howto_table): Add R_386_GOT32X. (R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X. (elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_i386_check_relocs): Handle R_386_GOT32X. Replace need_convert_mov_to_lea with need_convert_load. (elf_i386_gc_sweep_hook): Handle R_386_GOT32X. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_convert_mov_to_lea): Renamed to ... (elf_i386_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_386_GOT32X transformations. * reloc.c (BFD_RELOC_386_GOT32X): New. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_GOT32X. (tc_gen_reloc): Likewise. (match_template): Force 0x8b encoding for "mov foo@GOT, %eax". (output_disp): Check for "call/jmp *mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. Set fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if BFD_RELOC_386_GOT32X should be generated. (i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2 is set. gas/testsuite/ * gas/i386/got.d: New file. * gas/i386/got.s: Likewise. * gas/i386/i386.exp: Run got. * gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X. * gas/i386/mixed-mode-reloc32.d: Likewise. * gas/i386/reloc32.d: Likewise. include/elf/ * i386.h (R_386_GOT32X): New relocation. ld/testsuite/ * ld-i386/branch1.d: New file. * ld-i386/branch1.s: Likewise. * ld-i386/call1.d: Likewise. * ld-i386/call1.s: Likewise. * ld-i386/call2.d: Likewise. * ld-i386/call2.s: Likewise. * ld-i386/got1.dd: Likewise. * ld-i386/got1.out: Likewise. * ld-i386/got1a.S: Likewise. * ld-i386/got1b.c: Likewise. * ld-i386/got1c.c: Likewise. * ld-i386/got1d.S: Likewise. * ld-i386/jmp1.d: Likewise. * ld-i386/jmp1.s: Likewise. * ld-i386/jmp2.d: Likewise. * ld-i386/jmp2.s: Likewise. * ld-i386/load1.d: Likewise. * ld-i386/load1.s: Likewise. * ld-i386/load2.d: Likewise. * ld-i386/load2.s: Likewise. * ld-i386/load3.d: Likewise. * ld-i386/load3.s: Likewise. * ld-i386/load4.s: Likewise. * ld-i386/load4a.d: Likewise. * ld-i386/load4b.d: Likewise. * ld-i386/load5.s: Likewise. * ld-i386/load5a.d: Likewise. * ld-i386/load5b.d: Likewise. * ld-i386/load6.d: Likewise. * ld-i386/load6.s: Likewise. * ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2, load1, load2, load3, load4a, load4b, load5a, load5b and load6 tests. Run got1 test.
2015-10-22S/390: ifunc: Enable the ifunc tests.Andreas Krebbel2-2/+7
ld/testsuite/ChangeLog: * ld-ifunc/ifunc.exp: Run ifunc tests on s390* targets.
2015-10-19Add test to ensure that ternary linker script operators copy symbol flags.Simon Dardis4-0/+30
* ld-elf/attributes.d: New test for symbol attribute copying. * ld-elf/attributes.ld: Part of above. * ld-elf/attributes.s: Likewise.
2015-10-16Convert mov to lea for loading address of local common symbolH.J. Lu12-0/+30
There is no need to check def_regular when converting mov to lea for loading address of local symbols since def_regular may be false for common symbols and SYMBOL_REFERENCES_LOCAL is sufficient. bfd/ * elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check def_regular. * elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise. ld/testsuite/ * ld-i386/lea1.s: Add a test for loading address of local common symbol. * ld-x86-64/lea1.s: Likewise. * ld-i386/lea1a.d: Updated. * ld-i386/lea1b.d: Likewise. * ld-i386/lea1c.d: Likewise. * ld-x86-64/lea1a.d: Likewise. * ld-x86-64/lea1b.d: Likewise. * ld-x86-64/lea1c.d: Likewise. * ld-x86-64/lea1d.d: Likewise. * ld-x86-64/lea1e.d: Likewise. * ld-x86-64/lea1f.d: Likewise.
2015-10-15objcopy --extract-symbol testcaseAlan Modra7-65/+44
Run the test for more than just ELF. Shows that objcopy --extract-symbol isn't working on PE, mips, mmix and some aout targets. * config/default.exp (size): New global. * ld-elf/extract-symbol-1.s, * ld-elf/extract-symbol-1.ld, * ld-elf/extract-symbol-1sec.d, * ld-elf/extract-symbol-1sym.d: Delete. * ld-scripts/script.exp (extract_symbol_test): New.
2015-10-12Skip the unversioned definition after the default versionH.J. Lu5-0/+34
We may see an unversioned definition after the default version. We should skip the unversioned definition in this case. bfd/ PR ld/19073 * elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned definition after the default version. ld/testsuite/ PR ld/19073 * ld-elf/pr19073.map: New file. * ld-elf/pr19073.rd: Likewise. * ld-elf/pr19073.s: Likewise. * ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
2015-10-07New ARC implementation.Nick Clifton2-1/+5
bfd * archures.c: Remove support for older ARC. Added support for new ARC cpus (ARC600, ARC601, ARC700, ARCV2). * bfd-in2.h: Likewise. * config.bfd: Likewise. * cpu-arc.c: Likewise. * elf32-arc.c: Totally changed file with a refactored inplementation of the ARC port. * libbfd.h: Added ARC specific relocation types. * reloc.c: Likewise. gas * config/tc-arc.c: Revamped file for ARC support. * config/tc-arc.h: Likewise. * doc/as.texinfo: Add new ARC options. * doc/c-arc.texi: Likewise. ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*. * emulparams/arcebelf_prof.sh: New file * emulparams/arcebelf.sh: Likewise. * emulparams/arceblinux_prof.sh: Likewise. * emulparams/arceblinux.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emultempl/arclinux.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise * Makefile.am: Add new ARC emulations. * Makefile.in: Regenerate. * NEWS: Mention the new feature. opcodes * arc-dis.c: Revamped file for ARC support * arc-dis.h: Likewise. * arc-ext.c: Likewise. * arc-ext.h: Likewise. * arc-opc.c: Likewise. * arc-fxi.h: New file. * arc-regs.h: Likewise. * arc-tbl.h: Likewise. binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact and ARCv2. (get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Likewise. * NEWS: Mention the new feature. include * dis-asm.h (arc_get_disassembler): Correct declaration. * arc-reloc.def: Macro file with definition of all relocation types. * arc.h: Changed macros for the newly supported ARC cpus. Altered enum defining the supported relocations. * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added macro for EM_ARC_COMPACT2. * arc-func.h: New file. * arc.h: Likewise.
2015-10-05Don't re-export common symbolsH.J. Lu3-2/+16
For ELF linker, a common symbol isn't a definition. When we decide if a symbol should be re-exported, we should check if the symbol isn't undefined, not if it is a definition. bfd/ PR ld/18914 * elflink.c (elf_link_add_object_symbols): Don't re-export a symbol if it isn't undefined. ld/testsuite/ PR ld/18914 * ld-elf/exclude.exp: Also check exclude_common. * ld-elf/exclude2.s: Add exclude_common.
2015-10-02[LD][AARCH64]Add TLSIE relaxation support under large memory model.Renlin Li4-0/+40
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add TLSIE_MOVW_GOTTPREL_G1. (aarch64_tls_transition_without_check): Add TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2 transition for local symbol. (elfNN_aarch64_tls_relax): Add a argument to pass tp offset. Add TLSIE_MOVW_GOTTPREL_G1 relaxation. (elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax with new argument. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test. * ld-aarch64/tls-relax-large-ie-le.d: New. * ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02[LD][AARCH64]Add TLSDESC support for large memory model.Renlin Li8-0/+145
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02[BFD][AARCH64]Add TLSGD relaxation support under large memory model.Renlin Li6-0/+81
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li4-0/+41
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li4-0/+56
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li4-0/+53
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li4-1/+42
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li4-1/+43
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.Renlin Li4-1/+39
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-01Create a PLT entry for R_X86_64_PC32 in non-code sectionsH.J. Lu6-4/+66
Since something like ".long foo - ." may be used as pointer, we make sure that PLT is used if foo is a function defined in a shared library. bfd/ PR ld/19031 * elf64-x86-64.c (elf_x86_64_check_relocs): Set pointer_equality_needed for R_X86_64_PC32 reloc in non-code sections. ld/testsuite/ PR ld/19031 * ld-x86-64/x86-64.exp: Run PR ld/19031 test. * ld-x86-64/pr19031.out: New file. * ld-x86-64/pr19031a.c: Likewise. * ld-x86-64/pr19031b.S: Likewise. * ld-x86-64/pr19031c.c: Likewise.
2015-10-01[BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.Renlin Li4-0/+24
bfd/ 2015-10-01 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove. (elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once. ld/testsuite/ 2015-10-01 Renlin Li <renlin.li@arm.com> * ld-aarch64/plt_mapping_symbol.d: New. * ld-aarch64/plt_mapping_symbol.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01Update ld-x86-64/pr19013-nacl.dAlan Modra2-1/+2
* ld-x86-64/pr19013-nacl.d: Update.
2015-10-01Revert "Also check e_machine when merging sections"Alan Modra2-1/+5
Commit 9865bd0d added a bogus check in _bfd_elf_merge_sections. bfd/ PR ld/19013 * elflink.c (_bfd_elf_merge_sections): Revert last change. ld/testsuite/ * ld-x86-64/pr19013-x32.d: Update.
2015-09-30Pass -m elf_x86_64 to ld for 64-bit testH.J. Lu2-1/+5
* ld-x86-64/pr19013.d (ld): Add -m elf_x86_64.
2015-09-30Create a PLT entry for R_386_PC32 in non-code sectionsH.J. Lu6-0/+67
Since something like ".long foo - ." may be used as pointer, we make sure that PLT is used if foo is a function defined in a shared library. bfd/ PR ld/19031 * elf32-i386.c (elf_i386_check_relocs): Set pointer_equality_needed for R_386_PC32 reloc in non-code sections. ld/testsuite/ PR ld/19031 * ld-i386/i386.exp: Run PR ld/19031 test. * ld/testsuite/ld-i386/pr19031.out: New file. * ld/testsuite/ld-i386/pr19031a.c: Likewise. * ld/testsuite/ld-i386/pr19031b.S: Likewise. * ld/testsuite/ld-i386/pr19031c.c: Likewise.
2015-09-30Also check e_machine when merging sectionsH.J. Lu6-0/+43
When we check consistency for merge ELF sections, we should not only check EI_CLASS, but also compatible e_machine. bfd/ PR ld/19013 * elflink.c (_bfd_elf_merge_sections): Only merge input bfds that have the compatible ELF machine code with the output bfd. ld/testsuite/ PR ld/19013 * ld-x86-64/pr19013-nacl.d: New file. * ld-x86-64/pr19013-x32.d: Likewise. * ld-x86-64/pr19013.d: Likewise. * ld-x86-64/pr19013.s: Likewise. * ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
2015-09-29Adjust the output section size to skip gap fillsH.J. Lu4-0/+34
In objcopy, copy_object calls copy_section to copy contents of input section to output section. When --gap-fill= is used, objcopy extends the size of output sectios to fill gaps between output sections with gap fills. In this case, we adjust the output section size to skip gap files to avoid reading beypond the input section buffer before calling copy_section and restore the output section size after input sections have been copied. binutils/ PR binutils/19005 * objcopy.c (copy_object): Adjust the output section size to skip gap fills between sections when copying from input sections to output sections. ld/testsuite/ PR binutils/19005 * ld-elf/pr19005.d: New file. * ld-elf/pr19005.s: Likewise. * ld-elf/pr19005.t: Likewise.
2015-09-25Correct the generation of OR1K pc-relative relocations.Peter Zotov2-1/+6
gas PR ld/18759 * config/tc-or1k.c (tc_gen_reloc): Correct computation of PC relative relocs. * config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete. bfd * elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE. (R_OR1K_16_PCREL): Likewise. (R_OR1K_8_PCREL): Likewise. ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-22Update MIPS PIE tests for DF_1_PIE changeH.J. Lu4-16/+25
Since linker now sets the DF_1_PIE bit in the DT_FLAGS_1 tag for PIE, we need to update MIPS PIE tests for it. * ld-mips-elf/pie-n32.d: Updated. * ld-mips-elf/pie-n64.d: Likewise. * ld-mips-elf/pie-o32.d: Likewise.
2015-09-22Set DF_1_PIE in gld${EMULATION_NAME}_after_parseH.J. Lu2-0/+12
We can't add OPTION_PIE to gld${EMULATION_NAME}_handle_option since it has been handled in parse_args in lexsup.c. This patch moves setting DF_1_PIE to gld${EMULATION_NAME}_after_parse. ld/ * emultempl/alphaelf.em (alpha_after_parse): Call gld${EMULATION_NAME}_after_parse instead of after_parse_default. * emultempl/cr16elf.em (cr16elf_after_parse): Likewise. * emultempl/crxelf.em (crxelf_after_parse); Likewise. * emultempl/hppaelf.em (hppaelf_after_parse): Likewise. * emultempl/mipself.em (mips_after_parse): Likewise. * emultempl/nds32elf.em (nds32_elf_after_parse): Likewise. * emultempl/elf32.em: Don't include ldlex.h. (gld${EMULATION_NAME}_after_parse): New function. (gld${EMULATION_NAME}_handle_option) [GENERATE_PIE_SCRIPT] <OPTION_PIE>: Removed. (ld_${EMULATION_NAME}_emulation): Replace after_parse_default with gld${EMULATION_NAME}_after_parse. * emultempl/ia64elf.em (gld${EMULATION_NAME}_after_parse): Renamed to ... (ia64elf_after_parse): This. Call gld${EMULATION_NAME}_after_parse instead of after_parse_default. (LDEMUL_AFTER_PARSE): Replace gld${EMULATION_NAME}_after_parse with ia64elf_after_parse. ld/testsuite/ * ld-elf/pie.d: New test.
2015-09-18Delay converting linker script defined symbols from absoluteAlan Modra9-5/+65
Giving linker script symbols defined outside of output sections a section-relative value early, leads to them being used in expressions as if they were defined inside an output section. This can mean loss of the section VMA, and wrong results. ld/ PR ld/18963 * ldexp.h (struct ldexp_control): Add rel_from_abs. (ldexp_finalize_syms): Declare. * ldexp.c (new_rel_from_abs): Keep absolute for expressions outside of output section statements. Set rel_from_abs. (make_abs, exp_fold_tree, exp_fold_tree_no_dot): Clear rel_from_abs. (struct definedness_hash_entry): Add final_sec, and comment. (update_definedness): Set final_sec. (set_sym_sections, ldexp_finalize_syms): New functions. * ldlang.c (lang_process): Call ldexp_finalize_syms. ld/testsuite PR ld/18963 * ld-scripts/pr18963.d, * ld-scripts/pr18963.t: New test. * ld-scripts/expr.exp: Run it. * ld-elf/provide-hidden-2.ld: Explicitly make "dot" absolute. * ld-mips-elf/gp-hidden.sd: Don't care about _gp section. * ld-mips-elf/no-shared-1-n32.d: Don't care about symbol shown at start of .data section. * ld-mips-elf/no-shared-1-n64.d: Likewise. * ld-mips-elf/no-shared-1-o32.d: Likewise.
2015-09-11Add "ld -r" tests for PR ld/15323H.J. Lu3-5/+26
Weak defined function is turned into non-weak defined function by "ld -r -flto" with GCC 5 due to a GCC 5 regression: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67548 Add "ld -r" tests for PR ld/15323 to make sure that any linker change won't introduce linker regression for PR ld/15323. * ld-plugin/lto.exp (lto_link_tests): Add a "ld -r" test for PR ld/15323. (lto_run_tests): Add a "ld -r" test for PR ld/15323.
2015-09-09[AArch64] Relax TLS local dynamic traditional into local executableJiong Wang6-0/+88
The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-07ld: Fix failures in new orphan handling tests.Andrew Burgess4-7/+16
The new orphan handling tests added in commit c005eb9 fail on a range of targets. Some of the failures were fixed in commit e32aa93 but not all. This commit should address the remaining failures. Update results to account for orphan sections being placed in different orders, and for other, target specific sections, being discarded. ld/testsuite/ChangeLog: * ld-elf/orphan-7.map: Allow for other discarded sections. * ld-elf/orphan-8.map: Updated to allow for different section ordering on different targets. * ld-elf/orphan.ld: Place .sbss section.
2015-09-05Update ld-elf/orphan-8.map to support 32-bit targetsH.J. Lu2-4/+8
* ld-elf/orphan-8.map: Updated to support 32-bit targets.
2015-09-04ld: Extend options for altering orphan handling behaviour.Andrew Burgess10-14/+49
Replace the options --warn-orphan and --no-warn-orphan with a single option --orphan-handling=MODE, where mode can be place, warn, error, and discard. Mode 'place' is the default, and is the current behaviour, placing the orphan section into a suitable output section. Mode 'warn' is the same as '--warn-orphan'. The orphan is also placed using the same algorithm as for 'place'. Mode 'error' is the same as '--warn-orphan' and '--fatal-warnings'. Mode 'discard' assigns all output sections to the /DISCARD/ section. ld/ChangeLog: * ld.h (enum orphan_handling_enum): New. (ld_config_type): Remove warn_orphan, add orphan_handling. * ldemul.c (ldemul_place_orphan): Remove warning about orphan sections. * ldlang.c (ldlang_place_orphan): New function. (lang_place_orphans): Call ldlang_place_orphan. * ldlex.h (enum option_values): Remove OPTION_WARN_ORPHAN and OPTION_NO_WARN_ORPHAN, add OPTION_ORPHAN_HANDLING. * lexsup.c (ld_options): Remove 'warn-orphan' and 'no-warn-orphan', add 'orphan-handling'. (parse_args): Remove handling for OPTION_WARN_ORPHAN and OPTION_NO_WARN_ORPHAN, add handling for OPTION_ORPHAN_HANDLING. * NEWS: Replace text about --warn-orphan with --orphan-handling. * ld.texinfo (Options): Remove --warn-orphan entry and add entry on --orphan-handling. (Orphan Sections): Add reference to relevant command line options. ld/testsuite/ChangeLog: * ld-elf/elf.exp: Switch to rely on run_dump_test. * ld-elf/orphan-5.l: Update expected output. * ld-elf/orphan-5.d: New file. * ld-elf/orphan-6.d: New file. * ld-elf/orphan-6.l: New file. * ld-elf/orphan-7.d: New file. * ld-elf/orphan-7.map: New file. * ld-elf/orphan-8.d: New file. * ld-elf/orphan-8.map: New file.
2015-09-03Add ifunc tests for call, jmp, add, testH.J. Lu9-81/+50
* ld-ifunc/ifunc-21-i386.s: Add tests for call, jmp, add, test. * ld-ifunc/ifunc-21-x86-64.s: Likewise. * ld-ifunc/ifunc-22-i386.s: Likewise. * ld-ifunc/ifunc-22-x86-64.s: Likewise. * ld-ifunc/ifunc-21-i386.d: Updated. * ld-ifunc/ifunc-21-x86-64.d: Likewise. * ld-ifunc/ifunc-22-i386.d: Likewise. * ld-ifunc/ifunc-22-x86-64.d: Likewise.
2015-09-02Add 2 ifunc tests for i386 and x86-64H.J. Lu9-0/+211
* ld-ifunc/ifunc-21-i386.d: Likewise. * ld-ifunc/ifunc-21-i386.s: Likewise. * ld-ifunc/ifunc-21-x86-64.d: Likewise. * ld-ifunc/ifunc-21-x86-64.s: Likewise. * ld-ifunc/ifunc-22-i386.d: Likewise. * ld-ifunc/ifunc-22-i386.s: Likewise. * ld-ifunc/ifunc-22-x86-64.d: Likewise. * ld-ifunc/ifunc-22-x86-64.s: Likewise.
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