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2019-09-23ld-plugin/pr24406-1.c: Correct buffer size to readH.J. Lu1-1/+1
* testsuite/ld-plugin/pr24406-1.c (main): Correct buffer size to read.
2019-09-22Work around gcc10 FAIL: S-records with constructorsAlan Modra1-1/+1
gcc10 on x86_64 and powerpc64le recognises that the loop in Foo::operator= can be turned into a call to memmove, which then results in an undefined symbol when linking. Avoid that by making the loop smaller. * testsuite/ld-srec/sr3.cc (FOO_MSG_LEN): Set to 4.
2019-09-20RISC-V: Optimize lui and auipc relaxations for undefweak symbol.Jim Wilson4-24/+32
For the lui and auipc relaxations, since the symbol value of an undefined weak symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI instruction. bfd/ * elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak. (riscv_record_pcgp_hi_reloc): New parameter undefined_weak. Set undefined_weak field from it. (relax_func_t): New parameter undefined_weak. (_bfd_riscv_relax_call): New ignored parameter undefined_weak. (_bfd_riscv_relax_tls_le): Likewise. (_bfd_riscv_relax_align): Likewise. (_bfd_riscv_relax_delete): Likewise. (_bfd_riscv_relax_lui): New parameter undefined_weak. If true, allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak. (_bfd_riscv_relax_pc): New parameter undefined_weak. For LO12* relocs, set undefined_weak from hi_reloc. If true, allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak and change to non-pcrel reloc. (_bfd_riscv_relax_section): New local undefined_weak. Set for undef weak relocs that can be relaxed. Pass to relax_func call. ld/ * testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code. * testsuite/ld-riscv-elf/weakref64.s: Likewise. * testsuite/ld-riscv-elf/weakref32.d: Updated. * testsuite/ld-riscv-elf/weakref64.d: Updated.
2019-09-11Rename elf32.em to elf.emAlan Modra15-15/+15
* emultempl/elf32.em: Remove "misnamed" comment. Rename to.. * emultempl/elf.em: ..this. * configure.ac (elf_list_options): Adjust TEMPLATE_NAME grep. * emulparams/aarch64cloudabi.sh (TEMPLATE_NAME): Set to elf. * emulparams/aarch64elf.sh: Likewise. * emulparams/aarch64elf32.sh: Likewise. * emulparams/aarch64fbsd.sh: Likewise. * emulparams/aarch64linux.sh: Likewise. * emulparams/aarch64linux32.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/armelf.sh: Likewise. * emulparams/armelf_fuchsia.sh: Likewise. * emulparams/armelf_linux.sh: Likewise. * emulparams/armelf_phoenix.sh: Likewise. * emulparams/armnto.sh: Likewise. * emulparams/avr1.sh: Likewise. * emulparams/avr2.sh: Likewise. * emulparams/avr25.sh: Likewise. * emulparams/avr3.sh: Likewise. * emulparams/avr31.sh: Likewise. * emulparams/avr35.sh: Likewise. * emulparams/avr4.sh: Likewise. * emulparams/avr5.sh: Likewise. * emulparams/avr51.sh: Likewise. * emulparams/avr6.sh: Likewise. * emulparams/avrtiny.sh: Likewise. * emulparams/avrxmega1.sh: Likewise. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emulparams/criself.sh: Likewise. * emulparams/crislinux.sh: Likewise. * emulparams/cskyelf.sh: Likewise. * emulparams/d10velf.sh: Likewise. * emulparams/elf32_sparc.sh: Likewise. * emulparams/elf32_spu.sh: Likewise. * emulparams/elf32_tic6x_le.sh: Likewise. * emulparams/elf32_x86_64.sh: Likewise. * emulparams/elf32am33lin.sh: Likewise. * emulparams/elf32bfin.sh: Likewise. * emulparams/elf32bfinfd.sh: Likewise. * emulparams/elf32bmip.sh: Likewise. * emulparams/elf32bmipn32-defs.sh: Likewise. * emulparams/elf32cr16.sh: Likewise. * emulparams/elf32cr16c.sh: Likewise. * emulparams/elf32crx.sh: Likewise. * emulparams/elf32epiphany.sh: Likewise. * emulparams/elf32epiphany_4x4.sh: Likewise. * emulparams/elf32frvfd.sh: Likewise. * emulparams/elf32ip2k.sh: Likewise. * emulparams/elf32lm32.sh: Likewise. * emulparams/elf32lm32fd.sh: Likewise. * emulparams/elf32lriscv-defs.sh: Likewise. * emulparams/elf32m32c.sh: Likewise. * emulparams/elf32mb_linux.sh: Likewise. * emulparams/elf32mbel_linux.sh: Likewise. * emulparams/elf32mcore.sh: Likewise. * emulparams/elf32mep.sh: Likewise. * emulparams/elf32metag.sh: Likewise. * emulparams/elf32microblaze.sh: Likewise. * emulparams/elf32mipswindiss.sh: Likewise. * emulparams/elf32or1k.sh: Likewise. * emulparams/elf32ppccommon.sh: Likewise. * emulparams/elf32rl78.sh: Likewise. * emulparams/elf32rx.sh: Likewise. * emulparams/elf32tilegx.sh: Likewise. * emulparams/elf32tilepro.sh: Likewise. * emulparams/elf32vax.sh: Likewise. * emulparams/elf32visium.sh: Likewise. * emulparams/elf32xc16x.sh: Likewise. * emulparams/elf32xc16xl.sh: Likewise. * emulparams/elf32xc16xs.sh: Likewise. * emulparams/elf32xstormy16.sh: Likewise. * emulparams/elf32xtensa.sh: Likewise. * emulparams/elf64_aix.sh: Likewise. * emulparams/elf64_ia64.sh: Likewise. * emulparams/elf64_s390.sh: Likewise. * emulparams/elf64_sparc.sh: Likewise. * emulparams/elf64alpha.sh: Likewise. * emulparams/elf64bpf.sh: Likewise. * emulparams/elf64hppa.sh: Likewise. * emulparams/elf64mmix.sh: Likewise. * emulparams/elf64rdos.sh: Likewise. * emulparams/elf64tilegx.sh: Likewise. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_i386_be.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_iamcu.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_s390.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * emulparams/h8300elf.sh: Likewise. * emulparams/h8300elf_linux.sh: Likewise. * emulparams/hppa64linux.sh: Likewise. * emulparams/hppaelf.sh: Likewise. * emulparams/hppalinux.sh: Likewise. * emulparams/i386lynx.sh: Likewise. * emulparams/i386moss.sh: Likewise. * emulparams/i386nto.sh: Likewise. * emulparams/m32relf.sh: Likewise. * emulparams/m32relf_linux.sh: Likewise. * emulparams/m68hc11elf.sh: Likewise. * emulparams/m68hc11elfb.sh: Likewise. * emulparams/m68hc12elf.sh: Likewise. * emulparams/m68hc12elfb.sh: Likewise. * emulparams/m68kelf.sh: Likewise. * emulparams/mn10300.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nios2elf.sh: Likewise. * emulparams/nios2linux.sh: Likewise. * emulparams/pruelf.sh: Likewise. * emulparams/score3_elf.sh: Likewise. * emulparams/shelf.sh: Likewise. * emulparams/shelf_nto.sh: Likewise. * emulparams/shelf_vxworks.sh: Likewise. * emulparams/shlelf_linux.sh: Likewise. * emulparams/shlelf_nto.sh: Likewise. * emulparams/v850.sh: Likewise. * emulparams/v850_rh850.sh: Likewise. * ldelf.c: Update comment. * ldelf.h: Likewise. * emultempl/aarch64elf.em: Likewise. * emultempl/alphaelf.em: Likewise. * emultempl/arclinux.em: Likewise. * emultempl/armelf.em: Likewise. * emultempl/avrelf.em: Likewise. * emultempl/bfin.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/crxelf.em: Likewise. * emultempl/cskyelf.em: Likewise. * emultempl/elf-generic.em: Likewise. * emultempl/elf-x86.em: Likewise. * emultempl/epiphanyelf_4x4.em: Likewise. * emultempl/hppaelf.em: Likewise. * emultempl/ia64elf.em: Likewise. * emultempl/m68hc1xelf.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/metagelf.em: Likewise. * emultempl/mmix-elfnmmo.em: Likewise. * emultempl/mmixelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/needrelax.em: Likewise. * emultempl/nios2elf.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/pruelf.em: Likewise. * emultempl/rxelf.em: Likewise. * emultempl/scoreelf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/tic6xdsbt.em: Likewise. * emultempl/v850elf.em: Likewise. * emultempl/vms.em: Likewise. * emultempl/vxworks.em: Likewise. * emultempl/xtensaelf.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/armbpabi.sc: Likewise. * scripttempl/elf.sc: Likewise. * scripttempl/elf64bpf.sc: Likewise. * scripttempl/elf64hppa.sc: Likewise. * scripttempl/elf_chaos.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise. * scripttempl/elfd10v.sc: Likewise. * scripttempl/elfm68hc11.sc: Likewise. * scripttempl/elfm68hc12.sc: Likewise. * scripttempl/elfm9s12z.sc: Likewise. * scripttempl/elfxgate.sc: Likewise. * scripttempl/elfxtensa.sc: Likewise. * scripttempl/epiphany_4x4.sc: Likewise. * scripttempl/iq2000.sc: Likewise. * scripttempl/mep.sc: Likewise. * scripttempl/nds32elf.sc: Likewise. * scripttempl/v850.sc: Likewise. * scripttempl/v850_rh850.sc: Likewise. * scripttempl/xstormy16.sc: Likewise. * testsuite/ld-arm/arm-dyn.ld: Likewise. * testsuite/ld-arm/arm-lib.ld: Likewise. * testsuite/ld-arm/arm-no-rel-plt.ld: Likewise. * testsuite/ld-arm/fdpic-main.ld: Likewise. * testsuite/ld-arm/fdpic-shared.ld: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/pr349.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise. * testsuite/ld-elfvsb/elf-offset.ld: Likewise. * testsuite/ld-mips-elf/mips-dyn.ld: Likewise. * testsuite/ld-mips-elf/mips-lib.ld: Likewise. * testsuite/ld-scripts/dynamic-sections.t: Likewise. * testsuite/ld-shared/elf-offset.ld: Likewise. * configure: Regenerate.
2019-09-09i386: Adjust for new output format from readelfH.J. Lu13-13/+13
PR binutils/24887 * testsuite/ld-i386/property-1.r: Adjust for new output format from readelf. * testsuite/ld-i386/property-1a.r: Likewise. * testsuite/ld-i386/property-2.r: Likewise. * testsuite/ld-i386/property-2a.r: Likewise. * testsuite/ld-i386/property-3.r: Likewise. * testsuite/ld-i386/property-3a.r: Likewise. * testsuite/ld-i386/property-4.r: Likewise. * testsuite/ld-i386/property-4a.r: Likewise. * testsuite/ld-i386/property-5.r: Likewise. * testsuite/ld-i386/property-5a.r: Likewise. * testsuite/ld-i386/property-6.r: Likewise. * testsuite/ld-i386/property-7.r: Likewise. * testsuite/ld-i386/property-7a.r: Likewise. * testsuite/ld-i386/property-1.r: Likewise. * testsuite/ld-i386/property-1a.r: Likewise. * testsuite/ld-i386/property-2.r: Likewise. * testsuite/ld-i386/property-2a.r: Likewise. * testsuite/ld-i386/property-3.r: Likewise. * testsuite/ld-i386/property-3a.r: Likewise. * testsuite/ld-i386/property-4.r: Likewise. * testsuite/ld-i386/property-4a.r: Likewise. * testsuite/ld-i386/property-5.r: Likewise. * testsuite/ld-i386/property-5a.r: Likewise. * testsuite/ld-i386/property-6.r: Likewise. * testsuite/ld-i386/property-7.r: Likewise. * testsuite/ld-i386/property-7a.r: Likewise.
2019-09-05R_PPC64_PCREL_OPTAlan Modra2-5/+24
The loads and stores handled in the second instruction of a sequence marked by R_PPC64_PCREL_OPT may be a prefix instruction. For example: pld ra,symbol@got@pcrel 0: pld rt,off(ra) .reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8) can be optimised to pld rt,symbol+off@pcrel pnop * elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores in second instruction. (ppc64_elf_relocate_section): Likewise.
2019-08-22AArch64: Fix LD crash on weak and undefined TLS symbols. (PR/24602).Tamar Christina5-0/+56
This patch fixes a few linker crashes due to TLS code reaching an assert when it shouldn't. The first scenario is with weak TLS symbols that remain weak during linking. In this case the mid-end would not have seen a TLS symbol and so wouldn't have allocated the TLS section. We currently assert here and the linker crashes with a not very useful message. This patch changes this to return the value 0 for the TLS symbol in question emulating what lld and gold and other BFD targets do. However because weak TLS is implementation defined and we don't define any behavior for it I also emit a warning to the user to inform them of such. Secondly when a strong TLS reference is undefined. The linker crashes even after it correctly reported that there is an undefined reference. This changes it so that it gracefully exits and reports a useful error. bfd/ChangeLog: PR ld/24601 * elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS. Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it. * elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning for weak TLS. ld/ChangeLog: PR ld/24601 * testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New. * testsuite/ld-aarch64/undef-tls.d: New test. * testsuite/ld-aarch64/undef-tls.s: New test. * testsuite/ld-aarch64/weak-tls.d: New test. * testsuite/ld-aarch64/weak-tls.s: New test.
2019-08-20Arm: Fix performance issue with thumb-2 tailcallsTamar Christina23-77/+77
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc). The NOP is never executed but may result in a performance penalty on some cores. For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2 and adds a note to this in the source code for future reference. bfd/ChangeLog: * elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub, elf32_arm_stub_long_branch_v4t_thumb_thumb, elf32_arm_stub_long_branch_v4t_thumb_arm, elf32_arm_stub_short_branch_v4t_thumb_arm, elf32_arm_stub_long_branch_v4t_thumb_arm_pic, elf32_arm_stub_long_branch_v4t_thumb_thumb_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to previous instruction. ld/ChangeLog: * testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase. * testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-app2.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * testsuite/ld-arm/fix-arm1176-on.d: Likewise. * testsuite/ld-arm/ifunc-10.dd: Likewise. * testsuite/ld-arm/ifunc-2.dd: Likewise. * testsuite/ld-arm/ifunc-4.dd: Likewise. * testsuite/ld-arm/ifunc-6.dd: Likewise. * testsuite/ld-arm/ifunc-8.dd: Likewise. * testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise. * testsuite/ld-arm/mixed-app.d: Likewise. * testsuite/ld-arm/thumb2-b-interwork.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise. * testsuite/ld-arm/tls-thumb1.d: Likewise.
2019-08-16x86-64: Move PIC check for PC-relative relocations backH.J. Lu5-0/+24
commit 83924b3846361f2f76f9a6e7b5afa01c0eebbd4f Author: H.J. Lu <hjl.tools@gmail.com> Date: Tue Feb 5 18:45:23 2019 -0800 x86-64: Restore PIC check for PCREL reloc against protected symbol moved PIC check for PC-relative relocations to elf_x86_64_check_relocs. Since linker defined symbols may not be processed at the time, we need to move the check back to elf_x86_64_relocate_section. bfd/ PR ld/24905 * elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for PC-relative relocations back to ... (elf_x86_64_relocate_section): Here. ld/ PR ld/24905 * testsuite/ld-x86-64/pr24905-x32.d: New file. * testsuite/ld-x86-64/pr24905.d: Likewise. * testsuite/ld-x86-64/pr24905.s: Likewise. * testsuite/ld-x86-64/pr24905.t: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run pr24905 and pr24905-x32.
2019-08-15RISC-V: Fix lui relaxation issue with code at address 0.Jim Wilson4-0/+38
This fixes a problem originally reported at https://github.com/riscv/riscv-binutils-gdb/issues/173 If you have code linked at address zero, you can have a lui instruction loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1 followed by addi -0x800). Relaxation can reduce the value below 0x800 at which point the c.lui 0x0 is no longer valid. We can fix this by converting the c.lui to a c.li which can load 0. bfd/ * elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction to c.li instruction, and use ENCODE_RVC_IMM to set value. ld/ * testsuite/ld-riscv-elf/c-lui-2.d: New. * testsuite/ld-riscv-elf/c-lui-2.ld: New. * testsuite/ld-riscv-elf/c-lui-2.s: New. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
2019-08-09Add support for a MIPS specific .MIPS.xhash section.Mihailo Stojanovic9-18/+50
This patch is a reimplementation of [1] which was submitted in 2015 by Neil Schellenberger. Copyright issue was sorted out [2] last year. It proposed a new section (.gnu.xhash) and related dynamic tag (DT_GNU_XHASH). The new section would be virtually identical to the existing .gnu.hash except for the translation table (xlat) which would contain correct MIPS .dynsym indexes corresponding to the hashvals in chains. This is because MIPS ABI imposes a different ordering on the dynsyms than the one expected by the .gnu.hash section. Another addition would be a leading word (ngnusyms) which would contain the number of entries in the translation table. In this patch, the new section name and dynamic tag are changed to reflect the fact that the section should be treated as MIPS-specific (.MIPS.xhash and DT_MIPS_XHASH). This patch addresses the alignment issue as reported in [3], which is caused by the leading word added to the .MIPS.xhash section. Leading word is removed in this patch, and the number of entries in the translation table is now calculated using DT_MIPS_SYMTABNO dynamic tag (this is addressed by the corresponding glibc patch). Suggestions on coding style in [4] were taken into account. Existing GNU hash testcase was covered, and another one was added in the MIPS part of the testsuite. The other major change is reserving MIPS ABI version 5 for .MIPS.xhash, marking the need of support for .MIPS.xhash in the dynamic linker (again, addressed in the corresponding glibc patch). This is something which I am not sure of, especially after reading [5]. I am confused on whether this ABI version is reserved for IFUNC, or it can be used for this purpose. Already mentioned glibc patch is submitted at: https://sourceware.org/ml/libc-alpha/2019-06/msg00456.html [1] https://sourceware.org/ml/binutils/2015-10/msg00057.html [2] https://sourceware.org/ml/binutils/2018-03/msg00025.html [3] https://sourceware.org/ml/binutils/2016-01/msg00006.html [4] https://sourceware.org/ml/binutils/2016-02/msg00097.html [5] https://sourceware.org/ml/libc-alpha/2016-12/msg00853.html ld * emulparams/elf32bmip.sh: Add .MIPS.xhash section. * emulparams/elf32bmipn32-defs.sh: Add .MIPS.xhash section. * emulparams/elf64bmip-defs.sh: Add .MIPS.xhash section. * emultempl/mipself.em: Remove mips_after_parse function. * testsuite/ld-elf/hash.d: Update comment. * testsuite/ld-mips-elf/hash1.d: New test. * testsuite/ld-mips-elf/hash1.s: Ditto. * testsuite/ld-mips-elf/hash1a.d: Remove. * testsuite/ld-mips-elf/hash1b.d: Ditto. * testsuite/ld-mips-elf/hash1c.d: Ditto * testsuite/ld-mips-elf/hash2.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: New tests. * testsuite/ld-mips-elf/start.s: New test. bfd * elf-bfd.h (struct elf_backend_data): New members. * elflink.c (_bfd_elf_link_create_dynamic_sections): Create .gnu.hash section if necessary. (struct collect_gnu_hash_codes): New member. (elf_gnu_hash_process_symidx): New function name. (elf_renumber_gnu_hash_syms): Ignore local and undefined symbols. Record xlat location for every symbol which should have a .MIPS.xhash entry. (bfd_elf_size_dynamic_sections): Add DT_GNU_HASH dynamic tag to dynamic section if necessary. (GNU_HASH_SECTION_NAME): New define. (bfd_elf_size_dynsym_hash_dynstr): Get .MIPS.xhash section. Update the section size info. * elfxx-mips.c (struct mips_elf_hash_sort_data): New members. (struct mips_elf_link_hash_entry): New member. (mips_elf_link_hash_newfunc): Initialize .MIPS.xhash translation table location. (mips_elf_sort_hash_table): Initialize the pointer to the .MIPS.xhash section. (mips_elf_sort_hash_table_f): Populate the .MIPS.xhash translation table entry with the symbol dynindx. (_bfd_mips_elf_section_from_shdr): Add SHT_MIPS_XHASH. (_bfd_mips_elf_fake_sections): Initialize .MIPS.xhash section info. (_bfd_mips_elf_create_dynamic_sections): Create .MIPS.xhash section. (_bfd_mips_elf_size_dynamic_sections): Add DT_MIPS_XHASH tag to dynamic section. (_bfd_mips_elf_finish_synamic_sections): Add DT_MIPS_XHASH. (_bfd_mips_elf_final_write_processing): Set .MIPS.xhash section sh_link info. (_bfd_mips_elf_get_target_dtag): Get DT_MIPS_XHASH tag. (MIPS_LIBC_ABI_XHASH): New ABI version enum value. (_bfd_mips_post_process_headers): Mark the ABI version as MIPS_LIBC_ABI_XHASH if there exists a .MIPS.xhash section, but not a .hash section. (_bfd_mips_elf_record_xhash_symbol): New function. Record a position in the translation table, associated with the hash entry. * elfxx-mips.h (literal_reloc_p): Define elf_backend_record_xhash_symbol backend hook. * elfxx-target.h: Initialize elf_backend_record_xhash_symbol backend hook. include * elf/mips.h (SHT_GNU_XHASH): New define. (DT_GNU_XHASH): New define. binutils * readelf.c (get_mips_dynamic_type): Return MIPS_XHASH dynamic type. (get_mips_section_type_name): Return MI{S_XHASH name string. (dynamic_section_mips_val): Initialize the .MIPS.xhash dynamic info. (process_symbol_table): Initialize the .MIPS.xhash section pointer. Adjust the readelf output to support the new section. (process_object): Set the .MIPS.xhash dynamic info to zero.
2019-08-08Change the output of readelf's note display so that the "Data size" column ↵Nick Clifton125-125/+125
header is left justified. PR 24887 binutils* readelf.c (process_notes_at): Left justify the "Data size" column heading. * testsuite/binutils-all/i386/empty.d: Adjust for new output format. * testsuite/binutils-all/i386/ibt.d: Likewise. * testsuite/binutils-all/i386/pr21231a.d: Likewise. * testsuite/binutils-all/i386/pr21231b.d: Likewise. * testsuite/binutils-all/i386/shstk.d: Likewise. * testsuite/binutils-all/note-2-32.d: Likewise. * testsuite/binutils-all/note-2-64.d: Likewise. * testsuite/binutils-all/x86-64/empty-x32.d: Likewise. * testsuite/binutils-all/x86-64/empty.d: Likewise. * testsuite/binutils-all/x86-64/ibt-x32.d: Likewise. * testsuite/binutils-all/x86-64/ibt.d: Likewise. * testsuite/binutils-all/x86-64/pr21231a.d: Likewise. * testsuite/binutils-all/x86-64/pr21231b.d: Likewise. * testsuite/binutils-all/x86-64/pr23494a-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494a.d: Likewise. * testsuite/binutils-all/x86-64/pr23494c-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494c.d: Likewise. * testsuite/binutils-all/x86-64/pr23494d-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494d.d: Likewise. * testsuite/binutils-all/x86-64/pr23494e-x32.d: Likewise. * testsuite/binutils-all/x86-64/pr23494e.d: Likewise. * testsuite/binutils-all/x86-64/shstk-x32.d: Likewise. * testsuite/binutils-all/x86-64/shstk.d: Likewise. ld * testsuite/ld-aarch64/bti-plt-2.d: Adjust for new output format from readelf. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/property-bti-pac1.d: Likewise. * testsuite/ld-aarch64/property-bti-pac2.d: Likewise. * testsuite/ld-aarch64/property-bti-pac3.d: Likewise. * testsuite/ld-elf/x86-feature-1a.rd: Likewise. * testsuite/ld-elf/x86-feature-1b.rd: Likewise. * testsuite/ld-elf/x86-feature-1c.rd: Likewise. * testsuite/ld-elf/x86-feature-1d.rd: Likewise. * testsuite/ld-elf/x86-feature-1e.rd: Likewise. * testsuite/ld-i386/ibt-plt-2d.d: Likewise. * testsuite/ld-i386/ibt-plt-3d.d: Likewise. * testsuite/ld-i386/pr23372a.d: Likewise. * testsuite/ld-i386/pr23372c.d: Likewise. * testsuite/ld-i386/pr23486a.d: Likewise. * testsuite/ld-i386/pr23486b.d: Likewise. * testsuite/ld-i386/pr23486c.d: Likewise. * testsuite/ld-i386/pr23486d.d: Likewise. * testsuite/ld-i386/pr24322a.d: Likewise. * testsuite/ld-i386/pr24322b.d: Likewise. * testsuite/ld-i386/property-x86-3.d: Likewise. * testsuite/ld-i386/property-x86-4a.d: Likewise. * testsuite/ld-i386/property-x86-5.d: Likewise. * testsuite/ld-i386/property-x86-cet1.d: Likewise. * testsuite/ld-i386/property-x86-cet2a.d: Likewise. * testsuite/ld-i386/property-x86-cet5a.d: Likewise. * testsuite/ld-i386/property-x86-cet5b.d: Likewise. * testsuite/ld-i386/property-x86-ibt1a.d: Likewise. * testsuite/ld-i386/property-x86-ibt1b.d: Likewise. * testsuite/ld-i386/property-x86-ibt2.d: Likewise. * testsuite/ld-i386/property-x86-ibt3a.d: Likewise. * testsuite/ld-i386/property-x86-ibt3b.d: Likewise. * testsuite/ld-i386/property-x86-ibt4.d: Likewise. * testsuite/ld-i386/property-x86-ibt5.d: Likewise. * testsuite/ld-i386/property-x86-shstk1a.d: Likewise. * testsuite/ld-i386/property-x86-shstk1b.d: Likewise. * testsuite/ld-i386/property-x86-shstk2.d: Likewise. * testsuite/ld-i386/property-x86-shstk3a.d: Likewise. * testsuite/ld-i386/property-x86-shstk3b.d: Likewise. * testsuite/ld-i386/property-x86-shstk4.d: Likewise. * testsuite/ld-i386/property-x86-shstk5.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2d-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2d.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3d-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3d.d: Likewise. * testsuite/ld-x86-64/pr23372a-x32.d: Likewise. * testsuite/ld-x86-64/pr23372a.d: Likewise. * testsuite/ld-x86-64/pr23372c-x32.d: Likewise. * testsuite/ld-x86-64/pr23372c.d: Likewise. * testsuite/ld-x86-64/pr23486a-x32.d: Likewise. * testsuite/ld-x86-64/pr23486a.d: Likewise. * testsuite/ld-x86-64/pr23486b-x32.d: Likewise. * testsuite/ld-x86-64/pr23486b.d: Likewise. * testsuite/ld-x86-64/pr23486c-x32.d: Likewise. * testsuite/ld-x86-64/pr23486c.d: Likewise. * testsuite/ld-x86-64/pr23486d-x32.d: Likewise. * testsuite/ld-x86-64/pr23486d.d: Likewise. * testsuite/ld-x86-64/pr24322a-x32.d: Likewise. * testsuite/ld-x86-64/pr24322a.d: Likewise. * testsuite/ld-x86-64/pr24322b-x32.d: Likewise. * testsuite/ld-x86-64/pr24322b.d: Likewise. * testsuite/ld-x86-64/pr24458a-x32.d: Likewise. * testsuite/ld-x86-64/pr24458a.d: Likewise. * testsuite/ld-x86-64/pr24458b-x32.d: Likewise. * testsuite/ld-x86-64/pr24458b.d: Likewise. * testsuite/ld-x86-64/pr24458c-x32.d: Likewise. * testsuite/ld-x86-64/pr24458c.d: Likewise. * testsuite/ld-x86-64/property-1.r: Likewise. * testsuite/ld-x86-64/property-1a.r: Likewise. * testsuite/ld-x86-64/property-2.r: Likewise. * testsuite/ld-x86-64/property-2a.r: Likewise. * testsuite/ld-x86-64/property-3.r: Likewise. * testsuite/ld-x86-64/property-3a.r: Likewise. * testsuite/ld-x86-64/property-4.r: Likewise. * testsuite/ld-x86-64/property-4a.r: Likewise. * testsuite/ld-x86-64/property-5.r: Likewise. * testsuite/ld-x86-64/property-5a.r: Likewise. * testsuite/ld-x86-64/property-6.r: Likewise. * testsuite/ld-x86-64/property-7.r: Likewise. * testsuite/ld-x86-64/property-7a.r: Likewise. * testsuite/ld-x86-64/property-x86-3-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-3.d: Likewise. * testsuite/ld-x86-64/property-x86-4a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-4a.d: Likewise. * testsuite/ld-x86-64/property-x86-5-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-5.d: Likewise. * testsuite/ld-x86-64/property-x86-cet1-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet1.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet2a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5a.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-cet5b.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt1a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt1a.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt1b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt1b.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt2-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt2.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt4-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt4.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt5-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-ibt5.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk1a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk1a.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk1b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk1b.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk2-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk2.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk3a-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk3a.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk3b-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk3b.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk4-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk4.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk5-x32.d: Likewise. * testsuite/ld-x86-64/property-x86-shstk5.d: Likewise. gas * testsuite/gas/i386/property-1.d: Adjust for new output format from readelf. * testsuite/gas/i386/property-2.d: Likewise. * testsuite/gas/i386/x86-64-property-1.d: Likewise. * testsuite/gas/i386/x86-64-property-2.d: Likewise.
2019-08-07ld: use a specific linker script in BPF targetsJose E. Marchesi4-5/+15
This patch makes the elf64bpf emulation to use it's own linker script, based on elf.sc. At the moment, the only change is that the BPF executable doesn't define an entry symbol (BPF programs feature several entry points scattered in several sections.) This is a step towards the goal of generating proper ELF executables that would be loaded by the kernel's libbpf. We are not there yet: BPF "programs" should still be linked with -r. This change removes a warning while linking executables, decreases the number of unsupported tests in the target from 47 to 29, and increases the number of expected passes from 104 to 145. Regtested in x86_64 for all targets. No regressions. ld/ChangeLog: 2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com> * scripttempl/elf64bpf.sc: Adapted from elf.sc. * emulparams/elf64bpf.sh (SCRIPT_NAME): Use elf64bpf. (EMBEDDED): Define. * testsuite/ld-bpf/call-1.d: Do not expect a warning regarding an undefined entry symbol. * testsuite/ld-bpf/jump-1.d: Likewise. * testsuite/ld-undefined/undefined.exp: Do not pass '-e entry' to ld in BPF targets, and do not expect line number information. * testsuite/ld-srec/srec.exp (run_srec_test): xfail s-record tests in BPF targets.
2019-08-02PowerPC tlsie test fixAlan Modra1-2/+2
* testsuite/ld-powerpc/tlsie.s: Correct medium model ELF sequence.
2019-07-26Ajdust lto-3r and lto-5r tests for powerpc64Alan Modra2-2/+2
* testsuite/ld-plugin/lto-3r.d: Accept D for powerpc64 descriptors. * testsuite/ld-plugin/lto-5r.d: Likewise.
2019-07-24Revert "Remove tests that test __gnu_lto_v1 symbol."H.J. Lu3-0/+20
Revert commit 8c728a9d93e2342c57039fcdd6e4a502875b9e09 Author: Martin Liska <mliska@suse.cz> Date: Mon Jul 22 14:23:32 2019 +0200 Remove tests that test __gnu_lto_v1 symbol. since outputs of these tests are used by later tests. Check the normal symbol, foo, instead of __gnu_lto_v.*, which GCC stopped emitting after r273662. * testsuite/ld-plugin/lto-3r.d: Restored. Check foo instead of __gnu_lto_v.*. * testsuite/ld-plugin/lto-5r.d: Likewise. * testsuite/ld-plugin/lto.exp: Run lto-3r and lto-5r tests.
2019-07-24[ARC] Add linker relaxation.Claudiu Zissulescu2-0/+30
Add linker relaxation. The first relaxation added is converting GOTPC32 to PCREL relocations. This relaxation doesn't change the size of the binary. bfd/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (bfd_get_32_me): New function. (bfd_put_32_me): Likewise. (arc_elf_relax_section): Likewise. (bfd_elf32_bfd_relax_section): Define. ld/testsuite/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * ld-arc/relax-local-pic.d: New test. * ld-arc/relax-local-pic.s: New file.
2019-07-23Remove tests that test __gnu_lto_v1 symbol.Martin Liska3-20/+0
ld/ChangeLog: 2019-07-22 Martin Liska <mliska@suse.cz> * testsuite/ld-plugin/lto-3r.d: Remove. * testsuite/ld-plugin/lto-5r.d: Remove. * testsuite/ld-plugin/lto.exp: Do not run lto-3r and lto-5r tests.
2019-07-23Move ld-scripts size testsAlan Modra12-101/+88
Also restore them somewhat closer to the original. They originally failed on many targets, and a month later I "simplified" them as part of a larger patch fixing other failing tests. That unfortunately lost their main purpose, which was to test TLS layout. * testsuite/ld-elf/size-1.d, * testsuite/ld-elf/size-1.s, * testsuite/ld-elf/size-1.t: New test. * testsuite/ld-elf/size-2.d, * testsuite/ld-elf/size-2.s, * testsuite/ld-elf/size-2.t: New test. * testsuite/ld-scripts/size-1.d, * testsuite/ld-scripts/size-1.s, * testsuite/ld-scripts/size-1.t, * testsuite/ld-scripts/size-2.s, * testsuite/ld-scripts/size-2.d, * testsuite/ld-scripts/size-2.t, * testsuite/ld-scripts/size.exp: Delete.
2019-07-22Fixes the linker testcase "Secure gateway veneers:cmse functions debug ↵Srinath Parvathaneni1-9/+9
information missing" which was failing due to output regular expression mismatch on arm-none-linux-gnueabihf targets. * ld/testsuite/ld-arm/cmse_main_sec_debug.d: Modify regexps to allow for output from a arm-none-linux-gnueabihf target.
2019-07-19[PowerPC64] pc-relative TLS relocationsAlan Modra7-0/+311
This patch supports using pcrel instructions in TLS code sequences. A number of new relocations are needed, gas operand modifiers to generate those relocations, and new TLS optimisation. For optimisation it turns out that the new pcrel GD and LD sequences can be distinguished from the non-pcrel GD and LD sequences by there being different relocations on the new sequence. The final "add ra,rb,13" on IE sequences similarly needs a new relocation, or as I chose, a modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points one byte into the "add" instruction rather than being on the instruction boundary. GD: pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34 bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC edited to IE pld 3,z@got@tprel@pcrel add 3,3,13 edited to LE paddi 3,13,z@tprel nop LD: pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34 bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC .. paddi 9,3,z2@dtprel pld 10,z3@got@dtprel@pcrel add 10,10,3 edited to LE paddi 3,13,0x1000 nop IE: pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34 add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1 ldx 4,9,z@tls@pcrel lwax 5,9,z@tls@pcrel stdx 5,9,z@tls@pcrel edited to LE paddi 9,13,z@tprel nop ld 4,0(9) lwa 5,0(9) std 5,0(9) LE: paddi 10,13,z@tprel include/ * elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34), (R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34), (R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define. (IS_PPC64_TLS_RELOC): Include new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34), (BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34), (BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34), (BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs. (ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs. (must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64. (ppc64_elf_check_relocs): Support pcrel tls relocs. (ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel", "got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel". (fixup_size, md_assemble): Handle pcrel tls relocs. (ppc_force_relocation, ppc_fix_adjustable): Likewise. (md_apply_fix, tc_gen_reloc): Likewise. ld/ * testsuite/ld-powerpc/tlsgd.d, * testsuite/ld-powerpc/tlsgd.s, * testsuite/ld-powerpc/tlsie.d, * testsuite/ld-powerpc/tlsie.s, * testsuite/ld-powerpc/tlsld.d, * testsuite/ld-powerpc/tlsld.s: New tests. * testsuite/ld-powerpc/powerpc.exp: Run them.
2019-07-19[PowerPC] Rename testcaseAlan Modra5-4/+4
Just making room for a new tlsld test. * testsuite/ld-powerpc/tlsldopt.d: Rename from tlsld.d. * testsuite/ld-powerpc/tlsldopt.s: Rename from tlsld.s. * testsuite/ld-powerpc/tlsldopt32.d: Rename from tlsld32.d. * testsuite/ld-powerpc/tlsldopt32.s: Rename from tlsld32.s. * testsuite/ld-powerpc/powerpc.exp: Update.
2019-07-19Re: ld -r: Don't merge with member of output section groupAlan Modra1-0/+1
PR 24819 * testsuite/ld-elf/pr24819.d: xfail for genelf targets.
2019-07-18ld -r: Don't merge with member of output section groupH.J. Lu2-0/+12
When doing a relocatable link, members of input section group are placed in their own output sections. We need to make sure that no input sections are merged with member of output section group. PR ld/24819 * emultempl/elf32.em (elf_orphan_compatible): Return FALSE for member of output section group when doing a relocatable link. * testsuite/ld-elf/pr24819.d: New file. * testsuite/ld-elf/pr24819.s: Likewise.
2019-07-13Dynamic TLS section symbolsAlan Modra45-312/+305
It is possible to create shared libraries on PowerPC using -ftls-model=inital-exec or -ftls-model=local-exec. The first is half reasonable, getting you a shared library that can't be dlopen'd but otherwise is reasonable. The second is quite bad. Not only do you lose being able to dlopen, the library also has dynamic text relocations. Worse, the TPREL16_LO, TPREL16_HA and other TPREL16 dynamic relocs emitted were wrong, resulting in wrong values being applied by ld.so. Using the first TLS section symbol in dynamic relocations for local TLS symbols doesn't work. It's wrong because TLS symbols used by TLS relocs have values relative to the TLS segment, whereas the TLS section symbols are addresses. This patch instead uses a symbol index of zero which is used elsewhere by PowerPC on dynamic TLS relocs. It's not strictly ABI compliant to use a non-TLS symbol with TLS relocs but symbol index zero can be interpreted as "no symbol". Not using the first TLS section symbol means it doesn't need to be dynamic. The patch also fixes a further problem with PowerPC32 dynamic TPREL16* relocs, which shouldn't have the symbol value in the addend as we do for non-TLS symbols. bfd/ * elflink.c (_bfd_elf_omit_section_dynsym_default): Don't keep tls_sec. (_bfd_elf_init_1_index_section): Prefer not using TLS sections. (_bfd_elf_init_2_index_sections): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): When emitting dynamic relocations for local TLS symbols, use STN_UNDEF as the relocation symbol. * elf32-ppc.c (ppc_elf_relocate_section): Likewise, and don't leave TLS symbol value in the addend. ld/ * testsuite/ld-powerpc/tlsso.r: Update. * testsuite/ld-powerpc/tlsso32.g: Update. * testsuite/ld-powerpc/tlsso32.r: Update. * testsuite/ld-powerpc/tlstocso.r: Update. * testsuite/ld-cris/tls-dso-dtpoffd2.d: Update. * testsuite/ld-cris/tls-dso-dtpoffd4.d: Update. * testsuite/ld-cris/tls-dso-tpoffgotcomm1.d: Update. * testsuite/ld-cris/tls-gd-1.d: Update. * testsuite/ld-cris/tls-gd-1h.d: Update. * testsuite/ld-cris/tls-gd-2.d: Update. * testsuite/ld-cris/tls-gd-2h.d: Update. * testsuite/ld-cris/tls-ie-10.d: Update. * testsuite/ld-cris/tls-ie-11.d: Update. * testsuite/ld-cris/tls-ie-8.d: Update. * testsuite/ld-cris/tls-ie-9.d: Update. * testsuite/ld-cris/tls-js1.d: Update. * testsuite/ld-cris/tls-ld-4.d: Update. * testsuite/ld-cris/tls-ld-5.d: Update. * testsuite/ld-cris/tls-ld-6.d: Update. * testsuite/ld-cris/tls-ld-7.d: Update. * testsuite/ld-cris/tls-ldgd-14.d: Update. * testsuite/ld-cris/tls-ldgd-15.d: Update. * testsuite/ld-cris/tls-ldgdx-14.d: Update. * testsuite/ld-cris/tls-ldgdx-15.d: Update. * testsuite/ld-cris/tls-local-54.d: Update. * testsuite/ld-cris/tls-local-60.d: Update. * testsuite/ld-cris/tls-local-61.d: Update. * testsuite/ld-cris/tls-local-63.d: Update. * testsuite/ld-cris/tls-local-64.d: Update. * testsuite/ld-cris/tls-ok-30.d: Update. * testsuite/ld-cris/tls-ok-32.d: Update. * testsuite/ld-cris/tls-ok-34.d: Update. * testsuite/ld-mips-elf/tls-multi-got-1.got: Update. * testsuite/ld-mips-elf/tls-multi-got-1.r: Update. * testsuite/ld-mips-elf/tlsdyn-pie-o32.d: Update. * testsuite/ld-mips-elf/tlsdyn-pie-o32.got: Update. * testsuite/ld-mips-elf/tlslib-o32-hidden.got: Update. * testsuite/ld-mips-elf/tlslib-o32-ver.got: Update. * testsuite/ld-mips-elf/tlslib-o32.got: Update. * testsuite/ld-s390/tlspic.rd: Update. * testsuite/ld-s390/tlspic_64.rd: Update. * testsuite/ld-sparc/tlssunnopic32.rd: Update. * testsuite/ld-sparc/tlssunnopic64.rd: Update. * testsuite/ld-sparc/tlssunpic32.rd: Update. * testsuite/ld-sparc/tlssunpic64.rd: Update.
2019-07-08Re: PowerPC notoc call stub testsAlan Modra2-2/+2
Correct the tests for powerpc 32-bit targets. * testsuite/ld-powerpc/callstub-1.d: Pass -melf64ppc to ld. * testsuite/ld-powerpc/callstub-2.d: Likewise.
2019-07-04gas/ELF: don't accumulate .type settingsJan Beulich1-1/+1
Recently a patch was submitted for a Xen Project test harness binary to override the compiler specified @object to @func (see [1]). In a reply I suggested we shouldn't make ourselves dependent on currently unspecified behavior of gas here: It accumulates all requests, and then bfd/elf.c:swap_out_syms(), in an apparently ad hoc manner, prioritizes certain flags over others. Make the behavior predictable: Generally the last .type is what counts. Exceptions are directives which set multiple bits (TLS, IFUNC, and UNIQUE): Subsequent directives requesting just the more generic bit (i.e. FUNC following IFUNC) won't clear the more specific one. Warn about incompatible changes, except from/to STT_NOTYPE. Also add a new target hook, which hppa wants to use right away afaict. In the course of adding the warning I ran into two ld testsuite failures. I can only assume that it was a copy-and-paste mistake that lead to the same symbol having its type set twice. [1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01980.html
2019-07-02Ensure that debug information is retained for ARMv8-M security functions.Srinath Parvathaneni4-0/+198
Consider a file containing only Armv8-M secure entry functions. This file is compiled and linked with "-march=armv8-m.main -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mcmse -static --specs=rdimon.specs -Wl,--section-start,.gnu.sgstubs=0x190000 -ffunction-sections -fdata-sections -Wl,--gc-sections -g" options to generate an executable. The executable generated does not contain any debug information of these secure entry functions even though it contains secure entry functions in the .text section. This patch fixes this problem.
2019-07-01Correct the calculation of offsets for ARM exidx relocs when performing a ↵Nick Clifton1-0/+2
partial link. PR 23839 bfd * elf32-arm.c (elf32_arm_update_relocs): Do not include the section VMA in the offset used to update exidx relocs. ld * testsuite/ld-arm/unwind-4.d: Adjust for corrected calculation of exidx relocs.
2019-06-28PowerPC notoc call stub testsAlan Modra5-0/+83
* testsuite/ld-powerpc/callstub-1.d, * testsuite/ld-powerpc/callstub-1.s: New test. * testsuite/ld-powerpc/callstub-2.d, * testsuite/ld-powerpc/callstub-2.s: New test. * testsuite/ld-powerpc/powerpc.exp: Run them.
2019-06-24elf: Remove the property after reporting its removalH.J. Lu6-0/+57
commit d2ef37ebd9f771d06edf1fdea37970f60b242b2d Author: H.J. Lu <hjl.tools@gmail.com> Date: Fri Dec 7 08:30:30 2018 -0800 elf: Report property change when merging properties failed to remove the property after reporting it has been removed. This patch corrects it. bfd/ PR ld/24721 * elf-properties.c (elf_merge_gnu_property_list): Remove the property after reporting property removal. ld/ PR ld/24721 * testsuite/ld-x86-64/x86-64.exp: Run PR ld/24721 tests. * testsuite/ld-x86-64/pr24721-x32.d: New file. * testsuite/ld-x86-64/pr24721.d: Likewise. * testsuite/ld-x86-64/pr24721.map: Likewise. * testsuite/ld-x86-64/pr24721a.s: Likewise. * testsuite/ld-x86-64/pr24721b.s: Likewise.
2019-06-23PR24704, Internal error building skiboot for powerpc64-linux-gnuAlan Modra2-7/+7
While the skiboot linker script bears some culpability in this PR, it's also true that the GOT indirect to GOT relative optimisation for 16-bit offsets isn't safe. At least, it isn't safe to remove the GOT entry based on distance between the GOT pointer and symbol calculated from the preliminary layout. So this patch removes that optimisation, and reduces the range allowed for 32-bit and 34-bit offsets. PR 24704 bfd/ * elf64-ppc.c (R_PPC64_GOT16_DS): Don't set has_gotrel. (ppc64_elf_edit_toc): Don't remove R_PPC64_GOT16_DS got entries. Reduce range of offsets allowed for other GOT relocs. ld/ * testsuite/ld-powerpc/elfv2exe.d: Update. * testsuite/ld-powerpc/elfv2so.d: Update.
2019-06-14Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocsSzabolcs Nagy5-0/+38
These ilp32 relocations were missing for some reason. bfd/ChangeLog: * elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32. include/ChangeLog: * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define. (R_AARCH64_P32_MOVW_PREL_G0_NC): Define. (R_AARCH64_P32_MOVW_PREL_G1): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23. * testsuite/ld-aarch64/emit-relocs-22.d: New test. * testsuite/ld-aarch64/emit-relocs-22.s: New test. * testsuite/ld-aarch64/emit-relocs-23.d: New test. * testsuite/ld-aarch64/emit-relocs-23.s: New test.
2019-06-14Fix alpha testsuite regressionAlan Modra3-4/+4
readelf st_other display improved for alpha. PR 24662 * testsuite/ld-alpha/tlsbin.rd: Update. * testsuite/ld-alpha/tlsbinr.rd: Update. * testsuite/ld-alpha/tlspic.rd: Update.
2019-06-06[BFD, AArch64] Fix PT_GNU_PROPERTY alignment issueSudakshina Das4-0/+45
If the new GNU property section was being created by the linker (this will happen only if none of the inputs have any GNU property section but the command line to the linker forces a bti with --force-bti), the alignment of the section and hence the program header of PT_GNU_PROPERTY type was not being set correctly. This patch fixes this issue. bfd/ChangeLog: 2019-06-06 Sudakshina Das <sudi.das@arm.com> * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Set alignment of the new gnu property section. ld/ChangeLog: 2019-06-06 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/property-bti-pac4-a.d: New test. * testsuite/ld-aarch64/property-bti-pac4-b.d: New test. * testsuite/ld-aarch64/property-bti-pac4.s: New test.
2019-06-06[LD, AArch64] Move ELF options behind -zSudakshina Das11-20/+20
This patch moves the current AArch64 ld options of --force-bti and --pac-plt to -z force-bti and -z pac-plt since these are ELF specific options. *** bfd/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * bfd-in.h: Change comment. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update warning. * elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Likwise. *** ld/ChangeLog *** 2019-06-06 Sudakshina Das <sudi.das@arm.com> * NEWS: Update options names. * emultempl/aarch64elf.em (OPTION_FORCE_BTI, OPTION_PAC_PLT): Remove. (PARSE_AND_LIST_LONGOPTS): Remove force-bti and pac-plt. (PARSE_AND_LIST_OPTIONS): Update to -z. (PARSE_AND_LIST_ARGS_CASE_Z_AARCH64): New. (PARSE_AND_LIST_ARGS_CASE_Z): Add PARSE_AND_LIST_ARGS_CASE_Z_AARCH64. (PARSE_AND_LIST_ARGS_CASES): Move cases for these options. * testsuite/ld-aarch64/bti-pac-plt-1.d: Update option. * testsuite/ld-aarch64/bti-pac-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-3.d: Likewise. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/pac-plt-1.d: Likewise. * testsuite/ld-aarch64/pac-plt-2.d: Likewise.
2019-05-30Harmonize readelf's output for version sections.Nick Clifton1-1/+1
PR 24627 binutils * readelf.c (process_version_sections): Add 0x prefix to address display. Correct indentation. ld * testsuite/ld-elf/ver_def.vd: Update expected output.
2019-05-30s12z genelf.emAlan Modra1-0/+1
This changes s12z to use generic.em and genelf.em, which is more suited to targets that use the generic linker hash table. A tweak or two to some testsuite predicates then gives a clean testsuite result on the target. PR 24596 binutils/ * testsuite/lib/binutils-common.exp (supports_gnu_unique): Add s12z to targets not supporting this feature. ld/ * emulparams/m9s12zelf.sh (TEMPLATE_NAME): Set to generic. (EXTRA_EM_FILE): Define to genelf. * testsuite/lib/ld-lib.exp (uses_genelf): Add s12z.
2019-05-30Support tcl procedure calls in run_dump_test xfailAlan Modra53-97/+89
Also support tcl procedure calls in the run_ld_link_tests and run_ld_link_exec_tests optional "xfail" args. Implements "is_generic" and renames "is_generic_elf" to "uses_genelf", then uses these procs in lots of ld tests. moxie-elf -FAIL: ld-elf/orphan3 mt-elf -FAIL: ld-elf/merge s12z-elf -FAIL: ld-discard/extern s12z-elf -FAIL: ld-discard/start s12z-elf -FAIL: ld-discard/static s12z-elf -FAIL: PR ld/21703 s12z-elf -FAIL: PR ld/21703 -r s12z-elf -FAIL: Symbol flags copy s12z-elf -FAIL: ld-elf/group1 s12z-elf -FAIL: ld-elf/group3b s12z-elf -FAIL: ld-elf/group8a s12z-elf -FAIL: ld-elf/group8b s12z-elf -FAIL: ld-elf/group9a s12z-elf -FAIL: ld-elf/group9b s12z-elf -FAIL: ld-elf/linkonce2 s12z-elf -FAIL: ld-elf/merge2 s12z-elf -FAIL: ld-elf/merge3 s12z-elf -FAIL: ld-elf/pr12851 s12z-elf -FAIL: ld-elf/pr17550c s12z-elf -FAIL: ld-elf/pr17550d s12z-elf -FAIL: ld-elf/pr22677 s12z-elf -FAIL: ld-elf/pr22836-1a s12z-elf -FAIL: ld-elf/pr22836-1b s12z-elf -FAIL: ld-elf/warn1 s12z-elf -FAIL: ld-elf/warn3 binutils/ * testsuite/lib/binutils-common.exp (run_dump_test): Support tcl procedures for xfail args. ld/ * testsuite/lib/ld-lib.exp (run_ld_link_tests): Support procedure calls in optional "xfail" args. (run_ld_link_exec_tests): Likewise. (is_generic): New. (uses_genelf): Rename from is_generic_elf. Delete bogus semicolons. * testsuite/ld-scripts/align.exp: Rename is_generic_elf call. * testsuite/ld-elf/elf.exp: Use is_generic and uses_genelf. Delete xfail_implib var. * testsuite/ld-elf/sec64k.exp: Use is_generic. * testsuite/ld-elf/shared.exp: Likewise. * testsuite/ld-discard/extern.d: Use is_generic in xfail. * testsuite/ld-discard/start.d: Likewise. * testsuite/ld-discard/static.d: Likewise. * testsuite/ld-elf/attributes.d: Likewise. * testsuite/ld-elf/group1.d: Likewise. * testsuite/ld-elf/group3b.d: Likewise. * testsuite/ld-elf/group8a.d: Likewise. * testsuite/ld-elf/group8b.d: Likewise. * testsuite/ld-elf/group9a.d: Likewise. * testsuite/ld-elf/group9b.d: Likewise. * testsuite/ld-elf/linkonce2.d: Likewise. * testsuite/ld-elf/merge2.d: Likewise. * testsuite/ld-elf/merge3.d: Likewise. * testsuite/ld-elf/pr12851.d: Likewise. * testsuite/ld-elf/pr12975.d: Likewise. * testsuite/ld-elf/pr13177.d: Likewise. * testsuite/ld-elf/pr13195.d: Likewise. * testsuite/ld-elf/pr17550c.d: Likewise. * testsuite/ld-elf/pr17550d.d: Likewise. * testsuite/ld-elf/pr17615.d: Likewise. * testsuite/ld-elf/pr21562a.d: Likewise. * testsuite/ld-elf/pr21562b.d: Likewise. * testsuite/ld-elf/pr21562c.d: Likewise. * testsuite/ld-elf/pr21562d.d: Likewise. * testsuite/ld-elf/pr21562i.d: Likewise. * testsuite/ld-elf/pr21562j.d: Likewise. * testsuite/ld-elf/pr21562k.d: Likewise. * testsuite/ld-elf/pr21562l.d: Likewise. * testsuite/ld-elf/pr21562m.d: Likewise. * testsuite/ld-elf/pr21562n.d: Likewise. * testsuite/ld-elf/pr22677.d: Likewise. * testsuite/ld-elf/pr22836-1a.d: Likewise. * testsuite/ld-elf/pr22836-1b.d: Likewise. * testsuite/ld-elf/warn3.d: Likewise. * testsuite/ld-elf/warn1.d: Likewise and xfail sparc solaris targets rather than notarget. * testsuite/ld-elf/compressed1d.d: Use uses_genelf in xfail. * testsuite/ld-elf/orphan-10.d: Likewise. * testsuite/ld-elf/orphan-9.d: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/orphan3.d: Likewise. * testsuite/ld-elf/pr20528a.d: Likewise. * testsuite/ld-elf/pr20528b.d: Likewise. * testsuite/ld-elf/pr23658-1a.d: Likewise. * testsuite/ld-elf/pr23658-1b.d: Likewise. * testsuite/ld-elf/pr349.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise and xfail sparc solaris targets rather than notarget. * testsuite/ld-elf/merge.d: Correct ms1-*-* to mt-*-*.
2019-05-28MIPS/LD: Skip overflow check for %pcrel_hi relocationsFaraz Shahbazker6-11/+63
Overflow checks were removed for all hi16 relocations except PC-relative high relocations per PR ld/16720. Remove overflow checks from %pcrel_hi relocations so that we can correctly handle negative offsets from PC. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>: Remove overflow check. ld/ * testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case for pcrel_hi/pcrel_lo. * testsuite/ld-mips-elf/undefweak-overflow.d: Update to match. * testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source. * testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script. * testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2019-05-28aarch64: fix variant_pcs ld testsSzabolcs Nagy2-78/+76
Force sysv hash style for reliable symbol table layout. ld/ChangeLog: * testsuite/ld-aarch64/variant_pcs-now.d: Use --hash-style=sysv. * testsuite/ld-aarch64/variant_pcs-shared.d: Likewise.
2019-05-24aarch64: handle STO_AARCH64_VARIANT_PCS in bfdSzabolcs Nagy7-0/+329
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and add DT_AARCH64_VARIANT_PCS dynamic tag if necessary. Mismatching attributes are not diagnosed. bfd/ChangeLog: * elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function. (struct elf_aarch64_link_hash_table): Add variant_pcs member. (elfNN_aarch64_allocate_dynrelocs): Update variant_pcs. (elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS. (elf_backend_merge_symbol_attribute): Define. ld/ChangeLog: * testsuite/ld-aarch64/aarch64-elf.exp: Add new tests. * testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests. * testsuite/ld-aarch64/variant_pcs-now.d: New test. * testsuite/ld-aarch64/variant_pcs-r.d: New test. * testsuite/ld-aarch64/variant_pcs-shared.d: New test. * testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
2019-05-24PowerPC notoc linkage stubsAlan Modra3-0/+44
Use pcrel addressing instructions in linkage stubs. bfd/ * elf64-ppc.c: Comment on powerxx _notoc stub variants. (LI_R11_0, LIS_R11, ORI_R11_R11_0, SLDI_R11_R11_34): Define. (PADDI_R12_PC, PLD_R12_PC, D34, HA34): Define. (struct ppc_link_hash_table): Add powerxx_stubs. (ppc64_elf_check_relocs): Set powerxx_stubs. (build_powerxx_offset, size_powerxx_offset), (num_relocs_for_powerxx_offset), (emit_relocs_for_powerxx_offset): New functions. (plt_stub_size): Size powerxx stubs. (ppc_build_one_stub): Emit powerxx stubs. (ppc_size_one_stub): Size powerxx stubs. Omit .eh_frame for powerxx stubs. ld/ * testsuite/ld-powerpc/notoc2.d, * testsuite/ld-powerpc/notoc2.s: New test. * testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-24PowerPC GOT_PCREL34 optimisationAlan Modra4-0/+218
bfd/ * elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for R_PPC64_GOT_PCREL34. (xlate_pcrel_opt): New function. (ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34. (ppc64_elf_relocate_section): Edit GOT indirect to GOT relative for R_PPC64_GOT_PCREL34. Implement R_PPC64_PCREL_OPT optimisation. ld/ * testsuite/ld-powerpc/pcrelopt.s, * testsuite/ld-powerpc/pcrelopt.d, * testsuite/ld-powerpc/pcrelopt.sec: New test. * testsuite/ld-powerpc/powerpc.exp: Run it.
2019-05-23ld: add support for eBPFJose E. Marchesi7-0/+91
This patch adds support to the linker for the Linux eBPF architecture. A minimal testsuite is included. ld/ChangeLog: 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com> * Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64bpf.c. * Makefile.in (prefix): Regenerate. * configure.tgt (targ_extra_ofiles): Add case for bpf-*-* targets. * emulparams/elf64bpf.sh: New file. * testsuite/lib/ld-lib.exp (check_gc_sections_available): Add bpf-*-* to the list of targets not supporting gc-sections. * testsuite/ld-bpf/bar.s: New file. * testsuite/ld-bpf/jump-1.d: Likewise. * testsuite/ld-bpf/foo.s: Likewise. * testsuite/ld-bpf/call-1.d: Likewise. * testsuite/ld-bpf/bpf.exp: Likewise. * testsuite/ld-bpf/baz.s: Likewise.
2019-05-21MIPS/LD: Reject tprel_hi and tprel_lo relocations in shared libraryFaraz Shahbazker5-4/+43
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Generate error for TLS_TPREL_HI16(/LO16) relocations in shared library. ld/ * testsuite/ld-mips-elf/pic-reloc-5.s: Add tests for %tprel_hi and %tprel_lo relocations. * testsuite/ld-mips-elf/pic-reloc-6.s: Likewise. * testsuite/ld-mips-elf/pic-reloc-5.d: Update accordingly. * testsuite/ld-mips-elf/pic-reloc-6.d: Likewise. * testsuite/ld-mips-elf/pic-reloc-tls.ld: New test linker script file.
2019-05-21MIPS/LD: Fix memory fault linking non-PIC object in to shared libraryFaraz Shahbazker7-0/+58
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer checks. Search the RELA table for n64 relocations. ld/ * testsuite/ld-mips-elf/pic-reloc-5.d: New test. * testsuite/ld-mips-elf/pic-reloc-6.d: New test. * testsuite/ld-mips-elf/pic-reloc-7.d: New test. * testsuite/ld-mips-elf/pic-reloc-5.s: New test source. * testsuite/ld-mips-elf/pic-reloc-6.s: New test source. * testsuite/ld-mips-elf/pic-reloc-7.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21[MIPS] Add generation of PLT entries with compact jumps for MIPS R6Matthew Fortune8-0/+183
Add a new option to get the linker to emit PLTs that use compact branches instead of delay slot branches. bfd/ * elfxx-mips.c (LA25_BC): New macro. (mips_elf_link_hash_table)<compact_branches>: New field. (STUB_JALRC): New macro. (mipsr6_o32_exec_plt0_entry_compact): New array. (mipsr6_n32_exec_plt0_entry_compact): Likewise. (mipsr6_n64_exec_plt0_entry_compact): Likewise. (mipsr6_exec_plt_entry_compact): Likewise. (mips_elf_create_la25_stub): Use BC instead of J for stubs when compact_branches is true. (_bfd_mips_elf_finish_dynamic_symbol): Choose the compact PLT for MIPSR6 with compact_branches. Do not reorder the compact branches PLT. Switch the lazy stub for MIPSR6 with compact_branches to use JALRC. (mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6 when compact_branches is true. (_bfd_mips_elf_compact_branches): New function. * elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype. ld/ * emultempl/mipself.em (compact_branches): New static variable. (mips_create_output_section_statements): Call _bfd_mips_elf_compact_branches. (PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and OPTION_NO_COMPACT_BRANCHES. (PARSE_AND_LIST_LONGOPTS): Add compact-branches, no-compact-branches. (PARSE_AND_LIST_OPTIONS): Add --compact-branches, --no-compact-branches. (PARSE_AND_LIST_ARGS_CASES): Handle the above. * ld.texinfo: Document --compact-branches, --no-compact-branches. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21[binutils][Arm] Fix Branch Future relocation handling and testismsAndre Vieira4-0/+47
bfd/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> PR/target 24460 * elf32-arm.c (get_value_helper): Remove. (elf32_arm_final_link_relocate): Fix branch future relocations. gas/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming conventions. * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise. * testsuite/gas/arm/armv8_1-m-loloop.d: Likewise. * testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bf-rela.d: New test. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test. ld/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/arm-elf.exp: Add tests * testsuite/ld-arm/bfs-0.s: New test. * testsuite/ld-arm/bfs-1.s: New test. * testsuite/ld-arm/branch-futures.d: New test.
2019-05-21AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)Tamar Christina9-0/+128
The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
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