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The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0. The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction. The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
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* elf32-avr.c: Add DIFF relocations for AVR.
(avr_final_link_relocate): Handle the DIFF relocs.
(bfd_elf_avr_diff_reloc): New.
(elf32_avr_is_diff_reloc): New.
(elf32_avr_adjust_diff_reloc_value): Reduce difference value.
(elf32_avr_relax_delete_bytes): Recompute difference after deleting
bytes.
* reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations
gas/ChangeLog
* config/tc-avr.c: Add new flag mlink-relax.
(md_show_usage): Add flag and help text.
(md_parse_option): Record whether link relax is turned on.
(relaxable_section): New.
(avr_validate_fix_sub): New.
(avr_force_relocation): New.
(md_apply_fix): Generate DIFF reloc.
(avr_allow_local_subtract): New.
* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0.
(TC_FORCE_RELOCATION): Define.
(TC_FORCE_RELOCATION_SUB_SAME): Define.
(TC_VALIDATE_FIX_SUB): Define.
(avr_force_relocation): Declare.
(avr_validate_fix_sub): Declare.
(md_allow_local_subtract): Define.
(avr_allow_local_subtract): Declare.
gas/testsuite/ChangeLog
* gas/avr/diffreloc_withrelax.d: New testcase.
* gas/avr/noreloc_withoutrelax.d: Likewise.
* gas/avr/relax.s: Likewise.
include/ChangeLog
* elf/avr.h: Add new DIFF relocs.
ld/testsuite/ChangeLog
* ld-avr/norelax_diff.d: New testcase.
* ld-avr/relax_diff.d: Likewise.
* ld-avr/relax.s: Likewise.
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* peXXigen.c (pe_print_debugdata): New function: Displays the
contents of the debug directory and decodes codeview entries.
(_bfd_XXi_swap_debugdir_in, _bfd_XXi_swap_debugdir_out)
(_bfd_XXi_slurp_codeview_record, _bfd_XXi_write_codeview_record):
Add functions for reading and writing debugdir and codeview
records.
* libpei.h (_bfd_XXi_swap_debugdir_in, _bfd_XXi_swap_debugdir_out)
(_bfd_XXi_write_codeview_record): Add prototypes and macros.
* libcoff-in.h (pe_tdata): Add build-id data.
* libcoff.h: Regenerate.
* coffcode.h (coff_write_object_contents): Run build_id
after_write_object_contents hook.
* pe.h (external_IMAGE_DEBUG_DIRECTORY, _CV_INFO_PDB70)
(_CV_INFO_PDB20): Add structures and constants for debug directory
and codeview records.
* internal.h (internal_IMAGE_DEBUG_DIRECTORY, CODEVIEW_INFO):
Add structures and constants for internal representation of debug
directory and codeview records.
* emultempl/elf32.em (id_note_section_size, read_hex, write_build_id):
Move code for parsing build-id option and calculating the build-id to...
* ldbuildid.c: New file.
* ldbuildid.h: New file.
* Makefile.am (CFILES, HFILES, OFILES, ld_new_SOURCES): Add new
files.
* Makefile.in: Regenerate.
* ld.texinfo: Update --build-id description to mention COFF
support.
* NEWS: Mention support for COFF build ids.
* emultempl/pe.em (gld${EMULATION_NAME}_handle_option):
(pecoff_checksum_contents, write_build_id, setup_build_id)
(gld_${EMULATION_NAME}_after_open): Handle and implement
build-id option.
* emultempl/pep.em: Likewise.
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* ld-plugin/lto.exp: Make "-Wp," prefix optional when filtering
out _FORTIFY_SOURCE.
("Build libdummy.a 9", "PR ld/12696"): Mark as c++.
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When aligning input sections, we are supposed to take the fill pattern
from a FILL statement, if there is one in the output section statement.
ld/
* ldlang.c (lang_size_sections_1 <lang_input_section_enum>): Use
current "fill", not "output_section_statement->fill".
ld/testsuite/
* ld-scripts/fill.d, * ld-scripts/fill.t, * ld-scripts/fill_0.s,
* ld-scripts/fill_1.s, * ld-scripts/fill_2.s: New test.
* ld-scripts/data.exp: Run it.
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Fix the expected output for ld-aarch64/eh-frame.d. This issue was
exposed by the recent fix to the output of objdump -Wf here:
https://sourceware.org/ml/binutils/2014-03/msg00251.html
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This patch scans all input files for symbol reference warning if the
symbol reference doesn't exist in the current input file.
ld/
PR ld/16756
* ldmain.c (symbol_warning): New function.
(warning_callback): Use it. Scan all input files for a reference
to SYMBOL.
ld/testsuite/
PR ld/16756
* ld-plugin/lto.exp: Expect filename and line number for PR
ld/12760 test.
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targets.
* elf32-arm.c (elf32_arm_get_synthetic_symtab): Add new callback.
(elf32_arm_nacl_plt_sym_val): Likewise.
(elf32_arm_plt0_size): Add helper function.
(elf32_arm_plt_size): Likewise.
* ld-arm/arm-app-abs32.d: Updated test.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
* ld-arm/farcall-mixed-app-v5.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/ifunc-10.dd: Likewise.
* ld-arm/ifunc-14.dd: Likewise.
* ld-arm/ifunc-15.dd: Likewise.
* ld-arm/ifunc-3.dd: Likewise.
* ld-arm/ifunc-4.dd: Likewise.
* ld-arm/ifunc-7.dd: Likewise.
* ld-arm/ifunc-8.dd: Likewise.
* ld-arm/ifunc-9.dd: Likewise.
* ld-arm/long-plt-format.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
* ld-arm/thumb2-bl-undefweak.d: Likewise.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
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ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
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The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
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* config/tc-mips.h (DIFF_EXPR_OK, CFI_DIFF_EXPR_OK): Define.
* config/tc-mips.c (md_pcrel_from): Remove error message.
(md_apply_fix): Convert PC-relative BFD_RELOC_32s to
BFD_RELOC_32_PCREL. Report a specific error message for unhandled
PC-relative expressions. Handle BFD_RELOC_8.
gas/testsuite/
* gas/all/gas.exp: Remove XFAIL of forward.d for MIPS.
* gas/mips/pcrel-1.s, gas/mips/pcrel-1.d, gas/mips/pcrel-2.s,
gas/mips/pcrel-2.d, gas/mips/pcrel-3.s, gas/mips/pcrel-3.l,
gas/mips/pcrel-4.s, gas/mips/pcrel-4-32.d, gas/mips/pcrel-4-n32.d,
gas/mips/pcrel-4-64.d: New tests.
* gas/mips/mips.exp: Run them.
* gas/mips/lui-2.l: Tweak error message for line 7.
ld/testsuite/
* ld-elf/merge.d: Remove MIPS XFAIL.
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Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
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section names.
* config/default.exp (ASFLAGS): For the RX target add:
-muse-conventional-section-names.
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* ld-powerpc/vle-reloc-3.d: Remove addresses.
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bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Correct overflow
handling for VLE_SDA21 relocs.
ld/testsuite/
* ld-powerpc/vle.ld: Place .PPC.EMB.sdata0 within 32k of 0.
* ld-powerpc/vle-reloc-3.d: Update.
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ld/testsuite/
* ld-arm/gc-hidden-1.d: Remove target, add not-target to match
other ELF-only tests in this directory. Loosen regexps so they
don't care what the exact addresses are.
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ld/testsuite/
* ld-arm/arm-elf.exp (armelftests_common): Move long-plt case ...
(armelftests_nonacl): ... here.
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This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
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binutils/
* README: Add "Copyright Notices" paragraph.
gas/
* config/bfin-lex-wrapper.c: Correct copyright date.
* config/tc-frv.c: Correct copyright punctuation.
* config/tc-ip2k.c: Likewise.
* config/tc-iq2000.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic4x.h: Likewise.
ld/testsuite/
* ld-scripts/phdrs2.exp: Correct copyright punctuation.
* ld-v850/v850.exp: Correct copyright typo.
opcodes/
* i386-gen.c (process_copyright): Emit copyright notice on one line.
gold/
* dwp.cc (print_version): Update copyright year to current.
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offset range.
Enabled via the use of a new linker command line option: --long-plt.
* bfd-in.h: Add export of bfd_elf32_arm_use_long_plt.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_plt_entry_long): New array.
(elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if
using long PLT entries.
(bfd_elf32_arm_use_long_plt): New function.
(elf32_arm_populate_plt_entry): Add support for long PLT entries.
* emultempl/armelf.em (OPTION_LONG_PLT): Define.
(PARSE_AND_LIST_LONGOPTS): Add long-plt.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle long-plt.
* ld.texinfo: Document --long-plt.
* ld-arm/long-plt-format.s: New test case.
* ld-arm/long-plt-format.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new test.
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Cygwin and MinGW targets.
The manifest is necessary in order for the linked binaries to be executed in a Windows 8 environment.
The manifest is added using a linker script so that this feature will be compiler-neutral. The resource
merging code in the linker means that if an application provides its own manifest then the default
manifest will be ignored.
* configure.in (all_emul_extra_binaries): New variable. Populated
by invoking configure.tgt.
(EMUL_EXTRA_BINARIES): New substitution.
* configure: Regenerate.
* configure.tgt (target_extra_binaries): New variable. Set to
default-manifest.o for Cygwin and MinGW targets.
* Makefile.am (EMUL_EXTRA_BINARIES): New variable. Initialised
by the configure script.
(ALL_EMUL_EXTRA_BINARIES): New variable.
(default-manifest.o): New rule to build the default manifest.
(ld_new_DEPENDENCIES): Add EMUL_EXTRA_BINARIES.
(install-data-local): Add EMUL_EXTRA_BINARIES.
* Makefile.in: Regenerate.
* ld.texinfo: Document default manifest support.
* emulparams/i386pe.sh (DEFAULT_MANIFEST): Define.
* emulparams/i386pep.sh (DEFAULT_MANIFEST): Define.
* emultempl/default-manifest.rc: New file.
* scripttempl/pe.sc (R_RSRC): Include DEFAULT_MANIFEST, if defined.
* scripttempl/pep.sc (R_RSRC): Likewise.
* ld-pe/longsecn-1.d: Allow for extra sections.
* ld-pe/longsecn-2.d: Likewise.
* ld-pe/longsecn.d: Likewise.
* ld-pe/secrel.d: Likewise.
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I was running this by hand to test out --ppc476-workaround. Another
bootstrap test doesn't take all that long, so let's add it to the
testsuite.
* ld-bootstrap/bootstrap.exp: Add ppc476 workaround test.
* ld-bootstrap/ppc476.t: New file.
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Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
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execute permission regardless of the underlying PT_LOAD segment permissions.
Deleting this code allows the default linker behavior which is to set the
dynamic segment to the same permissions as the sections that make it up.
This change alters one existing test case to check the segment flags for
PT_DYNAMIC.
bfd/ChangeLog
* elfxx-mips.c(_bfd_mips_elf_modify_segment_map): Deleted hard coding of
PT_DYNAMIC segment flags.
ld/testsuite/ChangeLog
* ld-mips-elf/pic-and-nonpic-3a.sd: Check DYNAMIC segment flags.
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This has been fixed properly, in glibc.
ld/testsuite/
* ld-elfweak/elfweak.exp (setup_xfail_gnu_hurd): Remove function
and all usage of it.
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bfd/
PR gold/16530
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark symbol in
executables if it matches dynamic_list.
ld/testsuite/
PR gold/16530
* ld-elf/dynamic-1.c: New file.
* ld-elf/dynamic-1.rd: Likewise.
* ld-elf/dynamic-1.syms: Likewise.
* ld-elf/shared.exp (build_tests): Add dynamic-1.
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ld/
2014-02-02 Sebastian Huber <sebastian.huber@embedded-brains.de>
* ld/ld.texinfo: Change ALIGN_WITH_INPUT documentation.
* ld/ldlang.c (lang_size_sections_1): Add dotdelta
variable which reflects the VMA change due to alignment
requirements. Use dotdelta do change the LMA if
ALIGN_WITH_INPUT is requested.
ld/testsuite/ChangeLog
2014-02-02 Sebastian Huber <sebastian.huber@embedded-brains.de>
* ld-scripts/rgn-at9.d: New file.
* ld-scripts/rgn-at9.t: Likewise.
* ld-scripts/rgn-at10.d: Likewise.
* ld-scripts/rgn-at10.s: Likewise.
* ld-scripts/rgn-at10.t: Likewise.
* ld-scripts/rgn-at11.d: Likewise.
* ld-scripts/rgn-at11.t: Likewise.
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2014-01-30 Sandra Loosemore <sandra@codesourcery.com>
bfd/
* bfd-in2.h: Update from reloc.c.
* elf32-nios2.c: Include elf32-nios2.h.
(elf_nios2_howto_table_rel): Add entry for R_NIOS2_CALL26_NOAT.
(nios2_reloc_map): Likewise.
(enum elf32_nios2_stub_type): Declare.
(struct elf32_nios2_stub_hash_entry): Declare.
(nios2_stub_hash_entry, nios2_stub_hash_lookup): New macros.
(struct elf32_nios2_link_hash_entry): Add hsh_cache field.
(struct elf32_nios2_link_hash_table): Add new fields bstab,
stub_bfd, add_stub_section, layout_sections_again, stub_group,
bfd_count, top_index, input_list, all_local_syms.
(nios2_call26_stub_entry): New.
(nios2_elf32_install_imm16): Move up in file.
(nios2_elf32_install_data): Move up in file.
(hiadj): Move up in file.
(stub_hash_newfunc): New.
(link_hash_newfunc): Initialize hsh_cache field.
(STUB_SUFFIX): New.
(nios2_stub_name): New.
(nios2_get_stub_entry): New.
(nios2_add_stub): New.
(nios2_elf32_setup_section_lists): New.
(nios2_elf32_next_input_section): New.
(CALL26_SEGMENT): New.
(MAX_STUB_SECTION_SIZE): New.
(group_sections): New.
(nios2_type_of_stub): New.
(nios2_build_one_stub): New.
(nios2_size_one_stub): New.
(get_local_syms): New.
(nios2_elf32_size_stubs): New.
(nios2_elf32_build_stubs): New.
(nios2_elf32_do_call26_relocate): Correct CALL26 overflow test.
(nios2_elf32_relocate_section): Handle R_NIOS2_CALL26_NOAT. Add
trampolines for R_NIOS2_CALL26 stubs.
(nios2_elf32_check_relocs): Handle R_NIOS2_CALL26_NOAT.
(nios2_elf32_gc_sweep_hook): Likewise.
(nios2_elf32_link_hash_table_create): Initialize the stub hash table.
(nios2_elf32_link_hash_table_free): New.
(bfd_elf32_bfd_link_hash_table_free): Define.
* elf32-nios2.h: New file.
* libbfd.h: Update from reloc.c.
* reloc.c (BFD_RELOC_NIOS2_CALL26_NOAT): New.
gas/
* config/tc-nios2.c (md_apply_fix): Handle BFD_RELOC_NIOS2_CALL26_NOAT.
(nios2_assemble_args_m): Likewise.
(md_assemble): Likewise.
gas/testsuite/
* gas/nios2/call26_noat.d: New.
* gas/nios2/call26_noat.s: New.
* gas/nios2/call_noat.d: New.
* gas/nios2/call_noat.s: New.
include/elf/
* nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT.
ld/
* Makefile.am (enios2elf.c, enios2linux.c): Update dependencies.
* Makefile.in: Regenerated.
* emulparams/nios2elf.sh (EXTRA_EM_FILE): Set.
* emulparams/nios2linux.sh (EXTRA_EM_FILE): Set.
* emultempl/nios2elf.em: New file.
* gen-doc.texi (NIOSII): Set.
* ld.texinfo (NIOSII): Set.
ld/testsuite/
* ld-nios2/relax_call26.s: New.
* ld-nios2/relax_call26_boundary.ld: New.
* ld-nios2/relax_call26_boundary.s: New.
* ld-nios2/relax_call26_boundary_c8.d: New.
* ld-nios2/relax_call26_boundary_cc.d: New.
* ld-nios2/relax_call26_boundary_d0.d: New.
* ld-nios2/relax_call26_boundary_d4.d: New.
* ld-nios2/relax_call26_boundary_d8.d: New.
* ld-nios2/relax_call26_boundary_dc.d: New.
* ld-nios2/relax_call26_boundary_f0.d: New.
* ld-nios2/relax_call26_boundary_f4.d: New.
* ld-nios2/relax_call26_boundary_f8.d: New.
* ld-nios2/relax_call26_boundary_fc.d: New.
* ld-nios2/relax_call26_cache.d: New.
* ld-nios2/relax_call26_cache.ld: New.
* ld-nios2/relax_call26_cache.s: New.
* ld-nios2/relax_call26_multi.d: New.
* ld-nios2/relax_call26_multi.ld: New.
* ld-nios2/relax_call26_norelax.d: New.
* ld-nios2/relax_call26_shared.d: New.
* ld-nios2/relax_call26_shared.ld: New.
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It is added for
commit 409ff343a402799563f71f938138b29f8baf7a1c
Author: Alan Modra <amodra@gmail.com>
Date: Tue Nov 8 13:49:11 2011 +0000
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark syms in
executables when export_dynamic.
* ld-elf/rdynamic-1.c: New file.
* ld-elf/rdynamic-1.rd: Likewise.
* ld-elf/shared.exp (build_tests): Add rdynamic-1.
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and readelf.
PR binutils/16317
* ld-tic6x/shlib-1.rd: Expect I attribute with RELA sections.
* ld-tic6x/shlib-1b.rd: Likewise.
* ld-tic6x/shlib-1r.rd: Likewise.
* ld-tic6x/shlib-1rb.rd: Likewise.
* ld-tic6x/shlib-app-1rd: Likewise.
* ld-tic6x/shlib-app-1b.rd: Likewise.
* ld-tic6x/shlib-app-1r.rd: Likewise.
* ld-tic6x/shlib-app-1rb.rd: Likewise.
* ld-tic6x/shlib-noindex.rd: Likewise.
* ld-tic6x/static-app-1.rd: Likewise.
* ld-tic6x/static-app-1b.rd: Likewise.
* ld-tic6x/static-app-1r.rd: Likewise.
* ld-tic6x/static-app-1rb.rd: Likewise.
PR binutils/16318
* ld-tic6x/tic6x.exp: Expect C6000 osabi value in relocatable
objects.
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* ld-elf/pr16498a.s: Replace .align with .p2align.
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PR ld/16498
* ld-elf/pr16498b.d: New file.
* ld-elf/pr16498b.t: Likewise.
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ld/
PR ld/16498
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Improve
orphaned TLS section handling.
ld/testsuite/
PR ld/16498
* ld-elf/pr16498a.d: New file.
* ld-elf/pr16498a.s: Likewise.
* ld-elf/pr16498a.t: Likewise.
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Localise a struct, prevent an unneeded symbol lookup, and fix a
testcase.
ld/
* ld.h (struct map_symbol_def): Move to..
* ldlang.h: ..here.
* ldlang.c (print_assignment): Don't set expld.assign_name to dot.
ld/testsuite/
* ld-scripts/pr14962-2.d: Correct target triple.
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An assignment to dot in an output section that allocates space of
course keeps the output section. Here, I'm changing the behaviour for
assignments that don't allocate space. The idea is not so much to
allow people to force output of an empty section with ". = .", but
to fix cases where an otherwise empty section has padding added by an
alignment expression that changes with relaxation or .eh_frame
editing. Such a section might have zero size before relaxation and so
be stripped incorrectly.
ld/
* ld.texinfo (Output Section Discarding): Mention assigning to dot
as a way of keeping otherwise empty sections.
* ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0,
is_dot_plus_0, is_align_conditional): New predicates.
(exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an
output section, except for some special cases.
* scripttempl/elfmicroblaze.sc: Use canonical form to align at
end of .heap and .stack.
ld/testsuite/
* ld-shared/elf-offset.ld: Align end of .bss with canonical form
of ALIGN that allows an empty .bss to be removed.
* ld-arm/arm-dyn.ld: Likewise.
* ld-arm/arm-lib.ld: Likewise.
* ld-elfvsb/elf-offset.ld: Likewise.
* ld-mips-elf/mips-dyn.ld: Likewise.
* ld-mips-elf/mips-lib.ld: Likewise.
* ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN.
* ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section.
ALIGN address of section instead.
* ld-powerpc/vle-multiseg-2.ld: Likewise.
* ld-powerpc/vle-multiseg-3.ld: Likewise.
* ld-powerpc/vle-multiseg-4.ld: Likewise.
* ld-powerpc/vle-multiseg-6.ld: Likewise.
* ld-scripts/empty-aligned.d: Check section headers not program
headers. Remove xfail and notarget.
* ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
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After resolving a versioned reference, foo@VER1, to a default versioned
definition, foo@@VER1, from a shared object, we also merge it with
the existing regular default symbol definition, foo. When foo is IFUNC
and foo@@VER1 aren't, we will merge 2 incompatible definitions. This
patch avoids merging foo@@VER1 definition with foo definition if
one is IFUNC and the other isn't.
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There is nothing linker can do when a type mismatched default definition
are made dynamic by info->shared, info->export_dynamic or h->ref_dynamic.
But we do want to avoid exporting it when building PIE. Let's remove
those checks.
bfd/
PR ld/2404
* elflink.c (_bfd_elf_merge_symbol): Don't check info->shared,
info->export_dynamic, nor !h->ref_dynamic for type mismatch when
adding the default version.
ld/testsuite/
PR ld/2404
* ld-elf/shared.exp: Add a PIE test for PR ld/2404.
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PR ld/2404 was fixed without a testcase. This patch to add one.
PR ld/2404
* ld-elf/pr2404.out: New file.
* ld-elf/pr2404a.c: Likewise.
* ld-elf/pr2404b.c: Likewise.
* ld-elf/shared.exp (build_tests): Build libpr2404a.so and
libpr2404b.a.
(run_tests): Run pr2404.
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Modifies ld machinery tracking linker script assignments to notice all
assignments, not just those symbols mentioned in DEFINED().
ld/
PR ld/14962
* ldlang.h (struct lang_definedness_hash_entry): Add by_object and
by_script. Make iteration a single bit field.
(lang_track_definedness, lang_symbol_definition_iteration): Delete.
(lang_symbol_defined): Declare.
* ldlang.c (lang_statement_iteration): Expand comment a little.
(lang_init <lang_definedness_table>): Make it bigger.
(lang_track_definedness, lang_symbol_definition): Delete.
(lang_definedness_newfunc): Update.
(lang_symbol_defined): New function.
(lang_update_definedness): Create entries here. Do track whether
script definition of symbol is valid, even when also defined in
an object file.
* ldexp.c (fold_name <DEFINED>): Update.
(fold_name <NAME>): Allow self-assignment for absolute symbols
defined in a linker script.
ld/testsuite/
* ld-scripts/pr14962-2.d,
* ld-scripts/pr14962-2.t: New test.
* ld-scripts/expr.exp: Run it.
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Rather than hacking every backend to not discard dynamic relocations
against an undefined hidden __ehdr_start, make it appear to be defined
early. We want __ehdr_start hidden before size_dynamic_sections so
that it isn't put in .dynsym, but we do need the dynamic relocations
for a PIE or shared library with a non-PIC reference. Defining it
early is wrong if we don't actually define the symbol later to its
proper value. (In some cases we want to leave the symbol undefined,
for example, when the ELF header isn't loaded, and we don't have this
infomation available in before_allocation.)
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Define
__ehdr_start before size_dynamic_sections and restore afterwards.
ld/testsuite/
* ld-elf/ehdr_start-shared.d: New.
* ld-elf/ehdr_start-userdef.d: xfail frv.
* ld-elf/ehdr_start-weak.d: Likewise.
* ld-elf/ehdr_start.d: Likewise.
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(default_ld_simple_link): Likewise.
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Instead, fix Jakub's original code setting up the PR_GNU_RELRO header
from the PT_LOAD header.
PR ld/14207
PR ld/16322
PR binutils/16323
bfd/
* elf.c (assign_file_positions_for_load_sections): Revert last change.
(assign_file_positions_for_non_load_sections): When setting up
PT_GNU_RELRO header, don't require a corresponding PT_LOAD
header that completely covers the relro region.
ld/
* ldlang.c (lang_size_sections): Remove unneeded RELRO base
adjust. Tidy comments.
* ld.texinfo (DATA_SEGMENT_RELRO_END): Correct description.
ld/testsuite/
* ld-x86-64/pr14207.d: Adjust
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Fail if GNU_RELRO segment isn't generated, but should.
* ld-elf/binutils.exp (binutils_test): Check if GNU_RELRO segment
is generated.
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2014-01-09 Vidya Praveen <vidyapraveen@arm.com>
* lib/ld-lib.exp (check_lto_shared_available): New check.
* ld-plugin/lto.exp: Use check_lto_shared_available.
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This patch fixes 2 GNU_RELRO segment bugs:
1. lang_size_sections didn't properly align base to the maximum
alignment power of sections between DATA_SEGMENT_ALIGN and
DATA_SEGMENT_RELRO_END.
2. ld failed to adjust LOAD segment to generate GNU_RELRO segment
when LOAD segment doesn't fit GNU_RELRO segment. This is
https://sourceware.org/bugzilla/show_bug.cgi?id=14207
We "fixed" ld by not generating GNU_RELRO segment. This patch
adjusts LOAD segment to generate GNU_RELRO segment. It fixes
PR ld/16322 and at the same time it also fixes PR binutils/16323
since now we can adjust LOAD segment if it is too small.
bfd/
PR ld/14207
PR ld/16322
PR binutils/16323
* elf.c (_bfd_elf_map_sections_to_segments): Don't check section
size for PT_GNU_RELRO segment.
(assign_file_positions_for_load_sections): If PT_LOAD segment
doesn't fit PT_GNU_RELRO segment, adjust its p_filesz and p_memsz.
ld/
PR ld/14207
PR ld/16322
PR binutils/16323
* ldlang.c (lang_size_sections): Properly align RELRO base.
ld/testsuite/
PR ld/14207
PR ld/16322
PR binutils/16323
* ld-elf/pr16322.d: New file.
* ld-elf/pr16322.s: Likewise.
* ld-x86-64/pr14207.d: Expect PT_GNU_RELRO segment.
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