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2015-10-12Skip the unversioned definition after the default versionH.J. Lu5-0/+34
We may see an unversioned definition after the default version. We should skip the unversioned definition in this case. bfd/ PR ld/19073 * elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned definition after the default version. ld/testsuite/ PR ld/19073 * ld-elf/pr19073.map: New file. * ld-elf/pr19073.rd: Likewise. * ld-elf/pr19073.s: Likewise. * ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
2015-10-07New ARC implementation.Nick Clifton2-1/+5
bfd * archures.c: Remove support for older ARC. Added support for new ARC cpus (ARC600, ARC601, ARC700, ARCV2). * bfd-in2.h: Likewise. * config.bfd: Likewise. * cpu-arc.c: Likewise. * elf32-arc.c: Totally changed file with a refactored inplementation of the ARC port. * libbfd.h: Added ARC specific relocation types. * reloc.c: Likewise. gas * config/tc-arc.c: Revamped file for ARC support. * config/tc-arc.h: Likewise. * doc/as.texinfo: Add new ARC options. * doc/c-arc.texi: Likewise. ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*. * emulparams/arcebelf_prof.sh: New file * emulparams/arcebelf.sh: Likewise. * emulparams/arceblinux_prof.sh: Likewise. * emulparams/arceblinux.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emultempl/arclinux.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise * Makefile.am: Add new ARC emulations. * Makefile.in: Regenerate. * NEWS: Mention the new feature. opcodes * arc-dis.c: Revamped file for ARC support * arc-dis.h: Likewise. * arc-ext.c: Likewise. * arc-ext.h: Likewise. * arc-opc.c: Likewise. * arc-fxi.h: New file. * arc-regs.h: Likewise. * arc-tbl.h: Likewise. binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact and ARCv2. (get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Likewise. * NEWS: Mention the new feature. include * dis-asm.h (arc_get_disassembler): Correct declaration. * arc-reloc.def: Macro file with definition of all relocation types. * arc.h: Changed macros for the newly supported ARC cpus. Altered enum defining the supported relocations. * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added macro for EM_ARC_COMPACT2. * arc-func.h: New file. * arc.h: Likewise.
2015-10-05Don't re-export common symbolsH.J. Lu3-2/+16
For ELF linker, a common symbol isn't a definition. When we decide if a symbol should be re-exported, we should check if the symbol isn't undefined, not if it is a definition. bfd/ PR ld/18914 * elflink.c (elf_link_add_object_symbols): Don't re-export a symbol if it isn't undefined. ld/testsuite/ PR ld/18914 * ld-elf/exclude.exp: Also check exclude_common. * ld-elf/exclude2.s: Add exclude_common.
2015-10-02[LD][AARCH64]Add TLSIE relaxation support under large memory model.Renlin Li4-0/+40
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add TLSIE_MOVW_GOTTPREL_G1. (aarch64_tls_transition_without_check): Add TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2 transition for local symbol. (elfNN_aarch64_tls_relax): Add a argument to pass tp offset. Add TLSIE_MOVW_GOTTPREL_G1 relaxation. (elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax with new argument. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test. * ld-aarch64/tls-relax-large-ie-le.d: New. * ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02[LD][AARCH64]Add TLSDESC support for large memory model.Renlin Li8-0/+145
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_tls_transition_without_check): Add relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC, TLSDESC_OFF_G1. (aarch64_tls_transition_without_check): Add relaxation support. (aarch64_reloc_got_type): Add support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_tls_relax): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/tls-large-desc.d: New. * ld-aarch64/tls-large-desc.s: New. * ld-aarch64/tls-relax-large-desc-ie.d: New. * ld-aarch64/tls-relax-large-desc-ie.s: New. * ld-aarch64/tls-relax-large-desc-le.d: New. * ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02[BFD][AARCH64]Add TLSGD relaxation support under large memory model.Renlin Li6-0/+81
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC): Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1. (aarch64_tls_transition_without_check): Likewise (elfNN_aarch64_tls_relax): Likwise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: run new test * ld-aarch64/tls-relax-large-gd-ie.d: New. * ld-aarch64/tls-relax-large-gd-ie.s: New. * ld-aarch64/tls-relax-large-gd-le.d: New. * ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li4-0/+41
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li4-0/+56
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-516.d: New. * ld-aarch64/emit-relocs-516.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li4-0/+53
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-515.d: New. * ld-aarch64/emit-relocs-515.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li4-1/+42
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/aarch64-elf.exp: Run new test. * ld-aarch64/emit-relocs-301.d: New. * ld-aarch64/emit-relocs-301.s: New.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li4-1/+43
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add support for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-302.d: New. * ld-aarch64/emit-relocs-302.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.Renlin Li4-1/+39
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (aarch64_reloc_got_type): Add BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise (elfNN_aarch64_final_link_relocate): Calculate offset within GOT. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/emit-relocs-310.d: New. * ld-aarch64/emit-relocs-310.s: New. * ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-01Create a PLT entry for R_X86_64_PC32 in non-code sectionsH.J. Lu6-4/+66
Since something like ".long foo - ." may be used as pointer, we make sure that PLT is used if foo is a function defined in a shared library. bfd/ PR ld/19031 * elf64-x86-64.c (elf_x86_64_check_relocs): Set pointer_equality_needed for R_X86_64_PC32 reloc in non-code sections. ld/testsuite/ PR ld/19031 * ld-x86-64/x86-64.exp: Run PR ld/19031 test. * ld-x86-64/pr19031.out: New file. * ld-x86-64/pr19031a.c: Likewise. * ld-x86-64/pr19031b.S: Likewise. * ld-x86-64/pr19031c.c: Likewise.
2015-10-01[BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.Renlin Li4-0/+24
bfd/ 2015-10-01 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove. (elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once. ld/testsuite/ 2015-10-01 Renlin Li <renlin.li@arm.com> * ld-aarch64/plt_mapping_symbol.d: New. * ld-aarch64/plt_mapping_symbol.s: New. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01Update ld-x86-64/pr19013-nacl.dAlan Modra2-1/+2
* ld-x86-64/pr19013-nacl.d: Update.
2015-10-01Revert "Also check e_machine when merging sections"Alan Modra2-1/+5
Commit 9865bd0d added a bogus check in _bfd_elf_merge_sections. bfd/ PR ld/19013 * elflink.c (_bfd_elf_merge_sections): Revert last change. ld/testsuite/ * ld-x86-64/pr19013-x32.d: Update.
2015-09-30Pass -m elf_x86_64 to ld for 64-bit testH.J. Lu2-1/+5
* ld-x86-64/pr19013.d (ld): Add -m elf_x86_64.
2015-09-30Create a PLT entry for R_386_PC32 in non-code sectionsH.J. Lu6-0/+67
Since something like ".long foo - ." may be used as pointer, we make sure that PLT is used if foo is a function defined in a shared library. bfd/ PR ld/19031 * elf32-i386.c (elf_i386_check_relocs): Set pointer_equality_needed for R_386_PC32 reloc in non-code sections. ld/testsuite/ PR ld/19031 * ld-i386/i386.exp: Run PR ld/19031 test. * ld/testsuite/ld-i386/pr19031.out: New file. * ld/testsuite/ld-i386/pr19031a.c: Likewise. * ld/testsuite/ld-i386/pr19031b.S: Likewise. * ld/testsuite/ld-i386/pr19031c.c: Likewise.
2015-09-30Also check e_machine when merging sectionsH.J. Lu6-0/+43
When we check consistency for merge ELF sections, we should not only check EI_CLASS, but also compatible e_machine. bfd/ PR ld/19013 * elflink.c (_bfd_elf_merge_sections): Only merge input bfds that have the compatible ELF machine code with the output bfd. ld/testsuite/ PR ld/19013 * ld-x86-64/pr19013-nacl.d: New file. * ld-x86-64/pr19013-x32.d: Likewise. * ld-x86-64/pr19013.d: Likewise. * ld-x86-64/pr19013.s: Likewise. * ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
2015-09-29Adjust the output section size to skip gap fillsH.J. Lu4-0/+34
In objcopy, copy_object calls copy_section to copy contents of input section to output section. When --gap-fill= is used, objcopy extends the size of output sectios to fill gaps between output sections with gap fills. In this case, we adjust the output section size to skip gap files to avoid reading beypond the input section buffer before calling copy_section and restore the output section size after input sections have been copied. binutils/ PR binutils/19005 * objcopy.c (copy_object): Adjust the output section size to skip gap fills between sections when copying from input sections to output sections. ld/testsuite/ PR binutils/19005 * ld-elf/pr19005.d: New file. * ld-elf/pr19005.s: Likewise. * ld-elf/pr19005.t: Likewise.
2015-09-25Correct the generation of OR1K pc-relative relocations.Peter Zotov2-1/+6
gas PR ld/18759 * config/tc-or1k.c (tc_gen_reloc): Correct computation of PC relative relocs. * config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete. bfd * elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE. (R_OR1K_16_PCREL): Likewise. (R_OR1K_8_PCREL): Likewise. ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-22Update MIPS PIE tests for DF_1_PIE changeH.J. Lu4-16/+25
Since linker now sets the DF_1_PIE bit in the DT_FLAGS_1 tag for PIE, we need to update MIPS PIE tests for it. * ld-mips-elf/pie-n32.d: Updated. * ld-mips-elf/pie-n64.d: Likewise. * ld-mips-elf/pie-o32.d: Likewise.
2015-09-22Set DF_1_PIE in gld${EMULATION_NAME}_after_parseH.J. Lu2-0/+12
We can't add OPTION_PIE to gld${EMULATION_NAME}_handle_option since it has been handled in parse_args in lexsup.c. This patch moves setting DF_1_PIE to gld${EMULATION_NAME}_after_parse. ld/ * emultempl/alphaelf.em (alpha_after_parse): Call gld${EMULATION_NAME}_after_parse instead of after_parse_default. * emultempl/cr16elf.em (cr16elf_after_parse): Likewise. * emultempl/crxelf.em (crxelf_after_parse); Likewise. * emultempl/hppaelf.em (hppaelf_after_parse): Likewise. * emultempl/mipself.em (mips_after_parse): Likewise. * emultempl/nds32elf.em (nds32_elf_after_parse): Likewise. * emultempl/elf32.em: Don't include ldlex.h. (gld${EMULATION_NAME}_after_parse): New function. (gld${EMULATION_NAME}_handle_option) [GENERATE_PIE_SCRIPT] <OPTION_PIE>: Removed. (ld_${EMULATION_NAME}_emulation): Replace after_parse_default with gld${EMULATION_NAME}_after_parse. * emultempl/ia64elf.em (gld${EMULATION_NAME}_after_parse): Renamed to ... (ia64elf_after_parse): This. Call gld${EMULATION_NAME}_after_parse instead of after_parse_default. (LDEMUL_AFTER_PARSE): Replace gld${EMULATION_NAME}_after_parse with ia64elf_after_parse. ld/testsuite/ * ld-elf/pie.d: New test.
2015-09-18Delay converting linker script defined symbols from absoluteAlan Modra9-5/+65
Giving linker script symbols defined outside of output sections a section-relative value early, leads to them being used in expressions as if they were defined inside an output section. This can mean loss of the section VMA, and wrong results. ld/ PR ld/18963 * ldexp.h (struct ldexp_control): Add rel_from_abs. (ldexp_finalize_syms): Declare. * ldexp.c (new_rel_from_abs): Keep absolute for expressions outside of output section statements. Set rel_from_abs. (make_abs, exp_fold_tree, exp_fold_tree_no_dot): Clear rel_from_abs. (struct definedness_hash_entry): Add final_sec, and comment. (update_definedness): Set final_sec. (set_sym_sections, ldexp_finalize_syms): New functions. * ldlang.c (lang_process): Call ldexp_finalize_syms. ld/testsuite PR ld/18963 * ld-scripts/pr18963.d, * ld-scripts/pr18963.t: New test. * ld-scripts/expr.exp: Run it. * ld-elf/provide-hidden-2.ld: Explicitly make "dot" absolute. * ld-mips-elf/gp-hidden.sd: Don't care about _gp section. * ld-mips-elf/no-shared-1-n32.d: Don't care about symbol shown at start of .data section. * ld-mips-elf/no-shared-1-n64.d: Likewise. * ld-mips-elf/no-shared-1-o32.d: Likewise.
2015-09-11Add "ld -r" tests for PR ld/15323H.J. Lu3-5/+26
Weak defined function is turned into non-weak defined function by "ld -r -flto" with GCC 5 due to a GCC 5 regression: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67548 Add "ld -r" tests for PR ld/15323 to make sure that any linker change won't introduce linker regression for PR ld/15323. * ld-plugin/lto.exp (lto_link_tests): Add a "ld -r" test for PR ld/15323. (lto_run_tests): Add a "ld -r" test for PR ld/15323.
2015-09-09[AArch64] Relax TLS local dynamic traditional into local executableJiong Wang6-0/+88
The linker relaxation logic will be: Code sequence I (tiny): 0x00 adr x0, :tlsldm:x 0x04 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE Code sequence II (small): 0x00 adrp a0, :tlsldm:x 0x04 add a0, #:tlsldm_lo12:x 0x08 bl __tls_get_addr | V 0x00 mrs x0, tpidr_el0 0x04 add x0, x0, TCB_SIZE 0x08 nop 2015-09-09 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support three TLS local dynamic traditional relocations types. (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to local executable relaxation. ld/testsuite/ * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase. * ld-aarch64/tls-relax-ld-le-small.s: Likewise. * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file. * ld-aarch64/tls-relax-ld-le-small.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-09-07ld: Fix failures in new orphan handling tests.Andrew Burgess4-7/+16
The new orphan handling tests added in commit c005eb9 fail on a range of targets. Some of the failures were fixed in commit e32aa93 but not all. This commit should address the remaining failures. Update results to account for orphan sections being placed in different orders, and for other, target specific sections, being discarded. ld/testsuite/ChangeLog: * ld-elf/orphan-7.map: Allow for other discarded sections. * ld-elf/orphan-8.map: Updated to allow for different section ordering on different targets. * ld-elf/orphan.ld: Place .sbss section.
2015-09-05Update ld-elf/orphan-8.map to support 32-bit targetsH.J. Lu2-4/+8
* ld-elf/orphan-8.map: Updated to support 32-bit targets.
2015-09-04ld: Extend options for altering orphan handling behaviour.Andrew Burgess10-14/+49
Replace the options --warn-orphan and --no-warn-orphan with a single option --orphan-handling=MODE, where mode can be place, warn, error, and discard. Mode 'place' is the default, and is the current behaviour, placing the orphan section into a suitable output section. Mode 'warn' is the same as '--warn-orphan'. The orphan is also placed using the same algorithm as for 'place'. Mode 'error' is the same as '--warn-orphan' and '--fatal-warnings'. Mode 'discard' assigns all output sections to the /DISCARD/ section. ld/ChangeLog: * ld.h (enum orphan_handling_enum): New. (ld_config_type): Remove warn_orphan, add orphan_handling. * ldemul.c (ldemul_place_orphan): Remove warning about orphan sections. * ldlang.c (ldlang_place_orphan): New function. (lang_place_orphans): Call ldlang_place_orphan. * ldlex.h (enum option_values): Remove OPTION_WARN_ORPHAN and OPTION_NO_WARN_ORPHAN, add OPTION_ORPHAN_HANDLING. * lexsup.c (ld_options): Remove 'warn-orphan' and 'no-warn-orphan', add 'orphan-handling'. (parse_args): Remove handling for OPTION_WARN_ORPHAN and OPTION_NO_WARN_ORPHAN, add handling for OPTION_ORPHAN_HANDLING. * NEWS: Replace text about --warn-orphan with --orphan-handling. * ld.texinfo (Options): Remove --warn-orphan entry and add entry on --orphan-handling. (Orphan Sections): Add reference to relevant command line options. ld/testsuite/ChangeLog: * ld-elf/elf.exp: Switch to rely on run_dump_test. * ld-elf/orphan-5.l: Update expected output. * ld-elf/orphan-5.d: New file. * ld-elf/orphan-6.d: New file. * ld-elf/orphan-6.l: New file. * ld-elf/orphan-7.d: New file. * ld-elf/orphan-7.map: New file. * ld-elf/orphan-8.d: New file. * ld-elf/orphan-8.map: New file.
2015-09-03Add ifunc tests for call, jmp, add, testH.J. Lu9-81/+50
* ld-ifunc/ifunc-21-i386.s: Add tests for call, jmp, add, test. * ld-ifunc/ifunc-21-x86-64.s: Likewise. * ld-ifunc/ifunc-22-i386.s: Likewise. * ld-ifunc/ifunc-22-x86-64.s: Likewise. * ld-ifunc/ifunc-21-i386.d: Updated. * ld-ifunc/ifunc-21-x86-64.d: Likewise. * ld-ifunc/ifunc-22-i386.d: Likewise. * ld-ifunc/ifunc-22-x86-64.d: Likewise.
2015-09-02Add 2 ifunc tests for i386 and x86-64H.J. Lu9-0/+211
* ld-ifunc/ifunc-21-i386.d: Likewise. * ld-ifunc/ifunc-21-i386.s: Likewise. * ld-ifunc/ifunc-21-x86-64.d: Likewise. * ld-ifunc/ifunc-21-x86-64.s: Likewise. * ld-ifunc/ifunc-22-i386.d: Likewise. * ld-ifunc/ifunc-22-i386.s: Likewise. * ld-ifunc/ifunc-22-x86-64.d: Likewise. * ld-ifunc/ifunc-22-x86-64.s: Likewise.
2015-09-01Skip PLT for function pointer initializationH.J. Lu16-16/+199
We use its PLT entry to initialize function pointer at run-time. If there is no other usage for the PLT entry, we can generate run-time function pointer relocations in read-write section, which can be resolved by dynamic linker, to initialize function pointers. It avoids the extra indirect branch overhead in PLT. bfd/ PR ld/18900 * elf32-i386.c (elf_i386_link_hash_entry): Add func_pointer_refcount. (elf_i386_link_hash_newfunc): Clear func_pointer_refcount. (elf_i386_get_local_sym_hash): Likewise. (elf_i386_copy_indirect_symbol): Also copy func_pointer_refcount. (elf_i386_check_relocs): Increment func_pointer_refcount. (elf_i386_gc_sweep_hook): Decrement func_pointer_refcount. (elf_i386_allocate_dynrelocs): Don't create the PLT entry if there are only function pointer relocations which can be resolved at run-time. Keep dynanamic relocations for run-time function pointer initialization. (elf_i386_relocate_section): Copy dynamic function pointer relocations. * elf64-x86-64.c (elf_x86_64_link_hash_entry): Add func_pointer_refcount. (elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount. (elf_x86_64_get_local_sym_hash): Likewise. (elf_x86_64_copy_indirect_symbol): Also copy func_pointer_refcount. (elf_x86_64_check_relocs): Increment func_pointer_refcount. (elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount. (elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if there are only function pointer relocations which can be resolved at run-time. Keep dynanamic relocations for run-time function pointer initialization. (elf_x86_64_relocate_section): Copy dynamic function pointer relocations. ld/testsuite/ PR ld/18900 * ld-i386/i386.exp: Run tests for PR ld/18900. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr18900.out: New file. * ld-i386/pr18900a.c: Likewise. * ld-i386/pr18900a.c: Likewise. * ld-i386/pr18900a.rd: Likewise. * ld-i386/pr18900b.c: Likewise. * ld-i386/pr18900b.rd: Likewise. * ld-i386/pr18900c.c: Likewise. * ld-x86-64/pr18900.out: Likewise. * ld-x86-64/pr18900a.c: Likewise. * ld-x86-64/pr18900a.rd: Likewise. * ld-x86-64/pr18900b.c: Likewise. * ld-x86-64/pr18900b.rd: Likewise. * ld-x86-64/pr18900c.c: Likewise. * ld-x86-64/mpx3.dd: Updated.
2015-08-27Add reloc sort testAlan Modra4-0/+62
* ld-powerpc/relocsort.s, * ld-powerpc/relocsort.d: New test. * ld-powerpc/powerpc.exp: Run it.
2015-08-26Select MIPS ABi based upon abiflags rather than e_flags.Matthew Fortune2-34/+44
bfd PR ld/18401 * elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an ISA value to a bfd machine number. (bfd_mips_isa_ext): Update the ISA level and revision if necessary. Use mips_mach_extends_p to decide if the ISA extension needs to be set. (_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to be inferred from the ABI setting. Set the ISA level from the maximum of the incoming and outgoing ISA levels. tests * ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
2015-08-19[AArch64][6/6] LD support TLSLD load/store relocation typesJiong Wang26-0/+276
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-531.s: New testcase. * ld-aarch64/emit-relocs-531-overflow.s: Likewise. * ld-aarch64/emit-relocs-532.s: Likewise. * ld-aarch64/emit-relocs-533.s: Likewise. * ld-aarch64/emit-relocs-533-overflow.s: Likewise. * ld-aarch64/emit-relocs-534.s: Likewise. * ld-aarch64/emit-relocs-535.s: Likewise. * ld-aarch64/emit-relocs-535-overflow.s: Likewise. * ld-aarch64/emit-relocs-536.s: Likewise. * ld-aarch64/emit-relocs-537.s: Likewise. * ld-aarch64/emit-relocs-537-overflow.s: Likewise. * ld-aarch64/emit-relocs-538.s: Likewise. * ld-aarch64/emit-relocs-531.d: New expectation file. * ld-aarch64/emit-relocs-531-overflow.d: Likewise. * ld-aarch64/emit-relocs-532.d: Likewise. * ld-aarch64/emit-relocs-533.d: Likewise. * ld-aarch64/emit-relocs-533-overflow.d: Likewise. * ld-aarch64/emit-relocs-534.d: Likewise. * ld-aarch64/emit-relocs-535.d: Likewise. * ld-aarch64/emit-relocs-535-overflow.d: Likewise. * ld-aarch64/emit-relocs-536.d: Likewise. * ld-aarch64/emit-relocs-537.d: Likewise. * ld-aarch64/emit-relocs-537-overflow.d: Likewise. * ld-aarch64/emit-relocs-538.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19[AArch64][4/6] LD support TLSLD move/add relocation typesJiong Wang30-0/+284
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18276 * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2. (elfNN_aarch64_final_link_relocate): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-87.s: New testcase. * ld-aarch64/emit-relocs-88.s: Likewise. * ld-aarch64/emit-relocs-88-overflow.s: Likewise. * ld-aarch64/emit-relocs-89.s: Likewise. * ld-aarch64/emit-relocs-90.s: Likewise. * ld-aarch64/emit-relocs-90-overflow.s: Likewise. * ld-aarch64/emit-relocs-523.s: Likewise. * ld-aarch64/emit-relocs-524.s: Likewise. * ld-aarch64/emit-relocs-525.s: Likewise. * ld-aarch64/emit-relocs-527.s: Likewise. * ld-aarch64/emit-relocs-526.s: Likewise. * ld-aarch64/emit-relocs-528.s: Likewise. * ld-aarch64/emit-relocs-528-overflow.s: Likewise. * ld-aarch64/emit-relocs-87.d: New expectation file. * ld-aarch64/emit-relocs-88.d: Likewise. * ld-aarch64/emit-relocs-88-overflow.d: Likewise. * ld-aarch64/emit-relocs-89.d: Likewise. * ld-aarch64/emit-relocs-90.d: Likewise. * ld-aarch64/emit-relocs-90-overflow.d: Likewise. * ld-aarch64/emit-relocs-91.d: Likewise. * ld-aarch64/emit-relocs-523.d: Likewise. * ld-aarch64/emit-relocs-524.d: Likewise. * ld-aarch64/emit-relocs-525.d: Likewise. * ld-aarch64/emit-relocs-526.d: Likewise. * ld-aarch64/emit-relocs-527.d: Likewise. * ld-aarch64/emit-relocs-528.d: Likewise. * ld-aarch64/emit-relocs-528-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-19[AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang6-0/+45
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-530.s: New testcase. * ld-aarch64/emit-relocs-92.s: Likewise. * ld-aarch64/emit-relocs-530.d: New expectation file. * ld-aarch64/emit-relocs-92.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
2015-08-18Add another test for PR ld/18841H.J. Lu3-5/+44
PR ld/18841 * ld-ifunc/ifunc.exp: Add another test for PR ld/18841. * ld-ifunc/pr18841c.c: New file.
2015-08-18Return reloc_class_ifunc for reloc against IFUNCH.J. Lu5-0/+58
elf_XXX_reloc_type_class should return reloc_class_ifunc for relocation against STT_GNU_IFUNC symbol. bfd/ PR ld/18841 * elf-bfd.h (elf_link_hash_table): Add dynsym. * elf32-i386.c (elf_i386_reloc_type_class): Return reloc_class_ifunc for relocation against STT_GNU_IFUNC symbol. * elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise. * elflink.c (_bfd_elf_link_create_dynamic_sections): Set dynsym. (bfd_elf_size_dynsym_hash_dynstr): Use dynsym. (elf_final_link_info): Remove dynsym_sec. (elf_link_output_extsym): Replace dynsym_sec with dynsym. (bfd_elf_final_link): Remove reference to dynsym_sec. Replace dynsym_sec with dynsym. ld/testsuite/ PR ld/18841 * ld-ifunc/ifunc.exp: Add a test for PR ld/18841. * ld-ifunc/pr18841.out: New file. * ld-ifunc/pr18841a.c: Likewise. * ld-ifunc/pr18841b.c: Likewise.
2015-08-13Issue an error for read-only segment with dynamic IFUNC relocationsH.J. Lu7-0/+48
To load an ELF binary with DT_TEXTREL tag, the dynamic linker calls __mprotect on the read-only segment with PROT_READ|PROT_WRITE before applying dynamic relocation. It leads to segfault when performing IFUNC relocations since the read-only segment has no execute permission. This patch changes x86 linker to issue an error for read-only segment with dynamic IFUNC relocations. Other backends with IFUNC support may need a similar change. bfd/ PR ld/18801 * elf32-i386.c (elf_i386_size_dynamic_sections): Issue an error for read-only segment with dynamic IFUNC relocations. * elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise. ld/testsuite/ PR ld/18801 * ld-i386/i386.exp: Run pr18801. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr18801.d: New file. * ld-i386/pr18801.s: Likewise. * ld-x86-64/pr18801.d: Likewise. * ld-x86-64/pr18801.s: Likewise.
2015-08-13Add ChangeLog for check_ifunc_attribute_availableH.J. Lu1-0/+1
2015-08-12Set EI_OSABI to ELFOSABI_GNU for local IFUNC symbolsH.J. Lu6-0/+50
Since the backend elf_add_symbol_hook isn't called on local symbols, the EI_OSABI field isn't to ELFOSABI_GNU where are local IFUNC symbols. This patch changes the x86 backends to set has_gnu_symbols if there are relocations against IFUNC symbols. Other backends with IFUNC support may need a similar change. This patch also changes the type of has_gnu_symbols from bfd_boolean to enum elf_gnu_symbols. bfd/ PR ld/18815 * elf-bfd.h (elf_gnu_symbols): New enum. (elf_obj_tdata): Use elf_gnu_symbols on has_gnu_symbols. * elf-s390-common.c (elf_s390_add_symbol_hook): Set has_gnu_symbols to elf_gnu_symbol_any. * elf32-arm.c (elf32_arm_add_symbol_hook): Likewise. * elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise. * elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise. * elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise. * elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise. * elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise. * lfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise. * elf32-i386.c (elf_i386_check_relocs): Update has_gnu_symbols if there are relocations against IFUNC symbols. (elf_i386_add_symbol_hook): Don't check STT_GNU_IFUNC here. * elf64-x86-64. (elf_x86_64_check_relocs): Update has_gnu_symbols if there are relocations against IFUNC symbols. (elf_x86_64_add_symbol_hook): Don't check STT_GNU_IFUNC here. ld/testsuite/ PR ld/18815 * ld-i386/i386.exp: Run pr18815. * ld-x86-64/x86-64.exp: Likewise. * ld-i386/pr18815.d: New file. * ld-i386/pr18815.s: Likewise. * ld-x86-64/pr18815.d: Likewise. * ld-x86-64/pr18815.s: Likewise.
2015-08-12[MIPS] Map 'move' to 'or'.Simon Dardis30-71/+102
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This change affects microMIPS, MIPS32, MIPS64. 2015-08-12 Simon Dardis <simon.dardis@imgtec.com> opcodes/ * micromips-opc.c (micromips_opcodes): Re-order table so that move based on 'or' is first. * mips-opc.c (mips_builtin_opcodes): Ditto. bfd/ * elfxx-mips.c (STUB_MOVE): Change to use 'or' only. (mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry, mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry): Update to use 'or' instead of 'addu/daddu'. (_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE. (move_insns_32): Reorder table. gas/ * config/tc-mips.c (move_register): Change to use 'or' only. (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to use or for move. gas/testsuite/ * gas/mips/elf-rel23.d: Update test. * gas/mips/elf-rel23.d: Ditto. * gas/mips/elf-rel23a.d: Ditto. * gas/mips/elf-rel23b.d: Ditto. * gas/mips/elf_e_flags1.d: Ditto. * gas/mips/elf_e_flags2.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/loc-swap-dis.d: Ditto. * gas/mips/micromips-insn32.d: Ditto. * gas/mips/micromips-noinsn32.d: Ditto. * gas/mips/micromips-trap.d: Ditto. * gas/mips/micromips.d: Ditto. * gas/mips/mips-abi32-pic.d: Ditto. * gas/mips/mips-abi32.d: Ditto. * gas/mips/mips-gp32-fp32-pic.d: Ditto. * gas/mips/mips-gp32-fp32.d: Ditto. * gas/mips/mips-gp32-fp64-pic.d: Ditto. * gas/mips/mips-gp32-fp64.d: Ditto. * gas/mips/mips-gp64-fp32-pic.d: Ditto. * gas/mips/mips-gp64-fp32.d: Ditto. * gas/mips/mips-gp64-fp64-pic.d: Ditto. * gas/mips/mips-gp64-fp64.d: Ditto. * gas/mips/mipsr6@loc-swap-dis.d: Ditto. * gas/mips/tls-o32.d: Ditto. * gas/mips/uld2-eb.d: Ditto. * gas/mips/uld2-el.d: Ditto. * gas/mips/ulw2-eb-ilocks.d: Ditto. * gas/mips/ulw2-eb.d: Ditto. * gas/mips/ulw2-el-ilocks.d: Ditto. * gas/mips/ulw2-el.d: Ditto. * gas/mips/move.d: New test. * gas/mips/move.s: Ditto. * gas/mips/micromips32-move.d: Ditto. * gas/mips/micromips32-move.s: Ditto. * gas/mips/mips.exp: Run the new tests. gold/ * mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64, lazy_stub_normal_1, lazy_stub_normal_1_n64, lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big, lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64, lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big, lazy_stub_micromips32_big_n64): Update to use 'or' for move instead of 'addu/daddu'. ld/testsuite/ * ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test. * ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-se.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto. * ld-mips-elf/jalx-2.dd: Ditto. * ld-mips-elf/mips16-pic-3.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3a.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-5b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto. * ld-mips-elf/stub-dynsym-1-10000.d: Ditto. * ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto. * ld-mips-elf/stub-dynsym-1-7fff.d: Ditto. * ld-mips-elf/stub-dynsym-1-8000.d: Ditto. * ld-mips-elf/stub-dynsym-1-fff0.d: Ditto. * ld-mips-elf/tlsbin-o32.d: Ditto. * ld-mips-elf/tlsdyn-o32-1.d: Ditto. * ld-mips-elf/tlsdyn-o32-2.d: Ditto. * ld-mips-elf/tlsdyn-o32-3.d: Ditto. * ld-mips-elf/tlsdyn-o32.d: Ditto. * ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12Remove ChangeLog separatorAlan Modra1-1/+1
2015-08-12[AArch64] Fix test failures on elf configurationJiong Wang6-29/+47
This patch fixed those failures on elf configuration by: * Improve the ILP32 target selector "aarch64_choose_ilp32_emul", makes it more robust. Target triples copied from configure.tgt * Updated emit-relocs-86/-overflow.d to use aarch64_choose_ilp32_emul which is following what have done with emit-relocs-28. * Those instruction encoding mismatch is because those encoding contains pc-relative address. As for elf, we may have different start address. relaxed encodind check, especially for aarch64-farcall-b/bl-plt, as the main purpose of those check are ELF text/data layout, we just want to make sure veneer to plt stub is generated. 2015-08-12 Jiong Wang <jiong.wang@arm.com> ld/testsuite/ * ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): Support all four triple shapes: aarch64-*-linux*, aarch64-*-elf, aarch64_be-*-linux*, aarch64_be-*-elf. * ld-aarch64/emit-relocs-86.d: Use aarch64_choose_ilp32_emul. * ld-aarch64/emit-relocs-86-overflow.d: Likewise. * ld-aarch64/ld-aarch64/farcall-b-plt.d: Relax instrucion encoding check when they reflect address. * ld-aarch64/ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-12[AArch64] Rename relocs-257-symbolic-func ld test to relocs-1027-symbolic-func.Thomas Preud'homme4-2/+11
2015-08-12 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/testsuite/ * ld-aarch64/aarch64-elf.exp: Rename relocs-257-symbolic-func to relocs-1027-symbolic-func. * ld-aarch64/relocs-257-symbolic-func.d: Rename to ... * ld-aarch64/relocs-1027-symbolic-func.d: ... this. * ld-aarch64/relocs-257-symbolic-func.s: Rename to ... * ld-aarch64/relocs-1027-symbolic-func.s: ... this.
2015-08-11[AArch64] Commit missing testcasesJiong Wang4-0/+56
2015-08-11[AArch64] Long branch veneer support far symbol defined by --defsymJiong Wang2-0/+9
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". Loose the check for symbol from ABS section. (elfNN_aarch64_size_stubs): Pass sym_sec. ld/testsuite/ * ld-aarch64/farcall-b-defsym.s: New test. * ld-aarch64/farcall-bl-defsym.s: Likewise. * ld-aarch64/farcall-b-defsym.d: New expectation. * ld-aarch64/farcall-bl-defsym.d: Likewise.
2015-08-11[AArch64] PR18668, repair long branch veneer for plt stubJiong Wang8-0/+133
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ PR ld/18668 * elfnn-aarch64.c (aarch64_type_of_stub): Update destination for calls go through plt stub. (elfNN_aarch64_final_link_relocate): Adjust code logic for CALL26, JUMP26 relocation to support inserting veneer for call to plt stub. ld/testsuite/ * ld-aarch64/farcall-b-gsym.s: New test. * ld-aarch64/farcall-b-plt.s: Likewise. * ld-aarch64/farcall-bl-plt.s: Likewise. * ld-aarch64/farcall-b-gsym.d: New expect file. * ld-aarch64/farcall-b-plt.d: Likewise. * ld-aarch64/farcall-bl-plt.d: Likewise.
2015-08-11[AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang10-0/+82
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_reloc_got_type): Likewise. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. ld/testsuite/ * ld-aarch64/emit-relocs-529.s: New testcase. * ld-aarch64/emit-relocs-529-overflow.s: Likewise. * ld-aarch64/emit-relocs-86.s: Likewise. * ld-aarch64/emit-relocs-86-overflow.s: Likewise. * ld-aarch64/emit-relocs-529.d: New expectation file. * ld-aarch64/emit-relocs-529-overflow.d: Likewise. * ld-aarch64/emit-relocs-86.d: Likewise. * ld-aarch64/emit-relocs-86-overflow.d: Likewise. * ld-aarch64/aarch64-elf.exp: Run new testcases.
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