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2015-01-29Correct PowerPC64 local-dynamic TLS linker optimizationAlan Modra6-2/+189
The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-28The initial support for LDPT_GET_VIEWH.J. Lu12-0/+26
This patch adds the initial support for LDPT_GET_VIEW. ld/ PR ld/17878 * plugin.c (tv_header_tags(): Add LDPT_GET_VIEW. (get_view): New function. (set_tv_header): Handle LDPT_GET_VIEW. * testplug.c (tag_names): Add LDPT_GET_VIEW. (tv_get_view): New. (dump_tv_tag): Handle LDPT_GET_VIEW. (parse_tv_tag): Likewise. ld/testsuite/ PR ld/17878 * ld-plugin/plugin-1.d: Add LDPT_GET_VIEW. * ld-plugin/plugin-10.d: Likewise. * ld-plugin/plugin-11.d: Likewise. * ld-plugin/plugin-2.d: Likewise. * ld-plugin/plugin-3.d: Likewise. * ld-plugin/plugin-4.d: Likewise. * ld-plugin/plugin-5.d: Likewise. * ld-plugin/plugin-6.d: Likewise. * ld-plugin/plugin-7.d: Likewise. * ld-plugin/plugin-8.d: Likewise. * ld-plugin/plugin-9.d: Likewise.
2015-01-28ld: don't use ia64 register name in expression of pr16322 testJan Beulich2-4/+9
"f1" is a register name on ia64, and hence gets warned upon when used as expression value: .../binutils/2.25/ld/testsuite/ld-elf/pr16322.s: Assembler messages: .../binutils/2.25/ld/testsuite/ld-elf/pr16322.s:6: Warning: register value used as expression Change the name (and "p1" at once, which is a register name too, albeit not currently causing any immediate problem). ld/testsuite/ 2015-01-28 Jan Beulich <jbeulich@suse.com> * ld-elf/pr16322.s (p1): Rename to px1. (f1): Rename to fx1.
2015-01-28PowerPC64 changes for xlcAlan Modra6-0/+69
The changes to reorder sections for better relro protection on powerpc64, 3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc. xlc -qdatalocal puts global variables into .toc, which means that .toc must be writable. The simplest way to accomplish this is to edit the linker script to remove .toc sections from .got on detecting xlc object files. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc". * elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols in .toc indicate xlc compiled code that might require a rw .toc. ld/ * emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define. * emultempl/ppc64elf.em (params): Init new field. (ppc_after_open): New function. (LDEMUL_AFTER_OPEN): Define. * ldlang.c (lang_final): Whitespace fix. ld/testsuite/ * ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test. * ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test. * ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
2015-01-28Allow symbols in MEMORY region specificationSenthil Kumar Selvaraj4-1/+66
This patch fixes PR 4643 by allowing symbols in the LENGTH and ORIGIN fields of MEMORY regions. Previously, only constants and constant expressions are allowed. For the AVR target, this helps define memory constraints more accurately (per device), without having to create a ton of device specific linker scripts. ld/ PR 4643 * ldexp.c (fold_name): Fold LENGTH only after lang_first_phase_enum. * ldgram.y (memory_spec): Don't evaluate ORIGIN and LENGTH rightaway. * ldlang.h (struct memory_region_struct): Add origin_exp and length_exp fields. * ldlang.c (lang_do_memory_regions): New. (lang_memory_region_lookup): Initialize origin_exp and length_exp fields. (lang_process): Call lang_do_memory_regions. ld/testsuite/ * ld-scripts/memory.t: Define new symbol tred. * ld-scripts/memory_sym.t: New. * ld-scripts/script.exp: Perform MEMORY with symbols test, and conditionally check values of linker symbols.
2015-01-20ld: Update expected test results for 32-bit hosts.Andrew Burgess3-11/+16
Tests that I added in commit c05b575a8dfabab6af5d8586d1a5c0c67f819ac2 fails on 32-bit hosts due to differences in whitespace. This patch updates the expected output patterns to be more accepting of differences in whitespace, the tests should now pass. ld/testsuite/ChangeLog: * ld-scripts/provide-4-map.d: Update expected output. * ld-scripts/provide-5-map.d: Likewise.
2015-01-20ld: Don't evaluate unneeded PROVIDE expressions.Andrew Burgess9-0/+78
When creating a linker mapfile (using -Map=MAPFILE), we previously would always try to evaluate the expression from a PROVIDE statement. However, this is not always safe, consider: PROVIDE (foo = 0x10); PROVIDE (bar = foo); In this example, if neither 'foo' or 'bar' is needed, then while generating the linker mapfile evaluating the expression for 'foo' is harmless (just the value 0x10). However, evaluating the expression for 'bar' requires the symbol 'foo', which is undefined. This used to cause a fatal error. This patch changes the behaviour, so that when the destination of the PROVIDE is not defined (that is the PROVIDE is not going to provide anything) the expression is not evaluated, and instead a special string is displayed to indicate that the linker is discarding the PROVIDE statement. This change not only fixes the spurious undefined symbol error, but also means that a user can now tell if a PROVIDE statement has provided anything by inspecting the linker mapfile, something that could not be done before. ld/ChangeLog: * ldlang.c (print_assignment): Only evaluate the expression for a PROVIDE'd assignment when the destination is being defined. Display a special message for PROVIDE'd symbols that are not being provided. ld/testsuite/ChangeLog: * ld-scripts/provide-4.d: New file. * ld-scripts/provide-4-map.d: New file. * ld-scripts/provide-4.t: New file. * ld-scripts/provide-5.d: New file. * ld-scripts/provide-5.s: New file. * ld-scripts/provide-5-map.d: New file. * ld-scripts/provide-5.t: New file. * ld-scripts/provide.exp: Run the provide-4.d and provide-5.d tests.
2015-01-20ld/testing: run_dump_test can now check linker mapfiles.Andrew Burgess4-9/+42
Add a new option 'map' to the ld run_dump_test mechanism. When the 'map' option is given run_dump_test will ensure that there is a -Map=MAPFILE present in the linker command line, adding one if needed. The MAPFILE is then compared with the file passed to the new 'map' option using the regexp_diff function. This should make it slightly easier to write tests that check the linker mapfile output. The only test I found that already compares mapfile content is updated to use the new mechanism. ld/testsuite/ChangeLog: * ld-scripts/overlay-size.d: Add 'map' option. * ld-scripts/overlay-size.exp: Remove manual check of mapfile. * lib/ld-lib.exp (run_dump_test): Add support for new 'map' option, checking linker mapfile output.
2015-01-20Reorder more powerpc64 sections for -z relroAlan Modra11-114/+43
This moves .got too, which requires .sdata and .sbss to move with it, because these sections share addressing via the toc pointer and with small-model code must be within a 16-bit signed offset. .plt, .iplt and .branch_lt must also be moved since they are addressed via a 32-bit offset from the toc pointer, and we might have a very large .data section. This change means we may have some bss style sections before the data segment, necessitating another PT_LOAD header. Also, since _edata is defined at the end of the data segment it's possible with an empty .data to have _edata at the end of .plt which looks a little unusual since .plt is a bss style section. That should only happen rarely in real world binaries, but does occur in the ld testsuite. ld/ * emulparams/elf64ppc.sh (BSS_PLT): Don't define. (OTHER_READWRITE_SECTIONS): Move .branch_lt to.. (OTHER_RELRO_SECTIONS_2): ..here. (DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT, PLT_BEFORE_GOT): Define. * scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/ PLT_BEFORE_GOT combination. (DATA_GOT, SDATA_GOT): Don't define if either is already defined. ld/testsuite/ * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv1b.d, * ld-powerpc/ambiguousv2.d, * ld-powerpc/ambiguousv2b.d, * ld-powerpc/elfv2exe.d, * ld-powerpc/elfv2so.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r: Update.
2015-01-20Fix pr17615 testcaseAlan Modra2-1/+6
PR ld/17615 * ld-elf/pr17615.d: Match .sbss too.
2015-01-19Add a testcase for PR ld/17615H.J. Lu3-0/+19
PR ld/17615 * ld-elf/pr17615.d: New file. * ld-elf/pr17615.s: Likewise.
2015-01-19Fix garbage collection of common symbolsAlan Modra11-31/+44
Running lang_common before garbage collection means slightly less work in garbage collection code, since common symbols should no longer appear there. It does have the side effect of keeping linker script symbols (at least those defined outside of sections) global too, hence some testsuite churn. bfd/ PR 17165 * elf-bfd.h (ELF_COMMON_DEF): Note that this might be true for linker script assignments too. * elflink.c (elf_gc_sweep_symbol): Don't drop ELF_COMMON_DEF syms. (bfd_elf_gc_mark_dynamic_ref_symbol): Similarly. ld/ PR 17165 * ldlang.c (lang_process): Run lang_common before lang_gc_sections. ld/testsuite/ * ld-gc/pr14265.d, * ld-cris/tls-gc-68.d, * ld-cris/tls-gc-69.d, * ld-cris/tls-gc-70.d, * ld-cris/tls-gc-71.d, * ld-cris/tls-gc-75.d, * ld-cris/tls-gc-76.d, * ld-cris/tls-gc-79.d, * ld-mmix/bpo-10.d, * ld-mmix/bpo-11.d: Update.
2015-01-16S/390: Add support for IBM z13.Andreas Krebbel2-6/+11
- 32 128 bit vector registers (overlapping with the existing 16 64 bit floating point registers) - vector double instructions - vector integer instructions - scalar vector instructions (allowing to have more floating point registers for scalar operations) - vector string instructions gas/ChangeLog: * config/tc-s390.c (struct pd_reg): Remove. (pre_defined_registers): Remove. (REG_NAME_CNT): Remove. (reg_name_search): Calculate the register number instead of doing a lookup. (register_name, tc_s390_regname_to_dw2regnum): Adopt to the new reg_name_search signature. (s390_parse_cpu): Support the new arch string z13. (s390_insert_operand): Support for vector registers with the extra field for the fifth bit of each vector register operand. (md_gather_operand): Adjust to the new handling of optional parameters. * doc/as.texinfo: Document the z13 cpu string. gas/testsuite/ChangeLog: * gas/s390/esa-g5.d: Add a variant without the optional operand. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z9-109.d: Likewise. * gas/s390/esa-z9-109.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise. * gas/s390/zarch-z10.d: For variants with a zero optional argument it is not dumped by objdump anymore. * gas/s390/zarch-zEC12.d: Likewise. * gas/s390/zarch-z13.d: New file. * gas/s390/zarch-z13.s: New file. * gas/s390/s390.exp: Run the test for the z13 files. include/opcode/ChangeLog: * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. ld/testsuite/ChangeLog: * ld-s390/tlsbin.dd: The nopr register operand is optional and not printed if 0 anymore. opcodes/ChangeLog: * s390-dis.c (s390_extract_operand): Support vector register operands. (s390_print_insn_with_opcode): Support new operands types and add new handling of optional operands. * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove and include opcode/s390.h instead. (struct op_struct): New field `flags'. (insertOpcode, insertExpandedMnemonic): New parameter `flags'. (dumpTable): Dump flags. (main): Parse flags from the s390-opc.txt file. Add z13 as cpu string. * s390-opc.c: Add new operands types, instruction formats, and instruction masks. (s390_opformats): Add new formats for .insn. * s390-opc.txt: Add new instructions.
2015-01-15Don't complain about -fPIC for undefined symbolH.J. Lu4-0/+21
When building executable, undefined symbol is a fatal error. We don't complain about -fPIC if the symbol is undefined. bfd/ PR ld/17847 * elf64-x86-64.c (elf_x86_64_relocate_section): Don't complain about -fPIC if the symbol is undefined when building executable. ld/testsuite/ PR ld/17847 * ld-x86-64/pie1.d: New file. * ld-x86-64/pie1.s: Likwise. * ld-x86-64/x86-64.exp: Run pie1.
2015-01-14[ARM] Reject R_ARM_REL32 when trying to defer it to runtimeJiong Wang13-968/+283
bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Reject R_ARM_32/_NOI when trying to defer them to runtime. ld/testsuite/ * ld-arm/elf32-reject.s: New testcase. * ld-arm/elf32-reject.d: Likewise. * ld-arm/elf32-reject-pie.s: Likewise. * ld-arm/elf32-reject-pie.d: Likewise. * ld-arm/arm-elf.exp: Run new testcases. * ld-arm/ifunc-7.s: Delete f2/f4 test items. * ld-arm/ifunc-7.rd: Likewise. * ld-arm/ifunc-7.gd: Likewise. * ld-arm/ifunc-7.dd: Likewise. * ld-arm/ifunc-8.s: Likewise. * ld-arm/ifunc-8.rd: Likewise. * ld-arm/ifunc-8.gd: Likewise. * ld-arm/ifunc-8.dd: Likewise.
2015-01-13[AArch64] Fix function pointer variable with -Bsymbolic-functionsJiong Wang4-0/+23
bfd/ChangeLog 2015-01-13 Thomas Preud'homme <thomas.preudhomme@arm.com> * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use SYMBOLIC_BIND to check if a symbol should be bound symbolically. ld/testsuite/ChangeLog 2015-01-13 Thomas Preud'homme <thomas.preudhomme@arm.com> * ld-aarch64/aarch64-elf.exp: Added relocs-257-symbolic-func test. * ld-aarch64/relocs-257-symbolic-func.d: New file. * ld-aarch64/relocs-257-symbolic-func.s: Likewise.
2015-01-13[AArch64] Enable overflow check for TLSLE_MOVW_TPREL_G2Jiong Wang4-0/+35
bfd/ * elfnn-aarch64.c: (elfNN_aarch64_howto_table): Enable overflow check for TLSLE_MOVW_TPREL_G2. ld/testsuite/ * ld-aarch64/tprel_g2_overflow.s: New testcase. * ld-aarch64/tprel_g2_overflow.d: New expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-01-13[AArch64] Enable overflow check for R_AARCH64_TLSLE_ADD_TPREL_HI12Jiong Wang4-0/+57
bfd/ PR ld/17415 * elfnn-aarch64.c (elfNN_aarch64_howto_table): Mark R_AARCH64_TLSLE_ADD_TPREL_HI12 as complain_overflow_unsigned. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Correct the bit mask. ld/testsuite/ PR ld/17415 * ld-aarch64/pr17415.s: Source file for new test. * ld-aarch64/pr17415.d: Expect file for new test. * ld-aarch64/aarch64-elf.exp: Run the new test.
2015-01-11Only discard space for pc-relative relocs symbolsH.J. Lu5-0/+33
When building PIE, we should only discard space for pc-relative relocs symbols which turn out to need copy relocs. bfd/ PR ld/17827 * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): For PIE, only discard space for pc-relative relocs symbols which turn out to need copy relocs. ld/testsuite/ PR ld/17827 * ld-x86-64/pr17689.out: Updated. * ld-x86-64/pr17689b.S: Likewise. * ld-x86-64/pr17827.rd: New file. * ld-x86-64/x86-64.exp: Run PR ld/17827 test.
2015-01-08ld/x86-64: adjust pr14207 test expectationsJan Beulich2-7/+12
The original test output expectations cause it to fail when configure determines enable_initfini_array=no (which was observed on a cross build on an old 32-bit host, pointing out that taking into account host properties in such a case is bogus anyway). ld/testsuite/ 2015-01-08 Jan Beulich <jbeulich@suse.com> * ld-x86-64/pr14207.d: Adjust expecations to cover the enable_initfini_array=no case.
2015-01-07ld/testing: Extend comment on run_dump_testAndrew Burgess2-3/+9
Mention that readelf can be used as a test program in the comment of run_dump_test. ld/testsuite/ChangeLog: * lib/ld-lib.exp (run_dump_test): Extend comment to mention readelf.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra148-1558/+1575
2014-12-30Assign file position for .strtab only if neededH.J. Lu3-6/+21
bfd/ PR ld/17773 * elflink.c (bfd_elf_final_link): Assign the file position for the symbol string table only there are symbols to be emitted. ld/testsuite/ PR ld/17773 * ld-elf/binutils.exp (binutils_test): Add an optional readelf_options. Replace -l with $readelf_options. Add a gap test. * ld/testsuite/ld-elf/gap.s: New file.
2014-12-26Update two sh64 ld test's expected outputAlan Modra3-2/+7
At some stage someone fixed a bug in ld -r output, preserving SHF_INFO_LINK from input objects. These two tests expected the old wrong output. * ld-sh/sh64/crangerel1.rd: Update. * ld-sh/sh64/crangerel2.rd: Update.
2014-12-25ARM: Add support for value 3 of Tag_ABI_VFP_args attributeTerry Guo10-0/+29
*** bfd/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. (elf32_arm_post_process_headers): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. *** binutils/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible". *** gdb/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of Tag_ABI_VFP_args. Also replace hardcoded values by enum values in the switch handling the different values of Tag_ABI_VFP_args. *** gold/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. (Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. *** include/elf/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum values. *** ld/testsuite/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args. * ld-arm/attr-merge-2b.s: Likewise. * ld-arm/attr-merge-2.attr: Likewise. * ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and Tag_ABI_VFP_args. * ld-arm/attr-merge-4b.s: Likewise. * ld-arm/attr-merge-4.attr: Likewise. * ld-arm/attr-merge-6a.s: Likewise. * ld-arm/attr-merge-6b.s: Likewise. * ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
2014-12-24AVR: Assembler now prepares for linker relaxation by default.Andrew Burgess6-7/+16
Have the assembler prepare for linker relaxation by default. This means that users will be able to make use of linker relaxation without having to adjust the assembler flags, this can make life easier when compiling libraries. Having this on by default in the assembler should make no difference to the assembler code produced, however, some of the debug information will be slightly less compressed. A few tests needed to be updated as a result of this change as they relied on linker relaxation support being off by default. I've tightened up the definition of which sections can be relaxed on AVR as part of this commit, the assembler used to think that all non-debugging sections could be relaxed, when in reality only code sections can be relaxed for AVR. The previous definition was not dangerous, just over cautious. The new tighter definition allows an extra test (gas/testsuite/gas/all/forward.d) to continue to pass. gas/ChangeLog: * config/tc-avr.c (struct avr_opt_s): Change link_relax to no_link_relax, extend comment. (enum options): Add new OPTION_NO_LINK_RELAX. (md_longopts): Add entry for -mno-link-relax. (md_parse_option): Handle OPTION_NO_LINK_RELAX, and update OPTION_LINK_RELAX. (md_begin): Initialise linkrelax from no_link_relax. (md_show_usage): Include -mno-link-relax option. (relaxable_section): Only allocatable code sections can be relaxed. * config/tc-avr.h (TC_LINKRELAX_FIXUP): Define. gas/testsuite/ChangeLog: * gas/all/gas.exp: Test will not pass on AVR due to linker relaxation support. * gas/avr/noreloc_withoutrelax.d: Add -mno-link-relax option. * gas/avr/link-relax-elf-flag-clear.d: Likewise. ld/testsuite/ChangeLog: * ld/testsuite/ld-avr/relax-elf-flags-02.d: Add -mno-link-relax option. * ld/testsuite/ld-avr/relax-elf-flags-03.d: Likewise. * ld/testsuite/ld-avr/relax-elf-flags-04.d: Likewise. * ld/testsuite/ld-avr/relax-elf-flags-05.d: Likewise. * ld/testsuite/ld-avr/relax-elf-flags-06.d: Likewise.
2014-12-24Yet another DEFINED testcaseAlan Modra5-0/+63
* ld-scripts/defined6.s, * ld-scripts/defined6.t, * ld-scripts/defined6.d: New test. * ld-scripts/defined.exp: Run it.
2014-12-23AVR/ld: Propagate link-relax elf header flag correctly.Andrew Burgess11-0/+117
The AVR target has an elf header flag to indicate if an object was assembler ready for linker relaxation. If a partial link is performed then it is important that the link-relax flag in the output object is set correctly, otherwise, during the final link, we might try to perform linker relaxation on code that was not assembled suitably. As the link-relax elf header covers the entire object file we must be conservative when setting the flag in the output object, so, for a partial link, any input object that does not have the link-relax flag set will cause the output object to also not have the link-relax flag set. This conservative approach could be softened in future, we only need to disable the link relax flag if an input file is not marked link-relax ready, and the input file contains a relaxable section. However, I've left this optimisation for a later day. For the final link I've overloaded the use of the link-relax elf header flag, in a final executable, the flag now indicates if the executable was built with linker relaxation on or not. ld/ChangeLog: * emultempl/avrelf.em: Add include of elf/avr.h. (avr_finish): New function. (LDEMUL_FINISH): Added. ld/testsuite/ChangeLog: * ld-avr/relax-elf-flags-01.d: New file. * ld-avr/relax-elf-flags-02.d: New file. * ld-avr/relax-elf-flags-03.d: New file. * ld-avr/relax-elf-flags-04.d: New file. * ld-avr/relax-elf-flags-05.d: New file. * ld-avr/relax-elf-flags-06.d: New file. * ld-avr/relax-elf-flags-07.d: New file. * ld-avr/relax-elf-flags-08.d: New file. * ld-avr/relax-elf-flags-a.s: New file. * ld-avr/relax-elf-flags-b.s: New file.
2014-12-23Use a symbol flag bit to mark linker defined symbolsAlan Modra7-0/+52
Trying to use the SEC_LINKER_CREATED section flag to determine whether a symbol is linker defined fails to work on targets like alpha that define special SEC_COMMON sections. These might contain symbols that originated in an object file. include/ * bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add linker_def. bfd/ * elflink.c (_bfd_elf_define_linkage_sym): Set linker_def. * linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def for CDEF, DEF, DEFW, COM. ld/ * ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def. ld/testsuite/ * ld-powerpc/sdabase.s, * ld-powerpc/sdabase.t, * ld-powerpc/sdabase.d: New test. * ld-powerpc/sdabase2.t, * ld-powerpc/sdabase2.d: New test. * ld-powerpc/powerpc.exp: Run them.
2014-12-23Don't PROVIDE over top of common symbolsAlan Modra3-0/+19
This: int end[100000]; int main(void) { end[99999] = 0; return 0; } should not segfault. ld/ * ldexp.c (exp_fold_tree_1 <etree_provide>): Leave bfd_link_hash_common symbols alone. ld/testsuite/ * ld-elf/endsym.s, *ld-elf/endsym.d: New test.
2014-12-19Fix all failing FPXX tests for tx39-elf.Matthew Fortune16-15/+33
ld/testsuite/ * ld-mips-elf/attr-gnu-4-00.d: Relax check for ISA extension. * ld-mips-elf/attr-gnu-4-01.d: Likewise. * ld-mips-elf/attr-gnu-4-02.d: Likewise. * ld-mips-elf/attr-gnu-4-03.d: Likewise. * ld-mips-elf/attr-gnu-4-08.d: Likewise. * ld-mips-elf/attr-gnu-4-10.d: Likewise. * ld-mips-elf/attr-gnu-4-11.d: Likewise. * ld-mips-elf/attr-gnu-4-18.d: Likewise. * ld-mips-elf/attr-gnu-4-20.d: Likewise. * ld-mips-elf/attr-gnu-4-22.d: Likewise. * ld-mips-elf/attr-gnu-4-28.d: Likewise. * ld-mips-elf/attr-gnu-4-30.d: Likewise. * ld-mips-elf/attr-gnu-4-33.d: Likewise. * ld-mips-elf/attr-gnu-4-38.d: Likewise. * ld-mips-elf/attr-gnu-4-44.d: Likewise.
2014-12-19Fix undefined weak symbol reloc testsMatthew Fortune6-78/+55
ld/testsuite/ * ld-mips-elf/mips-elf.exp: Update undefweak-overflow tests. * ld-mips-elf/undefweak-overflow-n32.d: Remove. * ld-mips-elf/undefweak-overflow-n64.d: Likewise. * ld-mips-elf/undefweak-overflow.s: Set mips64r6, noreorder and add a label to mark the micromips region. * ld-mips-elf/undefweak-overflow.d: Update expected output.
2014-12-13Handle weak alias for PIE with copy relocH.J. Lu6-0/+60
When there is a weak symbol with a real definition, the processor independent code will have arranged for us to see the real definition first. We need to copy the needs_copy bit from the real definition and check it when allowing copy reloc in PIE. bfd/ PR ld/17689 * elf64-x86-64.c (elf_x86_64_link_hash_entry): Add needs_copy. Change has_bnd_reloc to bit field. (elf_x86_64_link_hash_newfunc): Initialize needs_copy and has_bnd_reloc to 0. (elf_x86_64_check_relocs): Set has_bnd_reloc to 1 instead of TRUE. (elf_x86_64_adjust_dynamic_symbol): Copy needs_copy from the real definition to a weak symbol. (elf_x86_64_allocate_dynrelocs): Also check needs_copy of a weak symbol for PIE when discarding space for relocs against symbols which turn out to need copy relocs. (elf_x86_64_relocate_section): Also check needs_copy of a weak symbol for PIE with copy reloc. ld/testsuite/ PR ld/17689 * ld-x86-64/pr17689.out: New file. * ld-x86-64/pr17689.rd: Likewise. * ld-x86-64/pr17689a.c: Likewise. * ld-x86-64/pr17689b.S: Likewise. * ld-x86-64/x86-64.exp: Run PR ld/17689 tests.
2014-12-06Add Visium support to ldEric Botcazou25-5/+179
ld/ * configure.tgt: Add Visium support. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32visium.c. (eelf32visium.c): New rule. * Makefile.in: Regenerate. * emulparams/elf32visium.sh: New file. * scripttempl/visium.sc: Likewise. ld/testsuite/ * lib/ld-lib.exp (check_shared_lib_support): Return 0 for Visium. * ld-visium/: New directory.
2014-12-04Sort relocs output by ld -rAlan Modra5-8/+15
bfd/ PR 17666 * elflink.c: Include bfd_stdint.h. (cmp_ext32l_r_offset, cmp_ext32b_r_offset, cmp_ext64l_r_offset, cmp_ext64b_r_offset): New functions. (elf_link_adjust_relocs): Sort relocs. Free reloc hashes after sorting invalidates. ld/testsuite/ * ld-powerpc/vxworks-relax.rd: Update for reloc sorting. * ld-powerpc/vxworks-relax-2.rd: Likewise. * ld-sh/sh64/reldl32.rd: Likewise. * ld-sh/sh64/reldl64.rd: Likewise.
2014-12-03Replace copyreloc-main.c with copyreloc-main.SH.J. Lu4-10/+25
* ld-x86-64/copyreloc-main.c: Removed. * ld-x86-64/copyreloc-main.S: New. * ld-x86-64/x86-64.exp: Replace copyreloc-main.c with copyreloc-main.S.
2014-12-02X86-64: Allow copy relocs for building PIEH.J. Lu7-0/+57
This patch allows copy relocs for non-GOT pc-relative relocation in PIE. bfd/ * elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Always allow copy relocs for building executables. (elf_x86_64_check_relocs): Allow copy relocs for non-GOT pc-relative relocation in shared object. (elf_x86_64_adjust_dynamic_symbol): Allocate copy relocs for PIE. (elf_x86_64_relocate_section): Don't copy a pc-relative relocation into the output file if the symbol needs copy reloc. ld/testsuite/ * ld-x86-64/copyreloc-lib.c: New file. * ld-x86-64/copyreloc-main.c: Likewise. * ld-x86-64/copyreloc-main.out: Likewise. * ld-x86-64/copyreloc-main1.rd: Likewise. * ld-x86-64/copyreloc-main2.rd: Likewise. * ld-x86-64/x86-64.exp: Run copyreloc tests.
2014-12-02[MIPS] When calculating a relocation using an undefined weak symbol don't ↵Andrew Bennett6-0/+110
check for overflow. In MIPS the relocation calculation only ignores the overflow checks for undefined weak symbols on relocations associated with j/jal. This patch extends this to the relocations used by the: b* instructions; pc/gp relative symbol offsets; and the lwpc/ldpc MIPS r6 instructions. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): Only check for overflow on non-weak undefined symbols. ld/testsuite/ * ld-mips-elf/mips-elf.exp: Add in undefined weak overflow tests for o32, n32 and n64. * ld-mips-elf/undefweak-overflow.s: New test. * ld-mips-elf/undefweak-overflow.d: New test. * ld-mips-elf/undefweak-overflow-n32.d: New test. * ld-mips-elf/undefweak-overflow-n64.d: New test.
2014-12-01Add tests for PR ld/16452 and PR ld/16457H.J. Lu7-0/+42
PR ld/16452 PR ld/16457 * ld-elf/pr16452.map: New file. * ld-elf/pr16452.od: Likewise. * ld-elf/pr16452a.c: Likewise. * ld-elf/pr16452b.c: Likewise. * ld-elf/pr16457.od: Likewise. * ld-elf/shared.exp (build_tests): Add tests for PR ld/16452 and PR ld/16457.
2014-11-27Update mips tests with symbol version stringH.J. Lu7-23/+33
* ld-mips-elf/got-vers-1.rd: Add symbol version string to versioned symbol names in dynamic relocation. * ld-mips-elf/reloc-estimate-1.d: Likewise. * ld-mips-elf/tlsdyn-o32-1.got: Likewise. * ld-mips-elf/tlsdyn-o32-2.got: Likewise. * ld-mips-elf/tlsdyn-o32-3.got: Likewise. * ld-mips-elf/tlslib-o32-ver.got: Likewise.
2014-11-25Update ld-alpha tests for securepltH.J. Lu9-154/+167
* ld-alpha/tlsbin.dd: Updated for secureplt. * ld-alpha/tlsbin.rd: Likewise. * ld-alpha/tlsbin.sd: Likewise. * ld-alpha/tlsbinr.dd: Likewise. * ld-alpha/tlsbinr.rd: Likewise. * ld-alpha/tlspic.dd: Likewise. * ld-alpha/tlspic.rd: Likewise. * ld-alpha/tlspic.sd: Likewise.
2014-11-25Display symbol version when dumping dynrelocsH.J. Lu9-4/+45
Both readelf/objdump know how to get symbol version string for dynamic symbols. This patch extracts this functionality into a separate function and uses it to add symbol version string to versioned symbol names when dumping dynamic relocations. bfd/ PR binutils/16496 * elf-bfd.h (bfd_elf_get_symbol_version_string): New. * elf.c (bfd_elf_get_symbol_version_string): New. Extracted from bfd_elf_print_symbol. (bfd_elf_print_symbol): Use it. binutils/ PR binutils/16496 * objdump.c (objdump_print_symname): Call bfd_elf_get_symbol_version_string to get ELF symbol version string. Append version string if needed. * readelf.c (versioned_symbol_info): New enum. (get_symbol_version_string): New. Extracted from process_symbol_table. (dump_relocations): Add a new argument to indicate if dynamic symbol table is used. Use get_symbol_version_string to get symbol version string for dynamic symbol. Append version string if needed. (process_relocs): Updated dump_relocations call. (process_symbol_table): Use get_symbol_version_string. ld/testsuite/ PR binutils/16496 * ld-cris/weakref3.d: Add symbol version string to versioned symbol names in dynamic relocation. * ld-cris/weakref4.d: Likewise. * ld-elfvers/vers24.rd: Likewise. * ld-elf/pr16496a.c: New file. * ld-elf/pr16496a.map: Likewise. * ld-elf/pr16496b.c: Likewise. * ld-elf/pr16496b.od: Likewise. * ld-elf/shared.exp (build_tests): Add libpr16496a.so and libpr16496b.so tests.
2014-11-25Optimize out i386/x86-64 JUMP_SLOT relocationH.J. Lu6-0/+107
When there are both PLT and GOT references to the same function symbol, linker will create a GOTPLT slot for PLT entry and a GOT slot for GOT reference. A run-time JUMP_SLOT relocation is created to update the GOTPLT slot and a run-time GLOB_DAT relocation is created to update the GOT slot. Both JUMP_SLOT and GLOB_DAT relocations will apply the same symbol value to GOTPLT and GOT slots, respectively, at run-time. This optimization combines GOTPLT and GOT slots into a single GOT slot and removes the run-time JUMP_SLOT relocation. It replaces the regular PLT entry: indirect jump [GOTPLT slot] push relocation index jump PLT0 with an GOT PLT entry with an indirect jump via the GOT slot: indirect jump [GOT slot] nop and resolves PLT reference to the GOT PLT entry. We must avoid this optimization if pointer equality is needed since we don't clear symbol value in this case and the dynamic linker won't update the GOT slot. Otherwise, the resulting binary will get into an infinite loop at run-time. bfd/ * elf32-i386.c (elf_i386_got_plt_entry): New. (elf_i386_pic_got_plt_entry): Likewise. (elf_i386_link_hash_entry): Add plt_got. (elf_i386_link_hash_table): Likewise. (elf_i386_link_hash_newfunc): Initialize plt_got.offset to -1. (elf_i386_get_local_sym_hash): Likewise. (elf_i386_check_relocs): Create the GOT PLT if there are both PLT and GOT references when the regular PLT is used. (elf_i386_allocate_dynrelocs): Use the GOT PLT if there are both PLT and GOT references unless pointer equality is needed. (elf_i386_relocate_section): Also check the GOT PLT when resolving R_386_PLT32. (elf_i386_finish_dynamic_symbol): Use the GOT PLT if it is available. * elf64-x86-64.c (elf_x86_64_link_hash_entry): Add plt_got. (elf_x86_64_link_hash_table): Likewise. (elf_x86_64_link_hash_newfunc): Initialize plt_got.offset to -1. (elf_x86_64_get_local_sym_hash): Likewise. (elf_x86_64_check_relocs): Create the GOT PLT if there are both PLT and GOT references when the regular PLT is used. (elf_x86_64_allocate_dynrelocs): Use the GOT PLT if there are both PLT and GOT references unless pointer equality is needed. (elf_x86_64_relocate_section): Also check the GOT PLT when resolving R_X86_64_PLT32. (elf_x86_64_finish_dynamic_symbol): Use the GOT PLT if it is available. ld/ * emulparams/elf_i386.sh (TINY_READONLY_SECTION): New. * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Add .plt.got. ld/testsuite/ * ld-i386/i386.exp: Add run-time relocation tests for plt-main. * ld-i386/plt-main.rd: New file. * ld-x86-64/plt-main-bnd.dd: Likewise. * ld-x86-64/plt-main.rd: Likewise. * ld-x86-64/x86-64.exp: Add run-time relocation tests for plt-main.
2014-11-21Add function and function pointer tests for i386H.J. Lu13-0/+169
This patch adds tests for function and function pointer for i386. * ld-i386/plt-lib.c: New file. * ld-i386/plt-main.out: Likewise. * ld-i386/plt-main1.c: Likewise. * ld-i386/plt-main1.rd: Likewise. * ld-i386/plt-main2.c: Likewise. * ld-i386/plt-main2.rd: Likewise. * ld-i386/plt-main3.c: Likewise. * ld-i386/plt-main3.rd: Likewise. * ld-i386/plt-main4.c: Likewise. * ld-i386/plt-main4.rd: Likewise. * ld-i386/plt-main5.c: Likewise. * ld-i386/i386.exp: Run plt-main tests.
2014-11-21Run plt-main test with -pieH.J. Lu2-0/+14
* ld-x86-64/x86-64.exp: Run plt-main test with -pie.
2014-11-21Calculate ARM arch attribute after relaxationTerry Guo5-4/+13
gas/ 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (md_assemble): Do not consider relaxation. (md_convert_frag): Test and set target arch attribute accordingly. (aeabi_set_attribute_string): Turn it into a global function. * config/tc-arm.h (md_post_relax_hook): Enable it for ARM target. (aeabi_set_public_attributes): Declare it. gas/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/attr-arch-assumption.d: New file. * gas/arm/attr-arch-assumption.s: Likewise. ld/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/tls-longplt-lib.s: Require ARMv6T2. * ld-arm/tls-longplt.s: Likewise. * ld-arm/tls-longplt-lib.d: Updated. * ld-arm/tls-longplt.d: Likewise.
2014-11-21Support ARM Cortex-M7Terry Guo19-0/+235
include/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. bfd/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5. binutils/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5. gas/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. (aeabi_set_public_attributes): Set proper FP arch for FPv5. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. ld/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-vfp-4-sp.s: New test source file. * ld-arm/attr-merge-vfp-5-sp.s: Likewise. * ld-arm/attr-merge-vfp-5.s: Likewise. * ld-arm/attr-merge-vfp-8.d: New test. * ld-arm/attr-merge-vfp-8r.d: Likewise. * ld-arm/attr-merge-vfp-9.d: Likewise. * ld-arm/attr-merge-vfp-9r.d: Likewise. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-11.d: Likewise. * ld-arm/attr-merge-vfp-11r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/arm-elf.exp: Run the new tests.
2014-11-20Don't run pr17618 test on x32H.J. Lu2-0/+5
* ld-x86-64/pr17618.d: Don't run on x32.
2014-11-20Update plt-main tests for x32H.J. Lu5-6/+13
* ld-x86-64/plt-main1.rd: Updated for x32. * ld-x86-64/plt-main2.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise.
2014-11-20Add function and function pointer testsH.J. Lu13-0/+154
This patch adds tests for function and function pointer. * ld-x86-64/plt-lib.c: New file. * ld-x86-64/plt-main.out: Likewise. * ld-x86-64/plt-main1.c: Likewise. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main2.c: Likewise. * ld-x86-64/plt-main2.rd: Likewise. * ld-x86-64/plt-main3.c: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.c: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/plt-main5.c: Likewise. * ld-x86-64/x86-64.exp: Run plt-main tests.
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