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2016-06-07PowerPC VLEAlan Modra3-3/+10
VLE is an encoding, not a particular processor architecture, so it isn't really proper to select insns based on PPC_OPCODE_VLE. For example {"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, {"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, shows two insns that have the same encoding, both available with VLE. Enabling both with VLE means we can't disassemble the second variant even if -Maltivec is given rather than -Mspe. Also, we don't check user assembly against the processor type as well as we could. Another problem is that when using the VLE encoding, insns from the main ppc opcode table are not available, except those using opcode 4 and 31. Correcting this revealed two errors in the ld testsuite, use of "nop" and "rfmci" when -mvle. This patch fixes those problems in the opcode table, and removes PPCNONE. I find a plain 0 distracts less from other values. In addition, I've implemented code to recognize some machine values from the apuinfo note present in ppc32 objects. It's not a complete disambiguation since we're lacking info to detect newer chips, but what we have should help with disassembly. include/ * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE: Define. opcodes/ * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default cpu for "vle" to e500. * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise. (PPCNONE): Delete, substitute throughout. (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated" except for major opcode 4 and 31. (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags. bfd/ * cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry to match other 32-bit archs. * elf32-ppc.c (_bfd_elf_ppc_set_arch): New function. (ppc_elf_object_p): Call it. (ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix overlong line. (APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here. * elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch. * bfd-in.h (_bfd_elf_ppc_at_tls_transform, _bfd_elf_ppc_at_tprel_transform): Move to.. * elf-bfd.h: ..here. (_bfd_elf_ppc_set_arch): Declare. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define. (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden by vle_opcodes, and that vle flag doesn't enable opcodes. Don't add vle_opcodes twice. (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL. ld/ * testsuite/ld-powerpc/apuinfo1.s: Delete nop. * testsuite/ld-powerpc/apuinfo-vle2.s: New. * testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-05-11ld --gc-sections fail with __tls_get_addr_optAlan Modra8-0/+169
When --gc-sections is active, __tls_get_addr_opt is marked as not needed and forced local before ppc*_elf_tls_setup is run. bfd/ PR 20060 * elf64-ppc.c (ppc64_elf_tls_setup): Clear forced_local. * elf32-ppc.c (ppc_elf_tls_setup): Likewise. ld/ PR 20060 * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/tlsdll.s: New. * testsuite/ld-powerpc/tlsdll.ver: New. * testsuite/ld-powerpc/tlsdll_32.s: New. * testsuite/ld-powerpc/tlsopt5.d: New. * testsuite/ld-powerpc/tlsopt5.s: New. * testsuite/ld-powerpc/tlsopt5_32.d: New. * testsuite/ld-powerpc/tlsopt5_32.s: New.
2016-01-01Copyright update for binutilsAlan Modra3-3/+3
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner3-0/+33
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-08-27Add reloc sort testAlan Modra3-0/+57
* ld-powerpc/relocsort.s, * ld-powerpc/relocsort.d: New test. * ld-powerpc/powerpc.exp: Run it.
2015-07-28Fallout from "Reorder more powerpc64 sections for -z relro"Alan Modra1-9/+9
Commit 23283c1b changed the layout of some bss style sections on powerpc64, but neglected to add a page gap before the third PT_LOAD segment created by this reording. Without a page gap we get two PT_LOAD headers that overlap by one page in memory. That shouldn't be allowed because the dynamic loader will load garbage from the first page of the last segment over the last page of the previous segment. bfd/ * elf.c (_bfd_elf_map_sections_to_segments): Do not make a new segment for loaded sections after nonloaded sections if the sections are on the same page. ld/testsuite/ * ld-powerpc/elfv2so.d: Update
2015-07-05Fix an opd->append index in elf64-ppc.cRichard Sandiford6-0/+131
bfd/ * elf64-ppc.c (toc_adjusting_stub_needed): Use the symbol value plus addend rather than the original st_value when looking up entries in opd->adjust. ld/testsuite/ * ld-powerpc/tocopt6-inc.s, ld-powerpc/tocopt6a.s, ld-powerpc/tocopt6b.s, ld-powerpc/tocopt6c.s, ld-powerpc/tocopt6.d: New test. * ld-powerpc/powerpc.exp (ppc64elftests): Add it.
2015-06-16ppc476 linker workaround shared lib fixes againAlan Modra3-21/+49
Huh, I can't even write a binary search properly. bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Correct binary search of dynamic relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s: Repeat dynamic reloc generating insns. * ld-powerpc/ppc476-shared.d: Update. * ld-powerpc/ppc476-shared2.d: Update.
2015-06-05ppc476 linker workaround shared lib fixesAlan Modra5-0/+64
When building a shared lib from non-PIC objects, we'll get dynamic text relocations. These need to move with any insns we move. Otherwise the dynamic reloc will modify the branch, resulting in crashes and other unpleasant behaviour. Also, ld -r --ppc476-workaround used with sufficiently aligned PIC objects needs a fix for emitted REL16 relocs. bfd/ * elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text relocs with insns moved by --ppc476-workaround. Correct output of REL16 relocs. ld/testsuite/ * ld-powerpc/ppc476-shared.s, * ld-powerpc/ppc476-shared.lnk, * ld-powerpc/ppc476-shared.d, * ld-powerpc/ppc476-shared2.d: New tests. * ld-powerpc/powerpc.exp: Run them.
2015-04-25Non-alloc sections don't belong in PT_LOAD segmentsAlan Modra1-1/+1
Taking them out showed a bug in the powerpc64 backend with .branch_lt being removed from output_bfd but not from previously set up segment section maps. Removing the bfd sections meant their sh_flags (and practically everything else) remaining zero, ie. not SHF_ALLOC, triggering complaints about "`.branch_lt' can't be allocated in segment". include/elf/ * internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and similar segments only contain alloc sections. ld/ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out. ld/testsuite/ * ld-powerpc/tocnovar.d: Revert last change.
2015-04-23Accept odd result in ld-powerpc/tocnovar testcaseAlan Modra1-1/+1
I didn't commit this with the relro and powerpc .TOC. changes, thinking that something should be done about the odd result of .shstrtab appearing in PT_GNU_RELRO. On looking at it further, I think that changing readelf would be wrong, so let's just accept the results. Real binaries will always have other sections past .got, so PT_GNU_RELRO won't finish past the end of loaded sections. * ld-powerpc/tocnovar.d: Adjust.
2015-04-23Align .TOC. for PowerPC64Alan Modra25-131/+131
This change, with prerequisite 0e5fabeb, provides a toc base aligned to 256 bytes rather than 8 bytes. This is necessary for a minor gcc optimisation, allowing use of d-form instructions to correctly access toc-relative items larger than 8 bytes. bfd/ * elf64-ppc.c (TOC_BASE_ALIGN): Define. (ppc64_elf_next_toc_section): Align multi-got toc base. (ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol. ld/ * emulparams/elf64ppc.sh (GOT): Align. ld/testsuite/ * ld-powerpc/ambiguousv1b.d: Update for aligned .got. * ld-powerpc/defsym.d: Likewise. * ld-powerpc/elfv2-2exe.d: Likewise. * ld-powerpc/elfv2exe.d: Likewise. * ld-powerpc/elfv2so.d: Likewise. * ld-powerpc/relbrlt.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.r: Likewise. * ld-powerpc/tocopt.d: Likewise. * ld-powerpc/tocopt2.d: Likewise. * ld-powerpc/tocopt3.d: Likewise. * ld-powerpc/tocopt4.d: Likewise. * ld-powerpc/tocopt5.d: Likewise.
2015-03-11Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generatedAlan Modra12-59/+121
Also update the 32-bit tls testcases to be secure plt. bfd/ * elf32-ppc.c (ppc_elf_get_synthetic_symtab): Examine stubs in reverse order. Account for larger size of __tls_get_addr_opt stub. ld/testsuite/ * ld-powerpc/tls32.s: Add GOT pointer setup. * ld-powerpc/tls32.d: Update. * ld-powerpc/tls32.g: Update. * ld-powerpc/tls32.t: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe32.d: Update. * ld-powerpc/tlsexe32.g: Update. * ld-powerpc/tlsexe32.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsso32.d: Update. * ld-powerpc/tlsso32.g: Update. * ld-powerpc/tlsso32.r: Update.
2015-02-19Strip undefined symbols from .symtabAlan Modra4-8/+4
bfd/ PR ld/4317 * elflink.c (elf_link_input_bfd): Drop undefined local syms. (elf_link_output_extsym): Drop local and global undefined syms. Tidy. Expand comment. ld/testsuite/ PR ld/4317 * ld-aarch64/gc-tls-relocs.d, * ld-cris/locref2.d, * ld-elf/ehdr_start-weak.d, * ld-elf/group1.d, * ld-i386/compressed1.d, * ld-ia64/error1.d, * ld-ia64/error2.d, * ld-ia64/error3.d, * ld-mips-elf/pic-and-nonpic-1.nd, * ld-mmix/undef-3.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r, * ld-x86-64/compressed1.d, * ld-x86-64/pie1.d: Update.
2015-02-18Properly place the NULL STT_FILE symbol revistitedAlan Modra4-8/+8
I was having a little closer look at what is going on here and noticed that HJ unconditionally emits a NULL STT_FILE symbol before emitting forced local symbols. That means we really don't need a second pass over forced local symbols. The only reason for two passes is when some forced local symbol can be emitted before the NULL STT_FILE. So I set about removing the second pass, updating the testsuite all over again. It's also unnecessary to emit the NULL STT_FILE when no previous file symbol has been emitted. bfd/ PR ld/17975 * elflink.c (struct elf_outext_info): Remove need_second_pass and second_pass. (elf_link_output_extsym): Delete code handling second forced local pass. Move code emitting NULL STT_FILE symbol later, so that it can be omitted if forced local is stripped. Don't emit the NULL STT_FILE if no file symbols have been output. (bfd_elf_final_link): Remove second forced local pass. * elf32-ppc.c (add_stub_sym): Set linker_def on linker syms. (ppc_elf_size_dynamic_sections): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (build_global_entry_stubs): Likewise. (ppc64_elf_build_stubs): Likewise. ld/testsuite/ PR ld/17975 * ld-aarch64/gc-tls-relocs.d, * ld-alpha/tlspic.rd, * ld-cris/libdso-2.d, * ld-i386/tlsdesc-nacl.rd, * ld-i386/tlsdesc.rd, * ld-i386/tlsnopic-nacl.rd, * ld-i386/tlsnopic.rd, * ld-i386/tlspic-nacl.rd, * ld-i386/tlspic.rd, * ld-ia64/tlspic.rd, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r, * ld-s390/tlspic.rd, * ld-s390/tlspic_64.rd, * ld-sparc/tlssunnopic32.rd, * ld-sparc/tlssunnopic64.rd, * ld-sparc/tlssunpic32.rd, * ld-sparc/tlssunpic64.rd, * ld-tic6x/shlib-1.rd, * ld-tic6x/shlib-1b.rd, * ld-tic6x/shlib-1r.rd, * ld-tic6x/shlib-1rb.rd, * ld-tic6x/shlib-noindex.rd, * ld-x86-64/tlsdesc-nacl.rd, * ld-x86-64/tlsdesc.rd, * ld-x86-64/tlspic-nacl.rd, * ld-x86-64/tlspic.rd: Update.
2015-02-16Update more ld testcases after PR ld/17975 fixH.J. Lu4-8/+8
* ld-alpha/tlspic.rd: Updated. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstocso.r: Likewise. * ld-s390/tlspic.rd: Likewise. * ld-s390/tlspic_64.rd: Likewise. * ld-sparc/gotop32.dd: Likewise. * ld-sparc/gotop64.dd: Likewise. * ld-sparc/tlssunnopic32.rd: Likewise. * ld-sparc/tlssunnopic64.rd: Likewise. * ld-sparc/tlssunpic32.rd: Likewise. * ld-sparc/tlssunpic64.rd: Likewise. * ld-tic6x/shlib-1.rd: Likewise. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise.
2015-01-29Correct PowerPC64 local-dynamic TLS linker optimizationAlan Modra5-2/+183
The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-28PowerPC64 changes for xlcAlan Modra5-0/+63
The changes to reorder sections for better relro protection on powerpc64, 3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc. xlc -qdatalocal puts global variables into .toc, which means that .toc must be writable. The simplest way to accomplish this is to edit the linker script to remove .toc sections from .got on detecting xlc object files. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc". * elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols in .toc indicate xlc compiled code that might require a rw .toc. ld/ * emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define. * emultempl/ppc64elf.em (params): Init new field. (ppc_after_open): New function. (LDEMUL_AFTER_OPEN): Define. * ldlang.c (lang_final): Whitespace fix. ld/testsuite/ * ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test. * ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test. * ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
2015-01-20Reorder more powerpc64 sections for -z relroAlan Modra10-114/+30
This moves .got too, which requires .sdata and .sbss to move with it, because these sections share addressing via the toc pointer and with small-model code must be within a 16-bit signed offset. .plt, .iplt and .branch_lt must also be moved since they are addressed via a 32-bit offset from the toc pointer, and we might have a very large .data section. This change means we may have some bss style sections before the data segment, necessitating another PT_LOAD header. Also, since _edata is defined at the end of the data segment it's possible with an empty .data to have _edata at the end of .plt which looks a little unusual since .plt is a bss style section. That should only happen rarely in real world binaries, but does occur in the ld testsuite. ld/ * emulparams/elf64ppc.sh (BSS_PLT): Don't define. (OTHER_READWRITE_SECTIONS): Move .branch_lt to.. (OTHER_RELRO_SECTIONS_2): ..here. (DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT, PLT_BEFORE_GOT): Define. * scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/ PLT_BEFORE_GOT combination. (DATA_GOT, SDATA_GOT): Don't define if either is already defined. ld/testsuite/ * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv1b.d, * ld-powerpc/ambiguousv2.d, * ld-powerpc/ambiguousv2b.d, * ld-powerpc/elfv2exe.d, * ld-powerpc/elfv2so.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r: Update.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra3-3/+3
2014-12-23Use a symbol flag bit to mark linker defined symbolsAlan Modra6-0/+43
Trying to use the SEC_LINKER_CREATED section flag to determine whether a symbol is linker defined fails to work on targets like alpha that define special SEC_COMMON sections. These might contain symbols that originated in an object file. include/ * bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add linker_def. bfd/ * elflink.c (_bfd_elf_define_linkage_sym): Set linker_def. * linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def for CDEF, DEF, DEFW, COM. ld/ * ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def. ld/testsuite/ * ld-powerpc/sdabase.s, * ld-powerpc/sdabase.t, * ld-powerpc/sdabase.d: New test. * ld-powerpc/sdabase2.t, * ld-powerpc/sdabase2.d: New test. * ld-powerpc/powerpc.exp: Run them.
2014-12-04Sort relocs output by ld -rAlan Modra2-4/+4
bfd/ PR 17666 * elflink.c: Include bfd_stdint.h. (cmp_ext32l_r_offset, cmp_ext32b_r_offset, cmp_ext64l_r_offset, cmp_ext64b_r_offset): New functions. (elf_link_adjust_relocs): Sort relocs. Free reloc hashes after sorting invalidates. ld/testsuite/ * ld-powerpc/vxworks-relax.rd: Update for reloc sorting. * ld-powerpc/vxworks-relax-2.rd: Likewise. * ld-sh/sh64/reldl32.rd: Likewise. * ld-sh/sh64/reldl64.rd: Likewise.
2014-08-22Power/GAS: Don't set VLE annotation for non-VLE processors/instructionsMaciej W. Rozycki4-5/+16
Only set the VLE flag if the instruction has been pulled via the VLE instruction set. This way the flag is guaranteed to be set for VLE-only instructions or for VLE-only processors, however it'll remain clear for dual-mode instructions on dual-mode and, more importantly, standard-mode processors. gas/ * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE flag if both the processor and opcode flags match. ld/testsuite/ * ld-powerpc/apuinfo-vle.rd: New test. * ld-powerpc/apuinfo-vle.s: New test source. * ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE handling change. * ld-powerpc/powerpc.exp: Run the new test.
2014-07-08Copy st_other for linker script symbol assignmentsAlan Modra3-0/+46
This fixes a problem seen on powerpc64le ELFv2 when creating a function symbol alias with ld --defsym. st_other needs to be copied from the source symbol to the alias in order to set up the local entry offset for the alias. I decided to make this change in the generic ELF code rather than in elf64-ppc.c since it looks like other targets that use st_other bits might benefit too. bfd/ * elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other bits from source to dest. * linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment. * targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>): Likewise. * bfd-in2.h: Regenerate. ld/testsuite/ * ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test. * ld-powerpc/powerpc.exp: Run it.
2014-07-02Taking an undefined function's address in an executableAlan Modra6-9/+178
doesn't always mean you need to define a function symbol on plt code. If all references are in read-write sections, then using dynamic relocs is OK. bfd/ * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear pointer_equality_needed when !readonly_dynrelocs. * elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise. ld/testsuite/ * ld-powerpc/ambiguousv1.d: Match symbol table too. * ld-powerpc/ambiguousv2.d: Likewise. * ld-powerpc/ambiguousv1b.d: New. * ld-powerpc/ambiguousv2b.d: New. * ld-powerpc/powerpc.exp: Run new tests.
2014-06-03Support fusion for ELFv2 stubsAlan Modra1-4/+4
Power8 fuses addis,addi and addis,ld sequences when the target of the addis is the same as the addi/ld. Thus addis r12,r2,xxx@ha addi r12,r12,xxx@l / ld r12,xxx@l(r12) is faster than addis r11,r2,xxx@ha addi r12,r11,xxx@l / ld r12,xxx@l(r11) So use the form that allows fusion in plt call and branch stubs. bfd/ * elf64-ppc.c (ADDIS_R12_R2): Define. (build_plt_stub): Support fusion on ELFv2 stub. (ppc_build_one_stub): Likewise for plt branch stubs. gold/ * powerpc.cc (addis_12_2): Define. (Stub_table::do_write): Support fusion on ELFv2 stubs. ld/testsuite/ * ld-powerpc/elfv2exe.d: Update for changed plt call stubs. gdb/ * ppc64-tdep.c (ppc64_standard_linkage8): New. (ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
2014-03-27Referencing a function's address on PowerPC64 ELFv2Alan Modra8-0/+61
ELFv2 needs to create plt entries in a non-PIC executable for an address reference to a function defined in a shared object. It's possible that an object file has no features that distinguish it as ELFv1 or ELFv2, eg. an object only containing data. Such files need to be handled like those that are known to be ELFv2. However, this unnecessarily creates plt entries for the analogous ELFv1 case, so arrange to set output abi version earlier, and use the output abi version to further distinguish ambiguous input files. bfd/ * elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly needed plt entries when taking the address of functions for abiversion == 0 (ie. unknown) as well as abiversion == 2. Move opd setup and abiversion checks to.. (ppc64_elf_before_check_relocs): ..here. Renamed from ppc64_elf_process_dot_syms. Set output abiversion from input and input abiversion from output, if either is not set. (ppc64_elf_merge_private_bfd_data): Don't merge flags here. (elf_backend_check_directives): Update. ld/testsuite/ * ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s, * ld-powerpc/funv1.s, * ld-powerpc/funv2.s, * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files. * ld-powerpc/powerpc.exp: Run new tests.
2014-03-15Correct ld-powerpc/vle-reloc-2 testAlan Modra1-4/+4
* ld-powerpc/vle-reloc-3.d: Remove addresses.
2014-03-14Fix overflow handling of VLE_SDA21Alan Modra2-2/+3
bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Correct overflow handling for VLE_SDA21 relocs. ld/testsuite/ * ld-powerpc/vle.ld: Place .PPC.EMB.sdata0 within 32k of 0. * ld-powerpc/vle-reloc-3.d: Update.
2014-03-05Update copyright yearsAlan Modra3-4/+3
2014-03-05Support R_PPC64_ADDR64_LOCALAlan Modra5-0/+92
This adds support for "func@localentry", an expression that returns the ELFv2 local entry point address of function "func". I've excluded dynamic relocation support because that obviously would require glibc changes. include/elf/ * ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. bfd/ * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry. (ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * Add BFD_RELOC_PPC64_ADDR64_LOCAL. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @localentry. (md_apply_fix): Support R_PPC64_ADDR64_LOCAL. ld/testsuite/ * ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files. * ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files. * ld-powerpc/powerpc.exp: Run new test. elfcpp/ * powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. gold/ * powerpc.cc (Target_powerpc::Scan::local, global): Support R_PPC64_ADDR64_LOCAL. (Target_powerpc::Relocate::relocate): Likewise.
2014-01-22Make assignments to dot keep an empty output section.Alan Modra5-11/+4
An assignment to dot in an output section that allocates space of course keeps the output section. Here, I'm changing the behaviour for assignments that don't allocate space. The idea is not so much to allow people to force output of an empty section with ". = .", but to fix cases where an otherwise empty section has padding added by an alignment expression that changes with relaxation or .eh_frame editing. Such a section might have zero size before relaxation and so be stripped incorrectly. ld/ * ld.texinfo (Output Section Discarding): Mention assigning to dot as a way of keeping otherwise empty sections. * ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0, is_dot_plus_0, is_align_conditional): New predicates. (exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an output section, except for some special cases. * scripttempl/elfmicroblaze.sc: Use canonical form to align at end of .heap and .stack. ld/testsuite/ * ld-shared/elf-offset.ld: Align end of .bss with canonical form of ALIGN that allows an empty .bss to be removed. * ld-arm/arm-dyn.ld: Likewise. * ld-arm/arm-lib.ld: Likewise. * ld-elfvsb/elf-offset.ld: Likewise. * ld-mips-elf/mips-dyn.ld: Likewise. * ld-mips-elf/mips-lib.ld: Likewise. * ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN. * ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section. ALIGN address of section instead. * ld-powerpc/vle-multiseg-2.ld: Likewise. * ld-powerpc/vle-multiseg-3.ld: Likewise. * ld-powerpc/vle-multiseg-4.ld: Likewise. * ld-powerpc/vle-multiseg-6.ld: Likewise. * ld-scripts/empty-aligned.d: Check section headers not program headers. Remove xfail and notarget. * ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
2013-11-04Edit ELFv2 global entry prologue to non-PICAlan Modra1-2/+2
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2.. in non-PIC executables has the benefit of removing a dependency on r12. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry prologue to non-PIC in non-PIC executables. ld/testsuite/ * ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
2013-10-30Add PowerPC64 ELFv2 tests.Alan Modra4-0/+156
* ld-powerpc/elfv2.s, * ld-powerpc/elfv2so.d, * ld-powerpc/elfv2exe.d: New tests. * ld-powerpc/powerpc.exp: Run them.
2013-10-30Change plt stubs to have destination in r12.Alan Modra19-181/+207
This change is to support the new ELFv2 ABI, which uses the value in r12 on function entry to calculate the got/toc pointer. bfd/ * elf64-ppc.c (build_plt_stub): Switch stubs to use r11 as base reg and r12 as destination. (ppc_build_one_stub): Likewise. (ppc64_elf_build_stubs): Likewise for glink. ld/testsuite/ * ld-powerpc/tls.s: Add proper .opd entry for _start. * ld-powerpc/tlstoc.s: Likewise. * ld-powerpc/relbrlt.d: Update for changed stubs. * ld-powerpc/tls.d: Update for changed stubs and _start .opd entry. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.r: Likewise.
2013-08-22 * ld-powerpc/powerpc.exp: Substitute for le in options_regsub(ld).Alan Modra16-70/+71
Correct ppc64elftests option replacement. (supports_ppc64): Match elf64lppc too. * ld-powerpc/relbrlt.d: Update for little-endian. * ld-powerpc/symtocbase.d: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.d: Likewise. * ld-powerpc/tocopt2.d: Likewise. * ld-powerpc/tocopt3.d: Likewise. * ld-powerpc/tocopt4.d: Likewise. * ld-powerpc/tocopt5.d: Likewise.
2013-05-21 * ld-powerpc/export-class.exp (supports_ppc64): Delete.Alan Modra2-31/+22
(powerpc_export_class_test): Add "endian" param. (abis): Add little-endian targets and test. * ld-powerpc/powerpc-64-export-class.xd: Update for little-endian.
2013-05-10XCOFF/AIX: Remove SEC_ALLOC flags for unmapped sections.Joel Brobecker3-3/+3
The .except, .loader and .typchk are not mapped to memory, so do not set their SEC_ALLOC flag. bfd/ChangeLog: * coffcode.h (styp_to_sec_flags) [RS6000COFF_C]: Add handling of STYP_EXCEPT, STYP_LOADER and STYP_TYPCHK sections. ld/testsuite/ChangeLog: * ld-powerpc/aix-core-sec-1.hd, ld-powerpc/aix-core-sec-2.hd, ld-powerpc/aix-core-sec-3.hd: Adjust expected section flags for section .loader.
2013-04-22bfd/Alan Modra8-8/+8
* elf64-ppc.c (ppc64_elf_check_relocs): Don't call create_linkage_sections here.. (ppc64_elf_init_stub_bfd): ..do so here. Return status. (create_linkage_sections): Move earlier in file. (ppc64_elf_setup_section_lists): Remove now useless htab->brlt test. * elf64-ppc.h (ppc64_elf_init_stub_bfd): Update proto. ld/ * emultempl/ppc64elf.em (ppc_create_output_section_statements): Check return from ppc64_elf_init_stub_bfd. ld/testsuite/ * ld-powerpc/tlsexe.d: Adjust. * ld-powerpc/tlsexe.r: Adjust. * ld-powerpc/tlsexetoc.d: Adjust. * ld-powerpc/tlsexetoc.r: Adjust. * ld-powerpc/tlsso.d: Adjust. * ld-powerpc/tlsso.r: Adjust. * ld-powerpc/tlstocso.d: Adjust. * ld-powerpc/tlstocso.r: Adjust.
2013-02-19 * lib/ld-lib.exp (run_ld_link_tests): Add another argument, passMaciej W. Rozycki3-58/+58
its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2013-01-31bfd/Alan Modra8-8/+8
* elf64-ppc.c (ppc_stub_name): Trim off trailing "+0". ld/testsuite/ * ld-powerpc/tlsexe.d: Update for changed stub names. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.r: Likewise.
2013-01-15bfd/Alan Modra5-17/+21
* elf64-ppc.c (ppc64_elf_size_stubs): Default shared libs to plt-thread-safe. gold/ * powerpc.cc (Target_powerpc::do_relax): Default shared libs to plt-thread-safe. ld/testsuite/ * ld-powerpc/tlsso.d: Adjust for plt-thread-safe stubs. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise.
2012-11-23include/opcode/Alan Modra11-13/+13
* ppc.h (ppc_parse_cpu): Update prototype. opcodes/ * ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits set from ppc_opts.sticky in it. Delete "retain_mask". (powerpc_init_dialect): Choose default dialect from info->mach before parsing -M options. Handle more bfd_mach_ppc variants. Update common default to power7. gas/ * config/tc-ppc.c (sticky): New var. (md_parse_option, ppc_machine): Update ppc_parse_cpu calls. gas/testsuite/ * gas/ppc/astest2.d: Pass -Mppc to objdump. ld/testsuite/ * ld-powerpc/plt1.d: Update for default "at" branch hints. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlstocso.d: Likewise.
2012-10-29 * ld-powerpc/powerpc.exp: Modify emulation option passed to ldAlan Modra50-680/+701
when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
2012-08-28 * ld-elf/export-class.sd: New test.Maciej W. Rozycki5-0/+150
* ld-elf/export-class.vd: New test. * ld-elf/export-class-def.s: New test source. * ld-elf/export-class-dep.s: New test source. * ld-elf/export-class-lib.s: New test source. * ld-elf/export-class-ref.s: New test source. * ld-elf/export-class-lib.ver: New test version script. * ld-elf/export-class.exp: New test script. * ld-arm/arm-export-class.rd: New test. * ld-arm/arm-export-class.xd: New test. * ld-arm/export-class.exp: New test script. * ld-i386/i386-export-class.rd: New test. * ld-i386/i386-export-class.xd: New test. * ld-i386/export-class.exp: New test script. * ld-mips-elf/mips-32-export-class.rd: New test. * ld-mips-elf/mips-32-export-class.xd: New test. * ld-mips-elf/mips-64-export-class.rd: New test. * ld-mips-elf/mips-64-export-class.xd: New test. * ld-mips-elf/export-class.exp: New test script. * ld-powerpc/powerpc-32-export-class.rd: New test. * ld-powerpc/powerpc-32-export-class.xd: New test. * ld-powerpc/powerpc-64-export-class.rd: New test. * ld-powerpc/powerpc-64-export-class.xd: New test. * ld-powerpc/export-class.exp: New test script. * ld-x86-64/x86-64-64-export-class.rd: New test. * ld-x86-64/x86-64-x32-export-class.rd: New test. * ld-x86-64/export-class.exp: New test script.
2012-06-15ld/Alan Modra7-41/+41
* ldlang.h (lang_output_section_statement_type): Add after_end field. (lang_abs_symbol_at_beginning_of, lang_abs_symbol_at_end_of): Delete. (section_for_dot): Declare. * ldlang.c (lang_size_sections_1): Correct comment. (current_section): Move earlier. (current_assign, prefer_next_section): New static vars. (lang_do_assignments_1): Add found_end param. Detect _end assignment to set found_end. Set os->after_end. Set above statics. (lang_do_assignments): Adjust lang_do_assignments_1 call. Init vars. (section_for_dot): New function. (lang_set_startof): Don't make an absolute symbol. (lang_abs_symbol_at_beginning_of, lang_abs_symbol_at_end_of): Delete. * ldexp.c (new_rel_from_abs): Use section_for_dot. * emultempl/lnk960.em (symbol_at_beginning_of): New function. (symbol_at_end_of): Likewise. (lnk960_after_allocation): Use them. * scripttempl/elf.sc: Precede OTHER_GOT_SYMBOLS with . = .; and likewise before __bss_start. ld/testsuite/ Update far too many tests.
2012-06-06bfd/Alan Modra7-17/+29
* elflink.c (elf_link_input_bfd): Provide a file symbol for each input file with local syms, if the input lacks such. (bfd_elf_final_link): Add a file symbol to mark end of locals for which we can associate with input files. (struct elf_final_link_info): Add filesym_count field. (struct elf_outext_info): Add need_second_pass and second_pass. (elf_link_output_extsym): Detect symbols defined in the output file, emit them on second pass over locals. ld/testsuite/ Update to suit added STT_FILE symbols.
2012-05-19bfd/Alan Modra2-4/+15
* elf32-ppc.h (has_vle_insns, is_ppc_vle): Delete. (has_tls_reloc, has_tls_get_addr_call): Move back to.. * elf32-ppc.c: ..here. (ppc_elf_section_flags, elf_backend_section_flags): Delete. (ppc_elf_modify_segment_map): Use ELF sh_flags to detect VLE sections. opcodes/ * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h. (get_powerpc_dialect): Detect VLE sections from ELF sh_flags. ld/testsuite/ * ld-powerpc/vle.ld: New. * ld-powerpc/powerpc.exp (vle reloc tests): Link using vle.ld.
2012-05-17bfd/Alan Modra4-8/+9
* elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Don't make _DYNAMIC, _GLOBAL_OFFSET_TABLE_ or _PROCEDURE_LINKAGE_TABLE_ absolute. * elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Don't make _DYNAMIC absolute. ld/testsuite/ * ld-powerpc/tlsso.r: Update for dynamic sym changes. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlstocso.r: Likewise.
2012-05-14Add support for PowerPC VLE.James Lemke28-2/+731
2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
generated by cgit v1.1 at 2024-11-26 13:47:44 +0000