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2017-08-30MIPS/BFD: Correct microMIPS cross-mode BAL to JALX relaxationMaciej W. Rozycki13-0/+139
Fix a bug in commit a6ebf6169a1b ("MIPS: Convert cross-mode BAL to JALX") and in BFD linker relaxation correct the microMIPS interpretation of the branch offset, which is supposed to be shifted by 1 bit, rather than 2 as in the regular MIPS case. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Correct microMIPS branch offset interpretation. gas/ * testsuite/gas/mips/branch-addend-micromips.d: New test. * testsuite/gas/mips/branch-addend-micromips-n32.d: New test. * testsuite/gas/mips/branch-addend-micromips-n64.d: New test. * testsuite/gas/mips/branch-addend-micromips.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/bal-jalx-addend-micromips.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-micromips.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-07-07MIPS/LD: Fix a segfault from ELF `e_flags' access with non-ELF output BFDMaciej W. Rozycki4-0/+18
Fix a commit 861fb55ab50a ("Defer allocation of R_MIPS_REL32 GOT slots"), <https://sourceware.org/ml/binutils/2008-08/msg00096.html>, regression and a more recent: FAIL: ld-unique/pr21529 new LD test case failure, observed with all the relevant MIPS targets whenever the linker is invoked with one or more ELF inputs and the output format set to `binary'. The culprit is a segmentation fault caused in `mips_before_allocation' by a null pointer dereference, where an attempt is made to access the ELF file header's `e_flags' member, for the purpose of determining whether to produce a PLT and copy relocations, without first checking that the output BFD is ELF. The `e_flags' member is stored in BFD's private data pointed to by `tdep', which in the case of the `binary' BFD is null, causing the segmentation fault. With other non-ELF BFDs such as SREC `tdep' is not null and consequently no crash may happen and in that case random data will be interpreted as it was `e_flags'. Disable the access to `e_flags' then and all the associated checks and consequently never produce a PLT and copy relocations if output is not a MIPS ELF BFD, matching `_bfd_mips_elf_merge_private_bfd_data' that does not process `e_flags' in that case either and therefore does not let us decide here anyway if all the input objects included in the link are suitable for use with a PLT and copy relocations. ld/ * emultempl/mipself.em (mips_before_allocation): Avoid ELF processing if not MIPS ELF. * testsuite/ld-mips-elf/binary.d: New test. * testsuite/ld-mips-elf/binary.ld: New test linker script. * testsuite/ld-mips-elf/binary.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-07-01MIPS/GAS: Use non-zero frag offset directly in PIC branch relaxationMaciej W. Rozycki6-0/+106
Use frag symbols with a non-zero offset directly in `fix_new_exp' calls made in PIC branch relaxation. There is no need here to make a helper symbol to hold the result of a `symbol+offset' calculation requested as only branches to local symbols are relaxed and in this case the LO16 part of the PIC address load sequence will have the offset accounted for in calculation against the local GOT entry retrieved as the GOT16 high part. Consequently actual code produed is identical whether a helper symbol is used or the original `symbol+offset' expression used directly. Verify that this is indeed the case with GAS and LD tests. gas/ * config/tc-mips.c (md_convert_frag): Don't make a helper expression symbol for `fix_new_exp' called with a non-zero offset. * testsuite/gas/mips/relax-offset.d: New test. * testsuite/gas/mips/mips1@relax-offset.d: New test. * testsuite/gas/mips/r3000@relax-offset.d: New test. * testsuite/gas/mips/r3900@relax-offset.d: New test. * testsuite/gas/mips/micromips@relax-offset.d: New test. * testsuite/gas/mips/relax-offset.l: New stderr output. * testsuite/gas/mips/relax-offset.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/relax-offset.dd: New test. * testsuite/ld-mips-elf/relax-offset.gd: New test. * testsuite/ld-mips-elf/relax-offset-umips.dd: New test. * testsuite/ld-mips-elf/relax-offset-umips.gd: New test. * testsuite/ld-mips-elf/relax-offset.ld: New test linker script. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. (prune_warnings): New temporary procedure.
2017-06-28MIPS: Add new Imagination interAptiv MR2 GAS and LD testsMaciej W. Rozycki1-0/+45
Add GAS tests to verify Imagination interAptiv MR2 instruction assembly, disassembly and ELF object file flags. Add LD tests to verify Imagination interAptiv MR2 ELF object file link-time compatibility and flag merging/propagation. Use the framework enhancement added with commit 7575e6a752ec ("MIPS/LD/testsuite: mips-elf-flags: Add MIPS ABI Flags handling"). gas/ * testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test. * testsuite/gas/mips/save-err.d: New test. * testsuite/gas/mips/save-sub.d: New test. * testsuite/gas/mips/interaptiv-mr2@save.d: New test. * testsuite/gas/mips/mips1@save-sub.d: New test. * testsuite/gas/mips/mips2@save-sub.d: New test. * testsuite/gas/mips/mips3@save-sub.d: New test. * testsuite/gas/mips/mips4@save-sub.d: New test. * testsuite/gas/mips/mips5@save-sub.d: New test. * testsuite/gas/mips/mips32@save-sub.d: New test. * testsuite/gas/mips/mips64@save-sub.d: New test. * testsuite/gas/mips/mips16@save-sub.d: New test. * testsuite/gas/mips/mips16e@save-sub.d: New test. * testsuite/gas/mips/r3000@save-sub.d: New test. * testsuite/gas/mips/r3900@save-sub.d: New test. * testsuite/gas/mips/r4000@save-sub.d: New test. * testsuite/gas/mips/vr5400@save-sub.d: New test. * testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test. * testsuite/gas/mips/sb1@save-sub.d: New test. * testsuite/gas/mips/octeon2@save-sub.d: New test. * testsuite/gas/mips/octeon3@save-sub.d: New test. * testsuite/gas/mips/xlr@save-sub.d: New test. * testsuite/gas/mips/r5900@save-sub.d: New test. * testsuite/gas/mips/mips16e2-copy.d: New test. * testsuite/gas/mips/mips16e2-copy-err.d: New test. * testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name' option. Adjust for trailing padding change. * testsuite/gas/mips/mips16e2-copy-err.l: New stderr output. * testsuite/gas/mips/save-sub.s: New test source. * testsuite/gas/mips/mips16e2-copy.s: New test source. * testsuite/gas/mips/mips16e2-copy-err.s: New test source. * testsuite/gas/mips/save.s: Update description, change trailing padding and remove trailing white space. * testsuite/gas/mips/mips.exp: Expand `save' and `save-err' tests across the regular MIPS interAptiv MR2 architecture. Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp: Add interAptiv MR2 tests.
2017-06-27MIPS/LD/testsuite: mips-elf-flags: Add MIPS ABI Flags handlingMaciej W. Rozycki1-3/+50
Complement commit 351cdf24d223 ("[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions") and add optional MIPS ABI Flags handling to `good_combination' in the `mips-elf-flags.exp' test script. This lets callers of this procedure request to examine MIPS ABI Flags in addition to the `e_flags' member of the ELF file header so as to verify that flags are merged correctly by LD. The presence of further arguments triggers this verification, in which case `readelf' is called with the `-A' option additionally specified and the ISA member, the ISA Extension member and the ASEs member will be examined as per the arguments. Unlike with `readelf -h' output consider a failure to retrieve the member requested a test case failure rather than an unresolved result. This is because unlike with the `e_flags' member of the ELF file header which is always there in any valid ELF file the MIPS ABI Flags structure is optional in LD output and the absence of this structure when expected is surely a bug in LD. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination): Add an `args' final argument and examination code for `readelf -A' output. Update procedure description accordingly.
2017-06-27MIPS/LD/testsuite: mips-elf-flags: Use `remote_exec' to call `readelf'Maciej W. Rozycki1-2/+7
For ELF file header flag verification done in `good_combination' in the `mips-elf-flags.exp' test script the version of `readelf' built along with the rest of binutils has to be used rather than any such executable already present on the build system, so that flags recognized by the tool match those supported by LD being tested. Use `remote_exec' as elsewhere in the LD test framework and also with GAS and LD used here, getting and arranging for extra reporting of `readelf' calls included in test logs on this occasion as well. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination): Use `remote_exec' to call `readelf'. Log the command issued.
2017-06-27MIPS/LD/testsuite: mips-elf-flags: Use `-h' only with `readelf'Maciej W. Rozycki1-2/+2
For the purpose of link-time object compatibility handling verification code in the `good_combination' procedure from the `mips-elf-flags.exp' test script only examines the `e_flags' member of the ELF file header and ignores data from any ELF program or section headers present. Use `readelf -h' rather than `readelf --headers' then to obtain data for examination, avoiding unnecessary processing to extract this extraneous information. ld/ * testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination): Use `readelf -h' rather than `readelf --headers'.
2017-06-26MIPS/BFD: Consistently mark the LSI CW4010 as a MIPS II processorMaciej W. Rozycki2-0/+26
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core (for an odd reason referred to as LSI R4010 across our code base) as a MIPS II processor in BFD as well, fixing a bug that has been there since forever and addressing linker warnings like: $ as -m4010 empty.s -o 4010.o $ ld -r 4010.o -o 4010-r.o ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags $ due to the ISA level being recorded as MIPS III in ELF file header's `e_flags' vs MIPS II in the MIPS ABI Flags section: $ readelf -Ah 4010.o ELF Header: Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, big endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: REL (Relocatable file) Machine: MIPS R3000 Version: 0x1 Entry point address: 0x0 Start of program headers: 0 (bytes into file) Start of section headers: 348 (bytes into file) Flags: 0x20821000, 4010, o32, mips3 Size of this header: 52 (bytes) Size of program headers: 0 (bytes) Number of program headers: 0 Size of section headers: 40 (bytes) Number of section headers: 11 Section header string table index: 10 Attribute Section: gnu File Attributes Tag_GNU_MIPS_ABI_FP: Hard float (double precision) MIPS ABI Flags Version: 0 ISA: MIPS2 GPR size: 32 CPR1 size: 32 CPR2 size: 0 FP ABI: Hard float (double precision) ISA Extension: LSI R4010 ASEs: None FLAGS 1: 00000000 FLAGS 2: 00000000 $ Available documentation[1][2] clearly indicates the LSI CW4010 processor is only backwards compatible with the MIPS R4000 processor as far as the latter's 32-bit instructions are concerned and consequently can only be considered a MIPS II ISA implementation (with vendor extensions). This fixes an LD testsuite failure: FAIL: MIPS incompatible objects: "-march=r4010 -32" "-march=r4650 -32" triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets. References: [1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995, presented at Hot Chips VII, Stanford University, Stanford, California, August 1995 [2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017 bfd/ * cpu-mips.c (arch_info_struct): Mark the 4010 32-bit. * elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'. (mips_mach_extensions): Mark `bfd_mach_mips4010' as extending `bfd_mach_mips6000' rather than `bfd_mach_mips4000'. ld/ * testsuite/ld-mips-elf/lsi-4010-isa.d: New test. * ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-05-15MIPS16e2: Add new MIPS16e2 relaxation GAS and LD testsMaciej W. Rozycki9-0/+150
Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI instruction rather than an LI/SLL instruction pair. gas/ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' flags. * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment preservation between MIPS16 and MIPS16e2 code. * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over all MIPS16 architectures. ld/ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-03MIPS16/GAS: Relax 32-bit non-PIC PC-relative synthetic instructionsMaciej W. Rozycki9-0/+155
Implement the relaxation of MIPS16 PC-relative synthetic LA, DLA, LW and LD instructions to an equivalent sequence of instructions produced where the address operand requested is out of range, absolute or requires linker relocation, for ABIs that use 32-bit addressing and non-PIC code. The sequence generated uses the register specified for the destination operand as a temporary and begins with LI to load the high 16-bit part of the address, then continues with SLL by 16 bits to move that part into place and finally completes with a suitable operation corresponding to the synthetic instruction used, one of: 2-argument ADDIU, 2-argument DADDIU, absolute LW, and absolute LD respectively, providing the low 16-bit part of the address. All instructions use the extended encoding. As a special exception accept absolute addresses for relaxation even in PIC code. For example: la $2, 0x12345678 produces code as: li $2, 0x1234 sll $2, $2, 16 addiu $2, 0x5678 would. Where linker relocation is required emit an R_MIPS16_HI16 relocation on the initial LI instruction and an R_MIPS16_LO16 relocation on the final operation. For example (where `foo' is not local): lw $3, foo produces code as: li $3, %hi(foo) sll $3, $3, 16 lw $3, %lo(foo)($3) would. Emit assembly warnings as appropriate where this new relaxation triggers in the `nomacro' mode or for an instruction manually placed in a branch delay slot in the `noreorder' mode. Refrain from relaxation where an explicit instruction size suffix has been used and in the `noautoextend' mode. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and `nomacro' flags. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO): New macros. (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits. (RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO) (RELAX_MIPS16_CLEAR_MACRO): New macros. (append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and `mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE. (mips16_macro_frag): New function. (md_estimate_size_before_relax): Handle HI16/LO16 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/mips16@relax-swap3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16e@relax-swap3.d: New test subarchitecture. * testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing NOP padding. * testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16@relax-swap3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file. * testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file. * testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file. * testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file. * testsuite/gas/mips/relax-swap3.s: Adjust trailing padding. * testsuite/gas/mips/mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16-pcrel-3.d: New test. * testsuite/gas/mips/mips16-pcrel-4.d: New test. * testsuite/gas/mips/mips16-pcrel-5.d: New test. * testsuite/gas/mips/mips16-pcrel-pic-0.d: New test. * testsuite/gas/mips/mips16-pcrel-pic-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-1.d: New test. * testsuite/gas/mips/mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-4.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-5.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-0.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-2.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-3.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-4.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-5.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source. * testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-03MIPS16/GAS: Fix absolute references with PC-relative synthetic instructionsMaciej W. Rozycki10-0/+70
Complement commit 88a7ef168927 ("MIPS16/GAS: Restore unsupported relocation diagnostics") and also propagate constant expressions, either already reduced from absolute symbol references or created from literals in the first place, used as a PC-relative operand with the MIPS16 LA, LW, DLA and LD synthetic instructions to relaxation, matching the way forward absolute symbol references have been handled as from the commit referred and letting relaxation produce any necessary relocations, if possible, for the absolute value requested to be reproduced at the run time. Call `symbol_append' for any expression symbol created for the purpose of MIPS16 relaxation as with constant expressions now propagated from earlier on such symbols may make it through and have R_MIPS16_PC16_S1 relocations emitted against, and therefore need to appear in the symbol table produced. gas/ * config/tc-mips.c (append_insn): Call `symbol_append' for any expression symbol created for MIPS16 relaxation. (match_mips16_insn): Don't encode a constant value as an immediate with a PC-relative operand. * testsuite/gas/mips/mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n32-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n64-1.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-1.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-1.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-2.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-addend-1.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-04-26PR ld/21334: Always call `_bfd_elf_link_renumber_dynsyms' if requiredMaciej W. Rozycki5-0/+60
Complement commit e17b0c351f0b ("MIPS/BFD: Respect the ELF gABI dynamic symbol table sort requirement") and correct an inconsistency in dynamic symbol accounting data causing an assertion failure in the MIPS backend: ld: BFD (GNU Binutils) 2.28.51.20170330 assertion fail ../../binutils-gdb/bfd/elfxx-mips.c:3860 in the course of making a GOT entry in a static binary to satisfy a GOT relocation present in input, due to the local dynamic symbol count not having been established. To do so let backends request `_bfd_elf_link_renumber_dynsyms' to be always called, rather than where a dynamic binary is linked only, and then make this request in the MIPS backend. bfd/ PR ld/21334 * elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms' member. * elfxx-target.h [!elf_backend_always_renumber_dynsyms] (elf_backend_always_renumber_dynsyms): Define. (elfNN_bed): Initialize `always_renumber_dynsyms' member. * elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define. * elflink.c (bfd_elf_size_dynamic_sections): Also call `_bfd_elf_link_renumber_dynsyms' if the backend has requested it. (bfd_elf_size_dynsym_hash_dynstr): Likewise. ld/ PR ld/21334 * testsuite/ld-mips-elf/pr21334.dd: New test. * testsuite/ld-mips-elf/pr21334.gd: New test. * testsuite/ld-mips-elf/pr21334.ld: New test linker script. * testsuite/ld-mips-elf/pr21334.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-04-20MIPS/LD/testsuite: Join `__ehdr_start' testsMaciej W. Rozycki1-2/+1
Complement commit 3807734dbe48 ("PR ld/15428: MIPS/LD/testsuite: Un-KFAIL `__ehdr_start' test 2") and join tests that do not need to be split anymore. ld/ * testsuite/ld-mips-elf/mips-elf.exp: Join `__ehdr_start' tests.
2017-03-05Align eh_frame FDEs according to their encodingAlan Modra3-123/+83
bfd/ * elf-bfd.h (struct eh_cie_fde): Add u.cie.per_encoding_aligned8. * elf-eh-frame.c (size_of_output_cie_fde): Don't align here. (next_cie_fde_offset): New function. (_bfd_elf_parse_eh_frame): Set u.cie.per_encoding_aligned8. (_bfd_elf_discard_section_eh_frame): Align zero terminator to four bytes. Align CIEs to four or eight bytes depending on per_encoding_aligned8. Align FDEs according to their encoding. Pad last FDE to output section alignment. (_bfd_elf_write_section_eh_frame): Adjust to suit. Remove assertion. * elf64-ppc.c (glink_eh_frame_cie): Delete padding. (ppc64_elf_size_stubs): Pad glink eh_frame as per elf-eh-frame.c. (ppc64_elf_finish_dynamic_sections): Adjust to suit. ld/ * testsuite/ld-elf/eh3.d: Adjust for eh_frame alignment change. * testsuite/ld-elf/eh6.d: Likewise. * testsuite/ld-alpha/tlsbin.dd: Likewise. * testsuite/ld-alpha/tlsbin.td: Likewise. * testsuite/ld-alpha/tlsbinr.dd: Likewise. * testsuite/ld-alpha/tlspic.dd: Likewise. * testsuite/ld-alpha/tlspic.rd: Likewise. * testsuite/ld-alpha/tlspic.sd: Likewise. * testsuite/ld-alpha/tlspic.td: Likewise. * testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise. * testsuite/ld-mips-elf/eh-frame3.d: Likewise. * testsuite/ld-x86-64/pr20830a.d: Likewise. * testsuite/ld-x86-64/pr21038a.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-02-28MIPS/BFD: Also handle `jalr $0, $25' with R_MIPS_JALRMaciej W. Rozycki3-2/+44
Interpret the `jalr $0, $25' instruction encoding with an R_MIPS_JALR relocation attached as an alias to `jr $25' and convert the jump to an equivalent branch where possible, consequently covering the MIPSr6 architecture for the purpose of this optimization too. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Also handle the `jalr $0, $25' instruction encoding. gas/ * testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions. * testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6 encoding patterns. * testsuite/gas/mips/jalr4-n64.d: Likewise. * testsuite/gas/mips/mipsr6@jalr4.d: New test. * testsuite/gas/mips/mipsr6@jalr4-n32.d: New test. * testsuite/gas/mips/mipsr6@jalr4-n64.d: New test. ld/ * testsuite/ld-mips-elf/jalr4.dd: Adjust for `jalr $0, $25' instructions. * testsuite/ld-mips-elf/jalr4-r6.dd: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-02-23MIPS/BFD: Remove duplicate NewABI JALR relocation handlingMaciej W. Rozycki4-4/+4
Remove separate original NewABI JALR relocation handling, introduced with commit d06471104a83 ("relax jalr $t9 [R_MIPS_JALR symbol] to bal symbol"), <https://sourceware.org/ml/binutils/2003-03/msg00394.html>, and only used by LD with the `--relax' option specified, and rely solely on `mips_elf_perform_relocation' code, which has been introduced with commit 1367d393bb74 ("On the RM9000 convert jal to bal if in range"), <https://www.sourceware.org/ml/binutils/2004-12/msg00088.html> and since made more complete, across all the three ABIs. Also remove the `--relax' option, now irrelevant, from the tests added with the former commit. bfd/ * elfxx-mips.h (_bfd_mips_relax_section): Remove prototype. * elfxx-mips.c (_bfd_mips_relax_section): Remove function. * elf64-mips.c (bfd_elf64_bfd_relax_section): Remove macro. * elfn32-mips.c (bfd_elf32_bfd_relax_section): Likewise. ld/ * testsuite/ld-mips-elf/relax-jalr-n32.d: Remove `--relax' option. * testsuite/ld-mips-elf/relax-jalr-n32-shared.d: Likewise. * testsuite/ld-mips-elf/relax-jalr-n64.d: Likewise. * testsuite/ld-mips-elf/relax-jalr-n64-shared.d: Likewise.
2017-02-23MIPS/BFD: Discard ineligible JALR relocations right awayMaciej W. Rozycki2-1/+27
Discard R_MIPS_JALR and R_MICROMIPS_JALR relocations associated with jumps that cannot be converted to an equivalent branch right away in `mips_elf_calculate_relocation' rather than letting them through to `mips_elf_perform_relocation'. This includes cross-mode jumps which need to flip the ISA bit or jumps to a misaligned location that cannot be encoded with a branch, in addition to preemptible symbol references already handled. Cross-mode jumps are actually already rejected as the conversion is made in `mips_elf_perform_relocation', so in this case this change only saves some processing. Jumps to a misaligned location are however converted, with bits causing misalignment lost, making resulting code functionally different even if the lone effect is avoiding an address error exception with an instruction fetch at the jump destination requested. Add test cases suitable, also including GAS verification to confirm that the JALR relocations explicitly requested have indeed been output in the intermediate objects used. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR> <R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p' or misaligned. gas/ * testsuite/gas/mips/jalr4.d: New test. * testsuite/gas/mips/jalr4-n32.d: New test. * testsuite/gas/mips/jalr4-n64.d: New test. * testsuite/gas/mips/jalr4.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/jalr4.dd: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-02-15LD: vfinfo: Make clever formatters consistent WRT function name reportingMaciej W. Rozycki20-533/+0
Remove an inconsistency in linker error message processing causing that it depends on the ability to infer the name of the originating source file whether or not the name of the offending function is repeated by clever formatters for each issue reported within the function. Taking the `ld/testsuite/ld-powerpc/tocopt7.s' test case source as an example and the `powerpc-linux' target we have: $ as -gdwarf2 -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ vs: $ as -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': (.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. tocopt.o: In function `_start': (.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ Similarly with the `mips-linux' target and this source: $ cat jal-global-multi-overflow.s .text .set noreorder .space 0x2000 .align 4 .globl foo .ent foo foo: jal bar nor $0, $0 jal bar nor $0, $0 .end foo .space 0x1ff0 .align 4 .globl bar .ent bar bar: jal foo nor $0, $0 jal foo nor $0, $0 .end bar $ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s $ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o jal-global-multi-overflow.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `foo': (.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo' jal-global-multi-overflow.o: In function `bar': (.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo' $ Not only this is inconsistent, but it causes output clutter as well with redundant information. The cause for this is a check in `vfinfo' the intent of which is to print the function heading whenever (among others) the name of the source file has changed, which however does not take into account a situation where the name couldn't have been established both now and previously. Adjust the check then for this situation, yielding: $ as -o tocopt.o -a64 tocopt.s $ ld -o tocopt -melf64ppc tocopt.o tocopt.o: In function `_start': (.text+0x14): toc optimization is not supported for 0x3fa00000 instruction. (.text+0x34): toc optimization is not supported for 0x3fa00000 instruction. $ and: $ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s $ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o jal-global-multi-overflow.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar' (.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar' jal-global-multi-overflow.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo' (.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo' $ respectively instead. Adjust the test suite accordingly. ld/ * ldmisc.c (vfinfo): Don't print the function name again either if no source file name has been found both now and previously. * testsuite/ld-cris/tls-err-20x.d: Adjust accordingly. * testsuite/ld-mips-elf/mode-change-error-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise. * testsuite/ld-powerpc/tocopt.out: Likewise. * testsuite/ld-powerpc/tocopt7.out: Likewise.
2017-02-01MIPS/LD/testsuite: Correct relocation addends in VxWorks testsMaciej W. Rozycki4-14/+14
Fix commit 171191bac50e ("Add support for STT_IFUNC"), <https://sourceware.org/ml/binutils/2008-12/msg00052.html>, commit e04d7088afe0 ("PR ld/14088: Always display addend as signed hex number"), <https://sourceware.org/ml/binutils/2012-05/msg00123.html> and commit 343dbc36ffae ("Print addend as signed in objdump"), <https://sourceware.org/ml/binutils/2012-05/msg00163.html> regressions: FAIL: VxWorks executable test 1 (dynamic) FAIL: ld-mips-elf/vxworks-forced-local-1 seen with `mips-vxworks' and `mipsel-vxworks' targets and adjust dump patterns according to changes made to the presentation of relocation addends in `readelf -r' and `objdump -r' output. ld/ * testsuite/ld-mips-elf/vxworks-forced-local-1.d: Correct the presentation of relocation addends. * testsuite/ld-mips-elf/vxworks1-lib.rd: Likewise. * testsuite/ld-mips-elf/vxworks1.dd: Likewise. * testsuite/ld-mips-elf/vxworks1.rd: Likewise.
2017-02-01MIPS/LD/testsuite: Fix a `tls-multi-got-1-1.s' build failureMaciej W. Rozycki3-25/+28
Correct a commit ec9ab52c3217 ("gas: consistently emit diagnostics for non-zero data emission to .bss/.struct"), <https://sourceware.org/ml/binutils/2015-12/msg00073.html> regression: .../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s: Assembler messages: .../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s:39: Error: attempt to store non-zero value in section `.tbss' ERROR: -EB -march=mips1 -32 -KPIC .../ld/testsuite/ld-mips-elf/tls-multi-got-1-1.s: assembly failed UNRESOLVED: Shared library with multiple GOTs and TLS in MIPS target testing and move `tlsvar_ld' to `.tdata' section, in line with the remaining local dynamic definitions introduced with the set of tests added with commit f4e584bd00f1 ("TLS support for MIPS"), <https://sourceware.org/ml/binutils/2005-02/msg00607.html>. ld/ * testsuite/ld-mips-elf/tls-multi-got-1-1.s: Place `tlsvar_ld' in `.tdata' section. * testsuite/ld-mips-elf/tls-multi-got-1.got: Adjust accordingly. * testsuite/ld-mips-elf/tls-multi-got-1.r: Likewise.
2017-01-30MIPS: Add options to control branch ISA checksMaciej W. Rozycki8-0/+301
Complement commit 9d862524f6ae ("MIPS: Verify the ISA mode and alignment of branch and jump targets") and add GAS and LD options to control the checks for invalid branches between ISA modes introduced there, to help with some handwritten code lacking `.insn' annotation for labels used as branch targets and code produced by older versions of GCC which suffers from the issue with branches to code that has been optimized away, addressed with GCC commit 242424 ("MIPS/GCC: Mark trailing labels with `.insn'"), <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01061.html>. bfd/ * elfxx-mips.h (_bfd_mips_elf_insn32): Rename prototype to... (_bfd_mips_elf_linker_flags): ... this. Add another parameter. * elfxx-mips.c (mips_elf_link_hash_table): Add `ignore_branch_isa' member. (mips_elf_perform_relocation): Do not treat an ISA mode mismatch in branch relocation calculation as an error if `ignore_branch_isa' has been set. (_bfd_mips_elf_insn32): Rename to... (_bfd_mips_elf_linker_flags): ... this. Rename the `on' parameter to `insn32' and add an `ignore_branch_isa' parameter. Handle the new parameter. gas/ * config/tc-mips.c (mips_ignore_branch_isa): New variable. (options): Add OPTION_IGNORE_BRANCH_ISA and OPTION_NO_IGNORE_BRANCH_ISA enum values. (md_longopts): Add "mignore-branch-isa" and "mno-ignore-branch-isa" options. (md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and OPTION_NO_IGNORE_BRANCH_ISA. (fix_bad_cross_mode_branch_p): Return FALSE if `mips_ignore_branch_isa' has been set. (md_show_usage): Add `-mignore-branch-isa' and `-mno-ignore-branch-isa'. * doc/as.texinfo (Target MIPS options): Add `-mignore-branch-isa' and `-mno-ignore-branch-isa' options. (-mignore-branch-isa, -mno-ignore-branch-isa): New options. * doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and `-mno-ignore-branch-isa' options. * testsuite/gas/mips/branch-local-ignore-2.d: New test. * testsuite/gas/mips/branch-local-ignore-3.d: New test. * testsuite/gas/mips/branch-local-ignore-n32-2.d: New test. * testsuite/gas/mips/branch-local-ignore-n32-3.d: New test. * testsuite/gas/mips/branch-local-ignore-n64-2.d: New test. * testsuite/gas/mips/branch-local-ignore-n64-3.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * emultempl/mipself.em (ignore_branch_isa): New variable. (mips_create_output_section_statements): Rename `_bfd_mips_elf_insn32' called to `_bfd_mips_elf_linker_flags', add `ignore_branch_isa' argument. (PARSE_AND_LIST_PROLOGUE): Add OPTION_IGNORE_BRANCH_ISA and OPTION_NO_IGNORE_BRANCH_ISA enum values. (PARSE_AND_LIST_LONGOPTS): Add "ignore-branch-isa" and "no-ignore-branch-isa" options. (PARSE_AND_LIST_OPTIONS): Add `--ignore-branch-isa' and `--no-ignore-branch-isa'. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_IGNORE_BRANCH_ISA and OPTION_NO_IGNORE_BRANCH_ISA. * ld.texinfo (Options specific to MIPS targets): Add `--ignore-branch-isa' and `--no-ignore-branch-isa' options. (ld and the MIPS family): Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: New test. * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: New test. * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1: New test. * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16: New test. * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-01-18PR gas/20649: MIPS: Fix GOT16/LO16 reloc pairing with comdat sectionsMaciej W. Rozycki1-0/+7
Correct a regression from commit 8614eeee67f9 ("Traditional MIPS patches"), <https://sourceware.org/ml/binutils/2000-07/msg00018.html>, which caused symbols in linkonce or what is these days known as comdat sections to be treated as external for the purpose of PIC relocation generation even if their binding remains STB_LOCAL. This in turn disabled GOT16/LO16 relocation pairing with references to such symbols, as no complementing LO16 relocation is expected for external GOT16 references in the o32 ABI, which ultimately leads to link errors, e.g.: ld: comdat-reloc.o: Can't find matching LO16 reloc against `foo' for R_MIPS_GOT16 at 0x24 in section `.text.bar[bar]' as with the LD test case included with this change. Revert the special case for symbols in comdat sections then, making code actually match `adjust_reloc_syms' as indicated in its explanatory comment, and adjust calling code accordingly. Also bring back the corresponding description of what now is `s_is_linkonce', lost with commit 5f0fe04bc550 ("Improved MIPS16/MIPS32 code intermixing for gas."), <https://www.sourceware.org/ml/binutils/2006-07/msg00039.html>. gas/ PR gas/20649 * config/tc-mips.c (pic_need_relax): Don't check for linkonce symbols, remove the `segtype' parameter. (mips_frob_file, md_estimate_size_before_relax): Adjust accordingly. (s_is_linkonce): Add an explanatory comment. * testsuite/gas/mips/comdat-reloc.d: New test. * testsuite/gas/mips/comdat-reloc.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test. ld/ PR gas/20649 * testsuite/ld-mips-elf/mips-elf.exp: Add PIC comdat GOT16/LO16 relocation pairing link test.
2017-01-02Run more ld tests when not nativeAlan Modra1-2/+2
Many of the ld tests are not run for cross builds, in some cases because the test needs to run a newly linked executable, and in others simply because it was easier to write the test for native only. Even when a test needs to run, it's good to compile and link to exercise the linker. So that's what this patch does. I've also rid us of the old ld_link procedure with all the HOSTING_CRT0 etc. setup. It's much simpler to just link with $CC. This does mean that a cross build with cross-compiler installed but no cross C-library will give lots of failures. If that turns out to be too annoying, I guess we can write a tcl procedure to detect it and not run all the extra tests. * Makefile.am (bootstrap): Delete rule. (ld-partial, ld1, ld1-full, ld2, ld3): Likewise. (HOSTING_CRT0, HOSTING_SCRT0): Don't define. (HOSTING_LIBS, HOSTING_SLIBS, HOSTING_EMU): Likewise. * configure.ac (HOSTING_CRT0, HOSTING_SCRT0): Don't define. (HOSTING_LIBS, HOSTING_SLIBS): Likewise. * configure.host (HOSTING_CRT0, HOSTING_LIBS): Don't define. * Makefile.in: Regenerate. * configure: Regenerate. * testsuite/config/default.exp (get_link_files): Delete. (HOSTING_CRT0, HOSTING_SCRT0, HOSTING_LIBS, HOSTING_SLIBS): Don't define. (ld_simple_link): Delete. * testsuite/lib/ld-lib.exp (default_ld_link): Delete (default_ld_simple_link): Rename to default_ld_link. (ld_simple_link_defsyms): Rename to ld_link_defsyms. (run_ld_link_tests): Use ld_link, not ld_simple_link. (run_cc_link_tests): Likewise. (run_ld_link_exec_tests): Use $CC or $CXX to link, not $ld. Don't run exe when not native, and return unsupported. * testsuite/ld-bootstrap/bootstrap.exp: Create gccld1 etc. dirs. Link ld1 etc. using $CC. * testsuite/ld-cdtest/cdtest.exp: Link cdtest using $CC. * testsuite/ld-checks/checks.exp: Use ld_link, not ld_simple_link. * testsuite/ld-cygwin/exe-export.exp: Likewise. * testsuite/ld-elf/binutils.exp: Likewise. * testsuite/ld-elf/eh-group.exp: Likewise. * testsuite/ld-elf/exclude.exp: Likewise. * testsuite/ld-elf/frame.exp: Likewise. * testsuite/ld-elf/sec-to-seg.exp: Likewise. * testsuite/ld-elf/tls_common.exp: Likewise. * testsuite/ld-elfcomm/elfcomm.exp: Likewise. * testsuite/ld-fastcall/fastcall.exp: Likewise. * testsuite/ld-gc/gc.exp: Likewise. * testsuite/ld-ifunc/binutils.exp: Likewise. * testsuite/ld-mep/mep.exp: Likewise. * testsuite/ld-mips-elf/mips-elf-flags.exp: Likewise. * testsuite/ld-mn10300/mn10300.exp: Likewise. * testsuite/ld-nios2/nios2.exp: Likewise. * testsuite/ld-pe/pe-compile.exp: Likewise. * testsuite/ld-pe/pe-run.exp: Likewise. * testsuite/ld-pe/pe-run2.exp: Likewise. * testsuite/ld-plugin/plugin.exp: Likewise. * testsuite/ld-scripts/align.exp: Likewise. * testsuite/ld-scripts/alignof.exp: Likewise. * testsuite/ld-scripts/assert.exp: Likewise. * testsuite/ld-scripts/defined.exp: Likewise. * testsuite/ld-scripts/extern.exp: Likewise. * testsuite/ld-scripts/log2.exp: Likewise. * testsuite/ld-scripts/map-address.exp: Likewise. * testsuite/ld-scripts/phdrs.exp: Likewise. * testsuite/ld-scripts/phdrs2.exp: Likewise. * testsuite/ld-scripts/script.exp: Likewise. * testsuite/ld-scripts/section-flags.exp: Likewise. * testsuite/ld-scripts/sizeof.exp: Likewise. * testsuite/ld-scripts/sysroot-prefix.exp: Likewise. * testsuite/ld-scripts/weak.exp: Likewise. * testsuite/ld-selective/selective.exp: Likewise. * testsuite/ld-sh/sh.exp: Likewise. * testsuite/ld-sh/sh64/relax.exp: Likewise. * testsuite/ld-sh/sh64/relfail.exp: Likewise. * testsuite/ld-srec/srec.exp: Likewise. * testsuite/ld-tic6x/tic6x.exp: Likewise. * testsuite/ld-undefined/weak-undef.exp: Likewise. * testsuite/ld-versados/versados.exp: Likewise. * testsuite/ld-x86-64/dwarfreloc.exp: Likewise. * testsuite/ld-xtensa/coalesce.exp: Likewise. * testsuite/ld-xtensa/diff_overflow.exp: Likewise. * testsuite/ld-xtensa/lcall.exp: Likewise. * testsuite/ld-elf/audit.exp: Run non-native too. * testsuite/ld-elf/compress.exp: Likewise. Replace ld options with gcc -Wl, options. * testsuite/ld-elf/dwarf.exp: Run non-native too. Use ld_link, not ld_simple_link. Add -Wl,--no-as-needed to some tests. * testsuite/ld-elf/elf.exp: Run non-native too. Formatting. * testsuite/ld-elf/indirect.exp: Run non-native too. Add -Wl,--no-as-needed to most tests. * testsuite/ld-elf/shared.exp: Run non-native too. Use braces to simplify quoting. Set run_tests using [list] rather than brace assignment to expand $extralibs. Add -Wl,--no-as-needed to many test. Prefix ld options with -Wl,. (mix_pic_and_non_pic): Don't run exe if not native. * testsuite/ld-elf/wrap.exp: Run non-native too. Add -Wl,--no-as-needed and prefix ld options with -Wl,. * testsuite/ld-elfvers/vers.exp: Run non-native too. Use ld_link, not ld_simple_link. * testsuite/ld-elfvsb/elfvsb.exp: Likewise. (visibility_test): Don't run exe if not native. * testsuite/ld-elfweak/elfweak.exp: Run non-native too. Use ld_link, not ld_simple_link. (build_exec): Don't run exe if not native. * testsuite/ld-ifunc/ifunc.exp: Run non-native too. Use ld_link, not ld_simple_link. Link using $CC. Add -Wl,--no-as-needed to some tests and prefix ld options with -Wl,. Expect GNU for hppa-linux even when no ifuncs. Delete cleanup. * testsuite/ld-pie/pie.exp: Run non-native too. * testsuite/ld-plugin/lto.exp: Likewise. * testsuite/ld-shared/shared.exp: Likewise. Use ld_link, not ld_simple_link. (shared_test): Don't run exe if not native. * testsuite/ld-size/size.exp: Run non-native too. Add -Wl,--no-as-needed to some tests. Prefix ld options with -Wl,. * testsuite/ld-unique/unique.exp: Run non-native too. Use ld_link, not ld_simple_link. Link using $CC. Add -Wl,--no-as-needed to some tests and prefix ld options with -Wl,. Expect GNU for hppa-linux even when no unique syms. Delete cleanup. * testsuite/ld-x86-64/tls.exp: Add -Wl,--no-as-needed to some tests and prefix ld options with -Wl,. * testsuite/ld-x86-64/x86-64.exp: Use ld_link, not ld_simple_link. Add -Wl,--no-as-needed to some tests. Prefix ld options with -Wl,.
2017-01-02Update year range in copyright notice of all files.Alan Modra4-4/+4
2016-08-19Place .shstrtab section after .symtab and .strtab, thus restoring ↵Nick Clifton4-4/+4
monotonically increasing section offsets. bfd * elf.c (assign_section_numbers): Assign number for the .shstrtab section after the symbol table and string table sections. binutils * testsuite/binutils-all/readelf.s: Adjust expected ordering of sections. * testsuite/binutils-all/readelf.s-64: Likewise. gas * testsuite/gas/i386/ilp32/x86-64-unwind.d: Adjust expected ordering of sections. * testsuite/gas/i386/x86-64-unwind.d: Likewise. * testsuite/gas/ia64/alias-ilp32.d: Likewise. * testsuite/gas/ia64/alias.d: Likewise. * testsuite/gas/ia64/group-1.d: Likewise. * testsuite/gas/ia64/group-2.d: Likewise. * testsuite/gas/ia64/secname-ilp32.d: Likewise. * testsuite/gas/ia64/secname.d: Likewise. * testsuite/gas/ia64/unwind-ilp32.d: Likewise. * testsuite/gas/ia64/unwind.d: Likewise. * testsuite/gas/ia64/xdata-ilp32.d: Likewise. * testsuite/gas/ia64/xdata.d: Likewise. * testsuite/gas/mmix/bspec-1.d: Likewise. * testsuite/gas/mmix/bspec-2.d: Likewise. * testsuite/gas/mmix/byte-1.d: Likewise. * testsuite/gas/mmix/loc-1.d: Likewise. * testsuite/gas/mmix/loc-2.d: Likewise. * testsuite/gas/mmix/loc-3.d: Likewise. * testsuite/gas/mmix/loc-4.d: Likewise. * testsuite/gas/mmix/loc-5.d: Likewise. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise. ld * testsuite/ld-alpha/tlsbin.rd: Adjust expected ordering of sections. * testsuite/ld-alpha/tlsbinr.rd: Likewise. * testsuite/ld-alpha/tlspic.rd: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-i386/nogot1.d: Likewise. * testsuite/ld-i386/pr12718.d: Likewise. * testsuite/ld-i386/pr12921.d: Likewise. * testsuite/ld-i386/tlsbin-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbin2-nacl.rd: Likewise. * testsuite/ld-i386/tlsbin2.rd: Likewise. * testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-i386/tlsgdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic-nacl.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic-nacl.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-i386/tlspic2-nacl.rd: Likewise. * testsuite/ld-i386/tlspic2.rd: Likewise. * testsuite/ld-ia64/tlsbin.rd: Likewise. * testsuite/ld-ia64/tlspic.rd: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-10.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise. * testsuite/ld-mmix/bspec1.d: Likewise. * testsuite/ld-mmix/bspec2.d: Likewise. * testsuite/ld-mmix/local1.d: Likewise. * testsuite/ld-mmix/local3.d: Likewise. * testsuite/ld-mmix/local5.d: Likewise. * testsuite/ld-mmix/local7.d: Likewise. * testsuite/ld-mmix/undef-3.d: Likewise. * testsuite/ld-powerpc/tlsexe.r: Likewise. * testsuite/ld-powerpc/tlsexe32.r: Likewise. * testsuite/ld-powerpc/tlsexetoc.r: Likewise. * testsuite/ld-powerpc/tlsso.r: Likewise. * testsuite/ld-powerpc/tlsso32.r: Likewise. * testsuite/ld-powerpc/tlstocso.r: Likewise. * testsuite/ld-s390/tlsbin.rd: Likewise. * testsuite/ld-s390/tlsbin_64.rd: Likewise. * testsuite/ld-s390/tlspic.rd: Likewise. * testsuite/ld-s390/tlspic_64.rd: Likewise. * testsuite/ld-sh/sh64/crange1.rd: Likewise. * testsuite/ld-sh/sh64/crange2.rd: Likewise. * testsuite/ld-sh/sh64/crange3-cmpct.rd: Likewise. * testsuite/ld-sh/sh64/crange3-media.rd: Likewise. * testsuite/ld-sh/sh64/crange3.rd: Likewise. * testsuite/ld-sh/sh64/crangerel1.rd: Likewise. * testsuite/ld-sh/sh64/crangerel2.rd: Likewise. * testsuite/ld-sh/tlsbin-2.d: Likewise. * testsuite/ld-sh/tlspic-2.d: Likewise. * testsuite/ld-sparc/gotop32.rd: Likewise. * testsuite/ld-sparc/gotop64.rd: Likewise. * testsuite/ld-sparc/tlssunbin32.rd: Likewise. * testsuite/ld-sparc/tlssunbin64.rd: Likewise. * testsuite/ld-sparc/tlssunnopic32.rd: Likewise. * testsuite/ld-sparc/tlssunnopic64.rd: Likewise. * testsuite/ld-sparc/tlssunpic32.rd: Likewise. * testsuite/ld-sparc/tlssunpic64.rd: Likewise. * testsuite/ld-tic6x/common.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. * testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise. * testsuite/ld-x86-64/ilp32-4.d: Likewise. * testsuite/ld-x86-64/nogot1.d: Likewise. * testsuite/ld-x86-64/pr12718.d: Likewise. * testsuite/ld-x86-64/pr12921.d: Likewise. * testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise. * testsuite/ld-x86-64/split-by-file.rd: Likewise. * testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbin2.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise. * testsuite/ld-x86-64/tlspic2.rd: Likewise. * testsuite/ld-xtensa/tlsbin.rd: Likewise. * testsuite/ld-xtensa/tlspic.rd: Likewise.
2016-08-11PR ld/15428: MIPS/LD/testsuite: Un-KFAIL `__ehdr_start' test 2Maciej W. Rozycki1-3/+0
Complement commit b75d42bce560 ("Fix mips segfault on GOT access of absolute symbol") and unmark the `__ehdr_start' test 2 as known to fail for the n32 and n64 ABIs, as with the change referred in place the causing issue has been properly addressed and consequently the tests do not fail anymore and neither are supposed to. ld/ PR ld/15428 * testsuite/ld-mips-elf/mips-elf.exp: Un-KFAIL `__ehdr_start' test 2.
2016-08-10MIPS/LD/testsuite: Verify microMIPS LA25 stub generationMaciej W. Rozycki7-0/+182
Repeat `PIC and non-PIC test 1' checks for microMIPS LA25 stubs, covering code generation and stub symbol annotation. ld/ * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips-rel.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-micromips.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1a-micromips.s: New test source. * testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-27MIPS/GAS: Implement microMIPS branch/jump compactionMaciej W. Rozycki2-16/+10
Convert microMIPS branches and jumps whose delay slot would be filled by a generated NOP instruction to the corresponding compact form where one exists, in a manner similar to MIPS16 JR->JRC and JALR->JALRC swap. Do so even where the transformation switches from a 16-bit to a 32-bit branch encoding for no benefit in code size reduction, as this is still advantageous. This is because a branch/NOP pair takes 2 pipeline slots or a 2-cycle completion latency except in superscalar implementations. Whereas a compact branch may or may not stall on its target fetch, so it will at most have a 2-cycle completion latency and may have only 1 even in scalar implementations, and in superscalar implementations it is expected to have no worse latency as a branch/NOP pair has. Also it won't stall and therefore take the extra latency cycle in the not-taken case. Technically this is the same as MIPS16 compaction: for the qualifying instruction encodings the APPEND_ADD_COMPACT machine code generation method is selected where APPEND_ADD_WITH_NOP otherwise would and tells the code generator in `append_insn' to convert the regular form of an instruction to its corresponding compact form. For this the opcode is tweaked as necessary and the microMIPS opcode table is scanned for the matching updated instruction. A non-$0 `rt' operand to BEQ and BNE instructions is moved to the `rs' operand field of BEQZC and BNEZC encodings as required. Unlike with MIPS16 compaction however we need to handle out-of-distance branch relaxation as well. We do this by deferring the generation of any delay-slot NOP required to relaxation made in `md_convert_frag', by converting the APPEND_ADD_WITH_NOP machine code generation to APPEND_ADD where a relaxed instruction is recorded. Relaxation then, depending on actual code produced, chooses between either using a compact branch or jump encoding and emitting the NOP outstanding if no compact encoding is possible. For code simplicity's sake the relaxation pass is retained even if the principle of preferring a compact encoding to a 16-bit branch/NOP pair means, in the absence of out-of-range branch relaxation, that a single compact branch machine code instruction will eventually be produced from a given assembly source instruction. gas/ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16) (RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16) (RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32) (RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits. (get_append_method): Also return APPEND_ADD_COMPACT for microMIPS instructions. (find_altered_mips16_opcode): Exclude macros from matching. Factor code out... (find_altered_opcode): ... to this new function. (find_altered_micromips_opcode): New function. (frag_branch_delay_slot_size): Likewise. (append_insn): Handle microMIPS branch/jump compaction. (macro_start): Likewise. (relaxed_micromips_32bit_branch_length): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/micromips.s: Add conditional explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-size-1.s: Likewise. * testsuite/gas/mips/micromips.l: Adjust line numbers. * testsuite/gas/mips/micromips-warn.l: Likewise. * testsuite/gas/mips/micromips-size-1.l: Likewise. * testsuite/gas/mips/micromips.d: Adjust padding. * testsuite/gas/mips/micromips-trap.d: Likewise. * testsuite/gas/mips/micromips-insn32.d: Likewise. * testsuite/gas/mips/micromips-noinsn32.d: Likewise. * testsuite/gas/mips/micromips@beq.d: Update patterns for branch/jump compaction. * testsuite/gas/mips/micromips@bge.d: Likewise. * testsuite/gas/mips/micromips@bgeu.d: Likewise. * testsuite/gas/mips/micromips@blt.d: Likewise. * testsuite/gas/mips/micromips@bltu.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: Likewise. * testsuite/gas/mips/micromips@loc-swap.d: Likewise. * testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise. * testsuite/gas/mips/micromips@relax.d: Likewise. * testsuite/gas/mips/micromips@relax-at.d: Likewise. * testsuite/gas/mips/micromips@relax-swap3.d: Likewise. * testsuite/gas/mips/branch-extern-2.d: Likewise. * testsuite/gas/mips/branch-extern-4.d: Likewise. * testsuite/gas/mips/branch-section-2.d: Likewise. * testsuite/gas/mips/branch-section-4.d: Likewise. * testsuite/gas/mips/branch-weak-2.d: Likewise. * testsuite/gas/mips/branch-weak-5.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/micromips-compact.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. ld/ * testsuite/ld-mips-elf/micromips-branch-absolute.d: Update patterns for branch compaction. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b", "beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to "j".
2016-07-26MIPS/BFD: Handle branches in PLT compression selectionMaciej W. Rozycki14-24/+520
Complement: commit 1bbce132647e6d72aaa065cce5c1d5dd6585c2b2 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Jun 24 23:55:46 2013 +0000 <https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS: Compressed PLT/stubs support"), and also choose between regular and compressed PLT entries as appropriate for any branches referring. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): Handle branches in PLT compression selection. (_bfd_mips_elf_check_relocs): Likewise. ld/ * testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support. * testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise. * testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise. * testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od: New test. * testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19MIPS: Convert cross-mode BAL to JALXMaciej W. Rozycki22-102/+278
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX, similarly to how JAL instructions are converted. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode BAL to JALX. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a corresponding error message. gas/ * config/tc-mips.c (mips_force_relocation, mips_fix_adjustable): Adjust comments for BAL to JALX linker conversion. (fix_bad_cross_mode_branch_p): Accept cross-mode BAL. * testsuite/gas/mips/unaligned-branch-1.l: Update error messages expected. * testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise. * testsuite/gas/mips/branch-local-4.d: New test. * testsuite/gas/mips/branch-local-n32-4.d: New test. * testsuite/gas/mips/branch-local-n64-4.d: New test. * testsuite/gas/mips/branch-addend.d: New test. * testsuite/gas/mips/branch-addend-n32.d: New test. * testsuite/gas/mips/branch-addend-n64.d: New test. * testsuite/gas/mips/branch-local-4.s: New test source. * testsuite/gas/mips/branch-addend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/unaligned-branch-2.d: Update error messages expected. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend.d: New test. * testsuite/ld-mips-elf/bal-jalx-local.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test. * testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test. * testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19MIPS: Verify the ISA mode and alignment of branch and jump targetsMaciej W. Rozycki17-42/+898
Verify that the ISA mode of branch targets is the same as the referring relocation, so that an attempt to produce a branch between instructions encoded in different ISA modes each causes an error rather than silently producing non-functional code. Make sure that no symbol or addend bits are silently truncated: terminate with an error if the relocation value calculated cannot be encoded in the relocatable field of a branch; for REL targets also applying to any intermediate addend. Also make jump target's alignment verification consistent with that for branches. This change will require an update to some obscure handcoded assembly sources which make branches to labels placed at data objects, however for microMIPS code only. These labels will have to be updated with the `.insn' directive for containing code to assemble and link successfully. Such code is broken as any such labels have always been required by the microMIPS architecture specification[1][2] to be annotated this way for correct interpretation, and with our old code missing `.insn' directives caused labels to present different semantics depending on whether they were referred with branch (ISA bit ignored) or other relocations (ISA bit respected). Enforcing these checks however will ensure errors in building software, like mixed regular MIPS and microMIPS code links with branches between, will be diagnosed at the build time rather than causing odd run-time errors such as intermittent crashes. It will also let cross-mode BAL instructions be converted to JALX instructions, with a separate change. References: [1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level Compatibility", p. 533 [2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level Compatibility", p. 623 bfd/ * elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1. (branch_reloc_p): New function. (mips_elf_calculate_relocation): Handle ISA mode determination for relocations against section symbols, against absolute symbols and absolute relocations. Also set `*cross_mode_jump_p' for branches. <R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment checks for weak undefined symbols. Also check target alignment within the same ISA mode. <R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches in the alignment check. <R_MICROMIPS_PC7_S1>: Add an alignment check. <R_MICROMIPS_PC10_S1>: Likewise. <R_MICROMIPS_PC16_S1>: Likewise. (mips_elf_perform_relocation): Report a failure for unsupported same-mode JALX instructions and cross-mode branches. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add error messages for jumps to misaligned addresses. gas/ * config/tc-mips.c (mips_force_relocation): Also retain branch relocations against MIPS16 and microMIPS symbols. (fix_bad_cross_mode_jump_p): New function. (fix_bad_same_mode_jalx_p): Likewise. (fix_bad_misaligned_jump_p): Likewise. (fix_bad_cross_mode_branch_p): Likewise. (fix_bad_misaligned_branch_p): Likewise. (fix_validate_branch): Likewise. (md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP> <BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5, etc. Verify the ISA mode and alignment of the jump target. <BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check with a call to `fix_validate_branch'. <BFD_RELOC_MIPS_26_PCREL_S2>: Likewise. <BFD_RELOC_16_PCREL_S2>: Likewise. <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend. Verify the ISA mode and alignment of the branch target. (md_convert_frag): Verify the ISA mode and alignment of resolved MIPS16 branch targets. * testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction branch targets with `.insn'. * testsuite/gas/mips/branch-misc-5.s: Likewise. * testsuite/gas/mips/micromips@branch-misc-5-64.d: Update accordingly. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise. * testsuite/gas/mips/micromips-branch-relax.s: Annotate non-instruction branch target with `.insn'. * testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets with external symbols. * testsuite/gas/mips/micromips-insn32.d: Update accordingly. * testsuite/gas/mips/micromips-noinsn32.d: Likewise. * testsuite/gas/mips/micromips-trap.d: Likewise. * testsuite/gas/mips/micromips.d: Likewise. * testsuite/gas/mips/mips16.s: Annotate non-instruction branch targets with `.insn'. * testsuite/gas/mips/mips16.d: Update accordingly. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction branch target with `.insn'. * testsuite/gas/mips/relax-swap3.s: Likewise. * testsuite/gas/mips/branch-local-2.l: New list test. * testsuite/gas/mips/branch-local-3.l: New list test. * testsuite/gas/mips/branch-local-n32-2.l: New list test. * testsuite/gas/mips/branch-local-n32-3.l: New list test. * testsuite/gas/mips/branch-local-n64-2.l: New list test. * testsuite/gas/mips/branch-local-n64-3.l: New list test. * testsuite/gas/mips/unaligned-jump-1.l: New list test. * testsuite/gas/mips/unaligned-jump-2.l: New list test. * testsuite/gas/mips/unaligned-jump-3.d: New test. * testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test. * testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test. * testsuite/gas/mips/unaligned-jump-mips16-3.d: New test. * testsuite/gas/mips/unaligned-jump-micromips-1.l: New list test. * testsuite/gas/mips/unaligned-jump-micromips-2.l: New list test. * testsuite/gas/mips/unaligned-jump-micromips-3.d: New test. * testsuite/gas/mips/unaligned-branch-1.l: New list test. * testsuite/gas/mips/unaligned-branch-2.l: New list test. * testsuite/gas/mips/unaligned-branch-3.d: New test. * testsuite/gas/mips/unaligned-branch-r6-1.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-2.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-3.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-4.l: New list test. * testsuite/gas/mips/unaligned-branch-r6-5.d: New test. * testsuite/gas/mips/unaligned-branch-r6-6.d: New test. * testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test. * testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test. * testsuite/gas/mips/unaligned-branch-mips16-3.d: New test. * testsuite/gas/mips/unaligned-branch-micromips-1.l: New list test. * testsuite/gas/mips/unaligned-branch-micromips-2.l: New list test. * testsuite/gas/mips/unaligned-branch-micromips-3.d: New test. * testsuite/gas/mips/branch-local-2.s: New test source. * testsuite/gas/mips/branch-local-3.s: New test source. * testsuite/gas/mips/branch-local-n32-2.s: New test source. * testsuite/gas/mips/branch-local-n32-3.s: New test source. * testsuite/gas/mips/branch-local-n64-2.s: New test source. * testsuite/gas/mips/branch-local-n64-3.s: New test source. * testsuite/gas/mips/unaligned-jump-1.s: New test source. * testsuite/gas/mips/unaligned-jump-2.s: New test source. * testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source. * testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source. * testsuite/gas/mips/unaligned-jump-micromips-1.s: New test source. * testsuite/gas/mips/unaligned-jump-micromips-2.s: New test source. * testsuite/gas/mips/unaligned-branch-1.s: New test source. * testsuite/gas/mips/unaligned-branch-2.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-1.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-2.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-3.s: New test source. * testsuite/gas/mips/unaligned-branch-r6-4.s: New test source. * testsuite/gas/mips/unaligned-branch-mips16-1.s: New test source. * testsuite/gas/mips/unaligned-branch-mips16-2.s: New test source. * testsuite/gas/mips/unaligned-branch-micromips-1.s: New test source. * testsuite/gas/mips/unaligned-branch-micromips-2.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message expected. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps, microMIPS BAL and MIPS16 instructions. * testsuite/ld-mips-elf/undefweak-overflow.d: Update accordingly. * testsuite/ld-mips-elf/unaligned-branch-2.d: New test. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test. * testsuite/ld-mips-elf/unaligned-jump.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-14MIPS/GAS: Don't convert PC-relative REL relocs against absolute symbolsMaciej W. Rozycki1-0/+6
Don't convert PC-relative REL relocations against absolute symbols to section-relative references and retain the original symbol reference instead. Offsets into the absolute section may overflow the limited range of their in-place addend field, causing an assembly error, e.g.: $ cat test.s .text .globl foo .ent foo foo: b bar .end foo .set bar, 0x12345678 $ as -EB -32 -o test.o test.s test.s: Assembler messages: test.s:3: Error: relocation overflow $ With the original reference retained the source can now be assembled and linked successfully: $ as -EB -32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000ffff b 0 <foo> 0: R_MIPS_PC16 bar 4: 00000000 nop ... $ ld -melf32btsmip -Ttext 0x12340000 -e foo -o test test.o $ objdump -dr test test: file format elf32-tradbigmips Disassembly of section .text: 12340000 <foo>: 12340000: 1000159d b 12345678 <bar> 12340004: 00000000 nop ... $ For simplicity always retain the original symbol reference, even if it would indeed fit. Making TC_FORCE_RELOCATION_ABS separate from TC_FORCE_RELOCATION causes R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 branch relocations against absolute symbols to be converted on RELA targets to section-relative references. This is an intended effect of this change. Absolute symbols carry no ISA annotation in their `st_other' field and their value is not going to change with linker relaxation, so it is safe to discard the original reference and keep the calculated final symbol value only in the relocation's addend. Similarly R6 R_MIPS_PCHI16 and R_MIPS_PCLO16 relocations referring absolute symbols can be safely converted even on REL targets, as there the in-place addend of these relocations covers the entire 32-bit address space so it can hold the calculated final symbol value, and likewise the value referred won't be affected by any linker relaxation. Add a set of suitable test cases and enable REL linker tests which now work and were previously used as dump patterns for RELA tests only. gas/ * config/tc-mips.h (TC_FORCE_RELOCATION_ABS): New macro. (mips_force_relocation_abs): New prototype. * config/tc-mips.c (mips_force_relocation_abs): New function. * testsuite/gas/mips/branch-absolute.d: Adjust dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/branch-absolute-addend.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips-elf.exp: Run `branch-absolute-addend', `mips16-branch-absolute', `mips16-branch-absolute-addend' and `micromips-branch-absolute-addend'.
2016-07-14MIPS/GAS: Keep the ISA bit in the addend of branch relocationsMaciej W. Rozycki7-0/+68
Correct a problem with the ISA bit being stripped from the addend of compressed branch relocations, affecting RELA targets. It has been there since microMIPS support has been added, with: commit df58fc944dbc6d5efd8d3826241b64b6af22f447 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Sun Jul 24 14:20:15 2011 +0000 <https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS: microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 relocations originally affected, and the R_MIPS16_PC16_S1 relocation recently added with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually triggering a linker error, due to its heightened processing strictness level: $ cat test.s .text .set mips16 foo: b bar .set bar, 0x1235 .align 4, 0 $ as -EB -n32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 *ABS*+0x1230 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o test.o: In function `foo': (.text+0x0): Branch to a non-instruction-aligned address $ This is because the ISA bit of the branch target does not match the ISA bit of the referring branch, hardwired to 1 of course. Retain the ISA bit then, so that the linker knows this is really MIPS16 code referred: $ objdump -dr fixed.o fixed.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 *ABS*+0x1231 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o $ Add a set of MIPS16 tests to cover the relevant cases, excluding linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. gas/ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1> <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the addend calculated. * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit in `bar', export `foo'. * testsuite/gas/mips/mips16-branch-absolute.d: Adjust accordingly. * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: Likewise. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `mips16-branch-absolute' and `mips16-branch-absolute-addend', referred indirectly only.
2016-07-14BFD: Let targets handle relocations against absolute symbolsMaciej W. Rozycki13-0/+155
Fix a generic BFD issue with relocations against absolute symbols, which are installed without using any individual relocation handler provided by the backend. This causes any absolute section's addend to be lost on REL targets such as o32 MIPS, and also relocation-specific calculation adjustments are not made. As an example assembling this program: $ cat test.s .text foo: b bar b baz .set bar, 0x1234 $ as -EB -32 -o test-o32.o test.s $ as -EB -n32 -o test-n32.o test.s produces this binary code: $ objdump -dr test-o32.o test-n32.o test-o32.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 10000000 b 4 <foo+0x4> 0: R_MIPS_PC16 *ABS* 4: 00000000 nop 8: 1000ffff b 8 <foo+0x8> 8: R_MIPS_PC16 baz c: 00000000 nop test-n32.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: 10000000 b 4 <foo+0x4> 0: R_MIPS_PC16 *ABS*+0x1230 4: 00000000 nop 8: 10000000 b c <foo+0xc> 8: R_MIPS_PC16 baz-0x4 c: 00000000 nop $ where it is clearly visible in `test-o32.o', which uses REL relocations, that the absolute section's addend equivalent to the value of `bar' -- a reference to which cannot be fully resolved at the assembly time, because the reference is PC-relative -- has been lost, as has been the relocation-specific adjustment of -4, required to take into account the PC+4-relative calculation made by hardware with branches and seen in the external symbol reference to `baz' as the `ffff' addend encoded in the instruction word. In `test-n32.o', which uses RELA relocations, the absolute section's addend has been correctly retained. Give precedence then in `bfd_perform_relocation' and `bfd_install_relocation' to any individual relocation handler the backend selected may have provided, while still resorting to the generic calculation otherwise. This retains the semantics which we've had since forever or before the beginning of our repository history, and is at the very least compatible with `bfd_elf_generic_reloc' being used as the handler. Retain the `bfd_is_und_section' check unchanged at the beginning of `bfd_perform_relocation' since this does not affect the semantics of the function. The check returns the same `bfd_reloc_undefined' code the check for a null `howto' does, so swapping the two does not matter. Also the check is is mutually exclusive with the `bfd_is_abs_section' check, since a section cannot be absolute and undefined both at once, so swapping the two does not matter either. With this change applied the program quoted above now has the in-place addend correctly calculated and installed in the field being relocated: $ objdump -dr fixed-o32.o fixed-o32.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <foo>: 0: 1000048c b 1234 <bar> 0: R_MIPS_PC16 *ABS* 4: 00000000 nop 8: 1000ffff b 8 <foo+0x8> 8: R_MIPS_PC16 baz c: 00000000 nop $ Add a set of MIPS tests to cover the relevant cases, including absolute symbols with addends, and verifying that PC-relative relocations against symbols concerned resolve to the same value in the final link regardless of whether the REL or the RELA relocation form is used. Exclude linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. bfd/ * reloc.c (bfd_perform_relocation): Try the `howto' handler first with relocations against absolute symbols. (bfd_install_relocation): Likewise. gas/ * testsuite/gas/mips/mips16-branch-absolute.d: Update patterns. * testsuite/gas/mips/branch-absolute.d: New test. * testsuite/gas/mips/branch-absolute-n32.d: New test. * testsuite/gas/mips/branch-absolute-n64.d: New test. * testsuite/gas/mips/branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/micromips-branch-absolute.d: New test. * testsuite/gas/mips/micromips-branch-absolute-n32.d: New test. * testsuite/gas/mips/micromips-branch-absolute-n64.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New test. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New test. * testsuite/gas/mips/branch-absolute.s: New test source. * testsuite/gas/mips/branch-absolute-addend.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-addend.s: New test source. * testsuite/gas/mips/micromips-branch-absolute.s: New test source. * testsuite/gas/mips/micromips-branch-absolute-addend.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/branch-absolute.d: New test. * testsuite/ld-mips-elf/branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `branch-absolute-addend' and `micromips-branch-absolute-addend', referred indirectly only.
2016-07-02MIPS/LD/testsuite: Resurrect `branch-misc-2' testMaciej W. Rozycki2-0/+31
Revert: commit c9c1e416d7dd1a35bd7c1a96d034dca1d5071cd1 Author: Alexandre Oliva <aoliva@redhat.com> Date: Thu Dec 12 04:39:44 2002 +0000 <https://sourceware.org/ml/binutils/2002-11/msg00657.html>, ("mips: branches to external labels are broken"), complementing: commit bad36eacdad37042c4efb1c5fbf48476b47de82b Author: Daniel Jacobowitz <drow@false.org> Date: Wed Nov 23 14:04:18 2005 +0000 <https://sourceware.org/ml/binutils/2005-11/msg00324.html>, ("R_MIPS_PC16, again"). ld/ * testsuite/ld-mips-elf/branch-misc-2.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run it.
2016-06-28MIPS/LD/testsuite: Accept any UNIX OS/ABI with GNU attribute testsMaciej W. Rozycki4-4/+4
Remove failures with FreeBSD targets, e.g: regexp_diff match failure regexp "^ OS/ABI: UNIX - System V$" line " OS/ABI: UNIX - FreeBSD" FAIL: ld-mips-elf/attr-gnu-4-50 introduced with commit 351cdf24d223 ("[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions"). ld/ * testsuite/ld-mips-elf/attr-gnu-4-10.d: Match any UNIX OS/ABI. * testsuite/ld-mips-elf/attr-gnu-4-50.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-60.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-70.d: Likewise.
2016-06-28MIPS16: Add R_MIPS16_PC16_S1 branch relocation supportMaciej W. Rozycki6-0/+98
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1' and the usual MIPS16 bit shuffling applies to relocated field handling, as per the encoding of the branch target in the extended form of the MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions. include/ * elf/mips.h (R_MIPS16_PC16_S1): New relocation. bfd/ * elf32-mips.c (elf_mips16_howto_table_rel): Add R_MIPS16_PC16_S1. (mips16_reloc_map): Likewise. * elf64-mips.c (mips16_elf64_howto_table_rel): Likewise. (mips16_elf64_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfn32-mips.c (elf_mips16_howto_table_rel): Likewise. (elf_mips16_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfxx-mips.c (mips16_branch_reloc_p): New function. (mips16_reloc_p): Handle R_MIPS16_PC16_S1. (b_reloc_p): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_check_relocs): Likewise. * reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-mips.c (mips16_reloc_p): Handle BFD_RELOC_MIPS16_16_PCREL_S1. (b_reloc_p): Likewise. (limited_pcrel_reloc_p): Likewise. (md_pcrel_from): Likewise. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. (md_convert_frag): Likewise. (mips_fix_adjustable): Update comment. * testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file. * testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-3.l: Remove file. * testsuite/gas/mips/mips16-branch-absolute.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.s: Add padding. * testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid implicit instruction padding, avoid MIPS16 JR->JRC conversion. * testsuite/gas/mips/branch-weak-6.d: New test. * testsuite/gas/mips/branch-weak-7.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-branch-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-3.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test. * testsuite/ld-mips-elf/mips16-branch.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-23MIPS/LD/testsuite: Use wildcard address matching in `undefweak-overflow'Maciej W. Rozycki1-20/+20
So that test case updates result in legible dump pattern changes. ld/ * testsuite/ld-mips-elf/undefweak-overflow.d: Use wildcard address matching.
2016-06-23MIPS/LD/testsuite: Uniquely identify `undefweak-overflow' testsMaciej W. Rozycki1-2/+4
ld/ * testsuite/ld-mips-elf/mips-elf.exp: Uniquely identify `undefweak-overflow' tests.
2016-06-21MIPS/BFD: Don't stop processing on a cross-mode jump conversion errorMaciej W. Rozycki2-1/+7
As with commit ed53407eec9e ("MIPS/BFD: Don't stop processing on `bfd_reloc_outofrange'") don't bail out right away and instead continue processing on a cross-mode jump conversion error, so that any further issues are also reported. Adjust message formatting accordingly, using `%X' to abort processing at conclusion. Remove the full stop from the end of the message, for consistency across error reporting. Adjust the corresponding test case accordingly and make it trigger the error twice. bfd/ * elfxx-mips.c (mips_elf_perform_relocation): Call `info->callbacks->einfo' rather than `*_bfd_error_handler' and use the `%X%H' format for the cross-mode jump conversion error message. Remove the full stop from the end of the message. Continue processing rather than returning failure. ld/ * testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error twice rather than once. * testsuite/ld-mips-elf/mode-change-error-1.d: Adjust accordingly. Remove the full stop from the end of the message.
2016-05-28MIPS/BFD: Correctly handle `bfd_reloc_outofrange' with branchesMaciej W. Rozycki4-0/+61
Fix internal errors like: ld: BFD (GNU Binutils) 2.26.51.20160526 internal error, aborting at .../bfd/elfxx-mips.c:10278 in _bfd_mips_elf_relocate_section ld: Please report this bug. triggered by the `bfd_reloc_outofrange' condition on branch relocations. bfd/ * elfxx-mips.c (b_reloc_p): New function. (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Handle branch relocations. ld/ * testsuite/ld-mips-elf/unaligned-branch.d: New test. * testsuite/ld-mips-elf/unaligned-branch.s: New test source. * testsuite/ld-mips-elf/unaligned-text.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2016-05-28MIPS/LD/testsuite: Rename `unaligned-syms' to `unaligned-data'Maciej W. Rozycki5-4/+4
ld/ * testsuite/ld-mips-elf/unaligned-syms.s: Rename to... * testsuite/ld-mips-elf/unaligned-data.s: ... this. * testsuite/ld-mips-elf/unaligned-ldpc-0.d: Adjust accordingly. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise.
2016-05-28MIPS/BFD: Enable local R_MIPS_26 overflow detectionMaciej W. Rozycki7-0/+120
The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26 relocation in a complex way, as follows[1]: Name Value Field Symbol Calculation R_MIPS_26 4 T-targ26 local (((A << 2) | \ (P & 0xf0000000)) + S) >> 2 4 T-targ26 external (sign-extend(A << 2) + S) >> 2 This is further clarified, by correcting typos (already applied in the excerpt above) in the 64-bit psABI extension[2]. A note is included in both documents to specify that for the purpose of relocation processing a local symbol is one with binding STB_LOCAL and type STT_SECTION, and otherwise, a symbol is external. We have both calculations implemented for the R_MIPS_26 relocation, and by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations, from now on collectively called jump relocations. However our code uses a different condition to tell local and external symbols apart, that is it only checks for the STB_LOCAL binding and ignores the symbol type, however for REL relocations only. The external calculation is used for all RELA jump relocations. In reality the difference matters for jump relocations referring local MIPS16 and, as from recent commit 44d3da233815 ("MIPS/GAS: Treat local jump relocs the same no matter if REL or RELA"), also local microMIPS symbols. Such relocations are not converted to refer to corresponding section symbols instead and retain the original local symbol reference. It can be inferred from the relocation calculation definitions that the addend is effectively unsigned for the local case and explicitly signed for the external case. With the REL relocation format it makes sense given the limited range provided for by the field being relocated: the use of an unsigned addend expands the range by one bit for the local case, because a negative offset from a section symbol makes no sense, and any usable negative offset from the original local symbol will have worked out positive if converted to a section-relative reference. In the external case a signed addend gives more flexibility as offsets both negative and positive can be used with a symbol. Any such offsets will typically have a small value. The inclusion of the (P & 0xf0000000) component, ORed in the calculation in the local case, seems questionable as bits 31:28 are not included in the relocatable field and are masked out as the relocation is applied. Their value is therefore irrelevant for output processing, the relocated field ends up the same regardless of their value. They could be used for overflow detection, however this is precluded by adding them to bits 31:28 of the symbol referred, as the sum will not correspond to the value calculated by the processor at run time whenever bits 31:28 of the symbol referred are not all zeros, even though it is valid as long they are the same as bits 31:28 of P. We deal with this problem by ignoring any overflow resulting from the local calculation. This however makes us miss genuine overflow cases, where 31:28 of the symbol referred are different from bits 31:28 of P, and non-functional code is produced. Given the situation, for the purpose of overflow detection we can change our code to follow the original psABI and only treat the in-place addend as unsigned in the section symbol case, permitting jumps to offsets 128MiB and above into section. Sections so large may be uncommon, but still a reasonable use case. On the other hand such large offsets from regular local symbols are not expected and it makes sense to support (possibly small) negative offsets instead, also in consistency with what we do for global symbols. Drop the (P & 0xf0000000) component then, treat the addend as signed with local non-section symbols and also detect an overflow in the result of such calculation with local symbols. NB it does not affect the value computed for the relocatable field, it only affects overflow detection. References: [1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19 <http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf> [2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32 "Relocation Types", p. 45 <http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf> bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the reloc location from calculation, treat the addend as signed with local non-section symbols and enable overflow detection. ld/ * testsuite/ld-mips-elf/jal-global-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-global-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-global-overflow.s: New test source. * testsuite/ld-mips-elf/jal-local-overflow.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-27MIPS/BFD: Include the addend in JALX's target alignment verificationMaciej W. Rozycki9-0/+221
On RELA targets the addend can affect JALX target's alignment, so only verify it once the whole relocation calculation has completed. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's target alignment verification. ld/ * testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-27MIPS/BFD: Fix section symbol name fetching in relocationMaciej W. Rozycki3-0/+17
Symbol table entries for section symbols are different between IRIX and traditional MIPS ELF targets in that IRIX entries have their `st_name' member pointing at the section's name in the string table section, while traditional entries have 0 there and the section header string table has to be referred via the relevant section header's `shn_name' member instead. This is chosen with the `elf_backend_name_local_section_symbols' backend and can be observed with `readelf -s' output for an IRIX object: Symbol table '.symtab' contains 12 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 SECTION LOCAL DEFAULT 1 .text 2: 00000000 0 SECTION LOCAL DEFAULT 3 .data 3: 00000000 0 SECTION LOCAL DEFAULT 4 .bss 4: 00000000 0 SECTION LOCAL DEFAULT 5 .reginfo 5: 00000000 0 SECTION LOCAL DEFAULT 6 .MIPS.abiflags 6: 00000000 0 SECTION LOCAL DEFAULT 7 .pdr 7: 00000000 0 SECTION LOCAL DEFAULT 9 .gnu.attributes 8: 00002000 16 FUNC GLOBAL DEFAULT 1 foo 9: 00004008 0 FUNC LOCAL DEFAULT 1 abar 10: 00002008 0 FUNC LOCAL DEFAULT 1 afoo 11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar and a corresponding traditional object: Symbol table '.symtab' contains 12 entries: Num: Value Size Type Bind Vis Ndx Name 0: 00000000 0 NOTYPE LOCAL DEFAULT UND 1: 00000000 0 SECTION LOCAL DEFAULT 1 2: 00000000 0 SECTION LOCAL DEFAULT 3 3: 00000000 0 SECTION LOCAL DEFAULT 4 4: 00004008 0 FUNC LOCAL DEFAULT 1 abar 5: 00002008 0 FUNC LOCAL DEFAULT 1 afoo 6: 00000000 0 SECTION LOCAL DEFAULT 5 7: 00000000 0 SECTION LOCAL DEFAULT 6 8: 00000000 0 SECTION LOCAL DEFAULT 7 9: 00000000 0 SECTION LOCAL DEFAULT 9 10: 00002000 16 FUNC GLOBAL DEFAULT 1 foo 11: 00004000 16 FUNC GLOBAL DEFAULT 1 bar respectively. Consequently the right way to retrieve a section symbol's name has to be chosen in `mips_elf_calculate_relocation' for the purpose of error reporting. Originally we produced symbol tables in the traditional object format only and we handled it correctly until it was lost in a rewrite with: commit 7403cb6305f5660fccc8869d3333a731102ae978 Author: Mark Mitchell <mark@codesourcery.com> Date: Wed Jun 30 20:13:43 1999 +0000 probably because of the extra pointer indirection added which made the same expression have a different meaning. With the addition of IRIX symbol table format with: commit 174fd7f9556183397625dbfa99ef68ecd325c74b Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Mon Feb 9 08:04:00 2004 +0000 the bug has been partially covered and now when a relocation error is triggered with an IRIX object the offending section symbol is correctly reported: tmpdir/dump0.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `.text' tmpdir/dump0.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `.text' because `bfd_elf_string_from_elf_section' retrieves the name from the string table section. With a traditional object however the function returns an empty string and consequently `no symbol' is printed instead: tmpdir/dump0.o: In function `foo': (.text+0x2000): relocation truncated to fit: R_MIPS_26 against `no symbol' tmpdir/dump0.o: In function `bar': (.text+0x4000): relocation truncated to fit: R_MIPS_26 against `no symbol' Restore the original semantics so that the section name is always correctly retrieved. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): Also use the section name if `bfd_elf_string_from_elf_section' returns an empty string. ld/ * testsuite/ld-mips-elf/reloc-local-overflow.d: New test. * testsuite/ld-mips-elf/reloc-local-overflow.s: Source for the new test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2016-05-26MIPS/BFD: Don't stop processing on `bfd_reloc_outofrange'Maciej W. Rozycki30-193/+23
Upon a `bfd_reloc_outofrange' error continue processing so that any further issues are also reported, similarly to how `bfd_reloc_overflow' is handled. Adjust message formatting accordingly, using `%X' to abort processing at conclusion. Reduce the number of test cases by grouping relocations the handling of which can now be verified together with a single source and dump. bfd/ * elfxx-mips.c (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Use the `%X%H' rather than `%C' format for message. Continue processing rather than returning failure. ld/ * testsuite/ld-mips-elf/unaligned-jalx-0.d: Fold `unaligned-jalx-2' here. * testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: Fold `unaligned-jalx-mips16-2' here. * testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: Fold `unaligned-jalx-micromips-2' here. * testsuite/ld-mips-elf/unaligned-jalx-0.s: Update accordingly. * testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message. * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-2.d: Remove test. * testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: Remove test. * testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: Remove test. * testsuite/ld-mips-elf/unaligned-jalx-2.s: Remove test source. * testsuite/ld-mips-elf/unaligned-lwpc-0.d: Fold `unaligned-lwpc-3' here. * testsuite/ld-mips-elf/unaligned-lwpc-0.s: Update accordingly. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Fold `unaligned-lwpc-2' here. * testsuite/ld-mips-elf/unaligned-lwpc-1.s: Update accordingly. * testsuite/ld-mips-elf/unaligned-lwpc-2.d: Remove test. * testsuite/ld-mips-elf/unaligned-lwpc-2.s: Remove test source. * testsuite/ld-mips-elf/unaligned-lwpc-3.d: Remove test. * testsuite/ld-mips-elf/unaligned-lwpc-3.s: Remove test source. * testsuite/ld-mips-elf/unaligned-ldpc-0.d: Fold `unaligned-ldpc-4' here. * testsuite/ld-mips-elf/unaligned-ldpc-0.s: Update accordingly. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Update error message. Fold `unaligned-ldpc-2' and `unaligned-ldpc-3' here. * testsuite/ld-mips-elf/unaligned-ldpc-1.s: Update accordingly. * testsuite/ld-mips-elf/unaligned-ldpc-2.d: Remove test. * testsuite/ld-mips-elf/unaligned-ldpc-2.s: Remove test source. * testsuite/ld-mips-elf/unaligned-ldpc-3.d: Remove test. * testsuite/ld-mips-elf/unaligned-ldpc-3.s: Remove test source. * testsuite/ld-mips-elf/unaligned-ldpc-4.d: Remove test. * testsuite/ld-mips-elf/unaligned-ldpc-4.s: Remove test source. * testsuite/ld-mips-elf/mips-elf.exp: Delete removed tests.
2016-05-25MIPS/BFD: Report `bfd_reloc_outofrange' errors as suchMaciej W. Rozycki33-0/+420
A `bfd_reloc_outofrange' condition from `mips_elf_calculate_relocation' currently triggers the warning callback, which in the case of LD prints messages like: foo.o: In function `foo': (.text+0x0): warning: JALX to a non-word-aligned address or: foo.o: In function `foo': (.text+0x0): warning: PC-relative load from unaligned address and nothing else, which suggests this is a benign condition and link has otherwise successfully run to completion. This is however not the case, the link terminates right away with no further messages and no output produced. Use the general error or warning info callback then, preserving the message format. Also set a BFD error condition so that a failure is unambiguously reported. Complement the change with a set of suitable test suite additions. bfd/ * elfxx-mips.c (_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Call `->einfo' rather than `->warning'. Call `bfd_set_error'. ld/ * testsuite/ld-mips-elf/unaligned-jalx-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-mips16-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-mips16-2.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-micromips-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-micromips-2.d: New test. * testsuite/ld-mips-elf/unaligned-lwpc-0.d: New test. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: New test. * testsuite/ld-mips-elf/unaligned-lwpc-2.d: New test. * testsuite/ld-mips-elf/unaligned-lwpc-3.d: New test. * testsuite/ld-mips-elf/unaligned-ldpc-0.d: New test. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: New test. * testsuite/ld-mips-elf/unaligned-ldpc-2.d: New test. * testsuite/ld-mips-elf/unaligned-ldpc-3.d: New test. * testsuite/ld-mips-elf/unaligned-ldpc-4.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-0.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-1.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source. * testsuite/ld-mips-elf/unaligned-insn.s: New test source. * testsuite/ld-mips-elf/unaligned-lwpc-0.s: New test source. * testsuite/ld-mips-elf/unaligned-lwpc-1.s: New test source. * testsuite/ld-mips-elf/unaligned-lwpc-2.s: New test source. * testsuite/ld-mips-elf/unaligned-lwpc-3.s: New test source. * testsuite/ld-mips-elf/unaligned-ldpc-0.s: New test source. * testsuite/ld-mips-elf/unaligned-ldpc-1.s: New test source. * testsuite/ld-mips-elf/unaligned-ldpc-2.s: New test source. * testsuite/ld-mips-elf/unaligned-ldpc-3.s: New test source. * testsuite/ld-mips-elf/unaligned-ldpc-4.s: New test source. * testsuite/ld-mips-elf/unaligned-syms.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-24MIPS/GAS: Treat local jump relocs the same no matter if REL or RELAMaciej W. Rozycki4-0/+41
Do not convert jump relocs against local MIPS16 or microMIPS symbols to refer to a section symbol instead even on RELA targets, as it makes it impossible for the linker to make a JAL to JALX conversion based on ISA symbol annotation, breaking regular and compressed MIPS interlinking. gas/ * config/tc-mips.c (mips_fix_adjustable): Also return 0 for jump relocations against MIPS16 or microMIPS symbols on RELA targets. * testsuite/gas/mips/jalx-local.d: New test. * testsuite/gas/mips/jalx-local-n32.d: New test. * testsuite/gas/mips/jalx-local-n64.d: New test. * testsuite/gas/mips/jalx-local.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/jalx-local.d: New test. * testsuite/ld-mips-elf/jalx-local-n32.d: New test. * testsuite/ld-mips-elf/jalx-local-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-20MIPS: Fix the encoding of immediates with microMIPS JALXMaciej W. Rozycki4-0/+44
The microMIPS JALX instruction shares the R_MICROMIPS_26_S1 relocation with microMIPS J/JAL/JALS instructions, however unlike the latters its encoded immediate argument is unusually shifted left by 2 rather than 1 in calculating the value used for the operation requested. We already handle this exception in `mips_elf_calculate_relocation' in LD, in a scenario where JALX is produced as a result of relaxing JAL for the purpose of making a cross-mode jump. We also get it right in the disassembler in `decode_micromips_operand'. What we don't correctly do however is processing microMIPS JALX produced by GAS from an assembly source, where a non-zero constant argument or a symbol reference with a non-zero in-place addend has been used. In this case the same calculation is made as for microMIPS J/JAL/JALS, causing the wrong encoding to be produced by GAS on making an object file, and then again by LD in the final link. The latter in particular causes the calculation, where the addend fits in the relocatable field, to produce different final addresses for the same source code depending on whether REL or RELA relocations are used. Correct these issues by special-casing microMIPS JALX in the places that have been previously missed. bfd/ * elfxx-mips.c (mips_elf_read_rel_addend): Adjust the addend for microMIPS JALX. gas/ * config/tc-mips.c (append_insn): Correct the encoding of a constant argument for microMIPS JALX. (tc_gen_reloc): Correct the encoding of an in-place addend for microMIPS JALX. * testsuite/gas/mips/jalx-addend.d: New test. * testsuite/gas/mips/jalx-addend-n32.d: New test. * testsuite/gas/mips/jalx-addend-n64.d: New test. * testsuite/gas/mips/jalx-imm.d: New test. * testsuite/gas/mips/jalx-imm-n32.d: New test. * testsuite/gas/mips/jalx-imm-n64.d: New test. * testsuite/gas/mips/jalx-addend.s: New test source. * testsuite/gas/mips/jalx-imm.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/jalx-addend.d: New test. * testsuite/ld-mips-elf/jalx-addend-n32.d: New test. * testsuite/ld-mips-elf/jalx-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-04-05ELF/LD: Avoid producing hidden and internal dynamic symbolsMaciej W. Rozycki9-0/+136
Always turn hidden and internal symbols which have a dynamic index into local ones. This is required by the the ELF gABI[1]: "A hidden symbol contained in a relocatable object must be either removed or converted to STB_LOCAL binding by the link-editor when the relocatable object is included in an executable file or shared object." "An internal symbol contained in a relocatable object must be either removed or converted to STB_LOCAL binding by the link-editor when the relocatable object is included in an executable file or shared object." The ELF linker usually respects this requirement, however in the case where a dynamic symbol has been preallocated due to a reference of the default export class aka visibility from the object being linked, and then merged with a hidden or internal symbol definition from within the same object, then the original export class is carried over to the output dynamic symbol table, because while merging the generic ELF linker only converts affected dynamic symbols to local when they are defined or referenced by the object being linked and a dynamic object involved in the link both at a time. The dynamic symbol produced confuses then the dynamic loader at the run time -- the hidden or internal export class is ignored and the symbol follows preemption rules as with the default export class. In the MIPS target it happens when `mips_elf_record_global_got_symbol' creates a dynamic symbol when a call relocation is encountered. Additionally if the undefined symbol referred by such a relocation does specify the intended export class, then a local dynamic symbol is created instead, which is harmless and allowed, but useless. Normally no local dynamic symbols are created, except for a single dummy one at the beginning. Correct the problem by removing the extra check for a dynamic symbol being defined or referenced by the object being linked and a dynamic object involved in the link both at a time. The test cases included cover the internal and hidden symbol cases, as well as a protected symbol for a reference, the handling of which is unchanged by this fix. Both cases described above are covered, that is where an internal or hidden dynamic symbol is produced and where a local one is. NB this change affects CRIS results where some symbols in the static table produced in a final link are now converted from STV_HIDDEN to STB_LOCAL. This happens whenever the `elf_backend_hide_symbol' handler is called, so the affected symbols must have been chosen for entering into the dynamic symbol table, except in these test cases no such symbol table is produced. In fully linked binaries the static symbol table is only used for debugging though, so such a change is fine. References: [1] "System V Application Binary Interface - DRAFT - 24 April 2001", The Santa Cruz Operation, Inc., "Symbol Table", <http://www.sco.com/developers/gabi/2001-04-24/ch4.symtab.html> bfd/ PR ld/19908 * elflink.c (elf_link_add_object_symbols): Always turn hidden and internal symbols which have a dynamic index into local ones. ld/ PR ld/19908 * testsuite/ld-cris/tls-e-20.d: Adjust for hidden symbol handling fix. * testsuite/ld-cris/tls-e-20a.d: Likewise. * testsuite/ld-cris/tls-e-21.d: Likewise. * testsuite/ld-cris/tls-e-23.d: Likewise. * testsuite/ld-cris/tls-e-80.d: Likewise. * testsuite/ld-cris/tls-gd-3h.d: Likewise. * testsuite/ld-cris/tls-leie-19.d: Likewise. * testsuite/ld-mips-elf/export-class-ref-lib.sd: New test. * testsuite/ld-mips-elf/export-hidden-ref.sd: New test. * testsuite/ld-mips-elf/export-internal-ref.sd: New test. * testsuite/ld-mips-elf/export-protected-ref.sd: New test. * testsuite/ld-mips-elf/export-class-ref-f0.s: New test source. * testsuite/ld-mips-elf/export-class-ref-f1.s: New test source. * testsuite/ld-mips-elf/export-class-ref-f2.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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