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2016-06-17Add support for Thumb-2 long branch veneersThomas Preud'homme4-13/+23
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com> Tony Wang <tony.wang@arm.com> bfd/ * elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub sequence. (stub_long_branch_thumb2_only): Define stub. (arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only. (arm_stub_long_branch_thumb2_only): Likewise. (arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2 capable targets. ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile): Assemble for ARMv6-M. (Thumb2-Thumb2 farcall M profile): New testcase. * testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file. * testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to reflect the use of Thumb-2 veneers for Thumb-2 capable targets. * testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-05-13Set dynamic tag VMA and size from dynamic section when possibleAlan Modra6-9/+16
Rather than searching the output for a specific named section, it's better, where possible, to use a linker created dynamic section to set a dynamic tag's value. That way ld doesn't depend on the output section name, making it possibile to map dynamic sections differently. bfd/ * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use linker dynamic sections in calculating size and address of * dynamic tags rather than using output sections. Remove asserts. * elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise. * elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise. * elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (bfd_elf_final_link): Likewise. * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. Adjust error message. * elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and don't set doit. Look up dynobj section. (elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION invocation and dynamic tag vma calculation. Don't test boolean var == TRUE. * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix DT_JMPREL calc. ld/ * testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing. Use different output file name for static app without .rel.plt. * testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn. * testsuite/ld-arm/arm-no-rel-plt.out: Delete. * testsuite/ld-arm/arm-no-rel-plt.r: New. * testsuite/ld-arm/arm-static-app.d: Don't check file name. * testsuite/ld-arm/arm-static-app.r: Likewise.
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme3-0/+16
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (elf32_arm_merge_eabi_attributes): Add merging logic for Tag_DSP_extension. binutils/ * readelf.c (display_arm_attribute): Add output for Tag_DSP_extension. (arm_attr_public_tags): Define DSP_extension attribute. gas/ * NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions. * config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP instructions. (arm_extensions): Add dsp extension for ARMv8-M Mainline. (aeabi_set_public_attributes): Memorize the feature bits of the architecture selected for Tag_CPU_arch. Use it to set Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension. (arm_convert_symbolic_attribute): Define Tag_DSP_extension. * testsuite/gas/arm/arch7em-bad.d: Rename to ... * testsuite/gas/arm/arch7em-bad-1.d: This. * testsuite/gas/arm/arch7em-bad-2.d: New file. * testsuite/gas/arm/arch7em-bad-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. include/ * elf/arm.h (Tag_DSP_extension): Define. ld/ * testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New test. * testsuite/ld-arm/attr-merge-10b-dsp.s: New file. * testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
2016-05-09[ARM/STM32L4XX] PR 20030: --fix-stm32l4xx-629360 fails to create vldm/vpop ↵Christophe Monat6-25/+142
veneers for double-precision registers bfd/ PR ld/20030 * elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding. (stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs to nb_words. (create_instruction_vldmia): Add is_dp to disambiguate SP/DP encoding. (create_instruction_vldmdb): Likewise. (stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding, uses it to re-encode. ld/ PR ld/20030 * testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp tests. Fix misnamed stm32l4xx-fix-all. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file. * testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment. * testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
2016-03-10PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targetsMickael Guene3-0/+92
gas/ * config/tc-arm.c (do_arit): Protect against bad relocations usage. (do_mov): Likewise. (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets. (do_t_mov_cmp): Likewise. (do_t_add_sub): Protect against bad relocations usage. (do_t_mov_cmp): Likewise. gas/testsuite/ * gas/arm/adds-thumb1-reloc-local-armv7-m.s: New. * gas/arm/adds-thumb1-reloc-local-armv7-m.d: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.s: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.d: New. ld/ * testsuite/ld-arm/arm-elf.exp: New tests. * testsuite/ld-arm/thumb1-adds-armv7-m.s: New. * testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
2016-02-04Remove support for creating ARM NOREAD sections.Nick Clifton9-97/+0
gas * config/obj-elf.c (obj_elf_change_section): Remove support for ARM NOREAD sections. * config/tc-arm.c (arm_elf_section_letter): Delete. * config/tc-arm.h (md_elf_section_letter): Delete. * doc/c-arm.texi (ARM Section Attribute): Delete section. * testsuite/gas/arm/section-execute-only.d: Delete. * testsuite/gas/arm/section-execute-only.s: Delete. ld * testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests. * testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete. * testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete. * testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete. * testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete. * testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete. * testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete. * testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete. * testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
2016-01-21Fix linker testsuite failures for ARM netbsdelf target.Nick Clifton1-5/+21
PR ld/19453 * testsuite/ld-arm/arm-elf.exp: Skip tests that do not work for the arm-netbsdelf target.
2016-01-21Fix unexpected failures in the linker testsuite for ARM VxWorks targets.Nick Clifton5-15/+19
PR ld/19455 * elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF class of the linker stub bfd. (elf32_arm_check_relocs): Skip check for pic format after processing a vxWorks R_ARM_ABS12 reloc. * elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when reporting a class mismatch. * testsuite/ld-arm/vxworks1-lib.dd: Update for current disassmebler output. * testsuite/ld-arm/vxworks1-lib.rd: Likewise. * testsuite/ld-arm/vxworks1.dd: Likewise. * testsuite/ld-arm/vxworks1.rd: Likewise. * testsuite/ld-arm/vxworks1.ld: Set the output format.
2016-01-20Add support for an ARM specific 'y' section attribute flag to mark the ↵Mickael Guene4-5/+5
section as NOREAD. bfd/ChangeLog: * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread section using '.text.noread' pattern. gas/ChangeLog: * config/obj-elf.c (obj_elf_change_section) : Allow arm section with SHF_ARM_NOREAD section flag. * config/tc-arm.h (md_elf_section_letter) : Implement this hook to handle letter 'y'. (arm_elf_section_letter) : Declare it. * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set SHF_ARM_NOREAD section flag. * doc/c-arm.texi (ARM section attribute 'y'): Document it. gas/testsuite/ChangeLog: * gas/arm/section-execute-only.s: New test case. * gas/arm/section-execute-only.d: Expected output. ld/testsuite/ChangeLog: * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y' attribute usage. * ld-arm/thumb1-noread-present-one-section.s: Likewise. * ld-arm/thumb1-noread-present-two-section.s: Likewise. * ld-arm/thumb1-input-section-flag-match.s: Likewise. binutils/ChangeLog: * readelf.c (get_elf_section_flags): Display y letter for section with SHF_ARM_NOREAD section flag in readelf section output. (process_section_headers): Add y letter in readelf section output key mapping for ARM architecture.
2016-01-14Fix Thumb-Thumb farcall v6-M (no profile) testThomas Preud'homme3-9/+6
2016-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)): Set address of .foo section when linking. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc in .foo section. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected output to the above changes.
2016-01-12Add cantunwind when unwind info does not match start of section.Yury Usishchev4-0/+54
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when address in first unwind entry does not match start of section. tests * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-mix.d: New file. * ld-arm/unwind-mix1.s: New file. * ld-arm/unwind-mix2.s: New file.
2016-01-08[ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVEJiong Wang6-54/+54
2016-01-08 Richard Sandiford <richard.sandiford@arm.com> Jiong Wang <jiong.wang@arm.com> PR ld/19368 bfd/ * elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to reloc_class_ifunc. ld/ * testsuite/ld-arm/ifunc-3.rd: Update expected result. * testsuite/ld-arm/ifunc-4.rd: Likewise. * testsuite/ld-arm/ifunc-9.rd: Likewise. * testsuite/ld-arm/ifunc-10.rd: Likewise. * testsuite/ld-arm/ifunc-12.rd: Likewise. * testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-01Copyright update for binutilsAlan Modra2-2/+2
2015-12-26Add test for ARMv6-M farcall with no profile infoThomas Preud'homme4-0/+44
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/testsuite/ * ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no profile)". * ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file. * ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise. * ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
2015-12-24Add support for linking ARMv8-M object filesThomas Preud'homme10-0/+59
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise.
2015-12-22ARM: Fix exidx coverage for relocatable builds.Yury Usishchev5-0/+61
bfd * elf-bfd.h: Add callback to count additional relocations. * elf32-arm.c (_arm_elf_section_data): Add new counter. (insert_cantunwind_after): Increment relocations counter. (elf32_arm_fix_exidx_coverage): Remove exidx entries and add terminating CANTUNWIND entry only in final builds. (elf32_arm_add_relocation): New function. (elf32_arm_write_section): Add relocations in relocatable builds. (elf32_arm_count_additional_relocs): New function. (elf_backend_count_additional_relocs): New define. * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of .rel section. * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define. ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call elf32_arm_fix_exidx_coverage for relocatable builds. ld/testsuite * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-rel.d: New file. * ld-arm/unwind-rel1.s: New file. * ld-arm/unwind-rel2.s: New file. * ld-arm/unwind-rel3.s: New file.
2015-12-22Add support for ARM's NOREAD section flag.Mickael Guene10-0/+129
include/elf * arm.h: Add arm SHF_ARM_NOREAD section flag. bfd * bfd-in2.h: Regenerate. * section.c: Add SEC_ELF_NOREAD. * elf32-arm.c (elf32_arm_post_process_headers): Only set PF_X attribute if a segment only contains section with SHF_ARM_NOREAD flag. (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion. (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD to bfd flag. (elf32_arm_lookup_section_flags): New function to allow INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag. (elf32_arm_special_sections): Add special sections array to catch section prefix by '.text.noread' pattern. ld/testsuite * ld-arm/arm-elf.exp: New tests. * ld-arm/thumb1-input-section-flag-match.d: New * ld-arm/thumb1-input-section-flag-match.s: New * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New * ld-arm/thumb1-noread-present-one-section.d: New * ld-arm/thumb1-noread-present-one-section.s: New * ld-arm/thumb1-noread-present-two-section.d: New * ld-arm/thumb1-noread-present-two-section.s: New binutils * readelf.c (get_elf_section_flags): Add support for ARM specific section flags.
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene5-0/+168
To support thumb1 execute-only code we need to support four new relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC). These relocations allow the static linker to finalize construction of symbol address. Typical sequence of code to get address of the symbol foo is then the following : movs r3, #:upper8_15:#foo lsls r3, #8 adds r3, #:upper0_7:#foo lsls r3, #8 adds r3, #:lower8_15:#foo lsls r3, #8 adds r3, #:lower0_7:#foo This will give following sequence of text and relocations after assembly : 4: 2300 movs r3, #0 4: R_ARM_THM_ALU_ABS_G3_NC foo 6: 021b lsls r3, r3, #8 8: 3300 adds r3, #0 8: R_ARM_THM_ALU_ABS_G2_NC foo a: 021b lsls r3, r3, #8 c: 3300 adds r3, #0 c: R_ARM_THM_ALU_ABS_G1_NC foo e: 021b lsls r3, r3, #8 10: 3300 adds r3, #0 10: R_ARM_THM_ALU_ABS_G0_NC foo
2015-10-27Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time ↵Laurent Alfonsi13-0/+884
workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx). bfd * bfd-in2.h: Regenerate. * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how STM32L4XX instruction scanning should be done. (bfd_elf32_arm_set_stm32l4xx_fix) (bfd_elf32_arm_stm32l4xx_erratum_scan) (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes. (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument to prototype. * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME) (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros. (elf32_stm32l4xx_erratum_type): New enum. (elf32_stm32l4xx_erratum_list): New struct. List of veneers or jumps to veneers. (_arm_elf_section_data): Add stm32l4xx_erratumcount, stm32l4xx_erratumlist. (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size, stm32l4xx_fix and num_stm32l4xx_fixes fields. (ctz): New function. (popcount): New function. (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix. (put_thumb2_insn): New function. (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for LDM instructions. (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for VLDM instructions. (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum glue section. (record_stm32l4xx_erratum_veneer) : New function. Create a single veneer, and its associated symbols. (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue. (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of erratum workaround required. (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find out where veneers and branches to veneers have been placed in virtual memory after layout. (is_thumb2_ldmia): New function. (is_thumb2_ldmdb): Likewise. (is_thumb2_vldm ): Likewise. (stm32l4xx_need_create_replacing_stub): New function. Decide if a veneer must be emitted. (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an input BFD for potential erratum-triggering insns. Record results. (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in global hash table. (elf32_arm_size_dynamic_sections): Collect glue information. (create_instruction_branch_absolute): New function. (create_instruction_ldmia): Likewise. (create_instruction_ldmdb): Likewise. (create_instruction_mov): Likewise. (create_instruction_sub): Likewise. (create_instruction_vldmia): Likewise. (create_instruction_vldmdb): Likewise. (create_instruction_udf_w): Likewise. (create_instruction_udf): Likewise. (push_thumb2_insn32): Likewise. (push_thumb2_insn16): Likewise. (stm32l4xx_fill_stub_udf): Likewise. (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the replacing stub for ldmia instructions. (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb. (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm. (stm32l4xx_create_replacing_stub): New function. Dispatches the stub emission to the appropriate functions. (elf32_arm_write_section): Output veneers, and branches to veneers. ld * ld.texinfo: Description of the STM32L4xx erratum workaround. * emultempl/armelf.em (stm32l4xx_fix): New. (arm_elf_before_allocation): Choose the type of fix, scan for erratum. (gld${EMULATION_NAME}_finish): Fix veneer locations. (arm_elf_create_output_section_statements): Propagate stm32l4xx_fix value. (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX. (PARSE_AND_LIST_LONGOPTS): Add entry for handling --fix-stm32l4xx-629360. (PARSE_AND_LIST_OPTION): Add entry for helping on --fix-stm32l4xx-629360. (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX. tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX tests. * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New. * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-all.d: Likewise. * ld-arm/stm32l4xx-fix-all.s: Likewise. * ld-arm/stm32l4xx-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-ldm.d: Likewise. * ld-arm/stm32l4xx-fix-ldm.s: Likewise. * ld-arm/stm32l4xx-fix-vldm.d: Likewise. * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-07-27[ARM] Fix extern protected data handlingSzabolcs Nagy3-0/+34
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data in shared objects. This is needed for the fix of glibc bug 17711: https://sourceware.org/bugzilla/show_bug.cgi?id=17711 bfd: PR ld/18705 * elf32-arm.c (elf_backend_extern_protected_data): Define. ld/testsuite: PR ld/18705 * ld-arm/protected-data.d: New. * ld-arm/protected-data.s: New. * ld-arm/arm-elf.exp: Add new test.
2015-04-29[ARM] Update ld testcasesJiong Wang2-3/+3
2015-04-29 Renlin Li <renlin.li@arm.com> ld/testsuite/ * ld-arm/ifunc-10.dd: Adjust expected output. * ld-arm/ifunc-2.dd: Likewise.
2015-04-24[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.Richard Earnshaw23-114/+71
2015-04/24 Richard Earnshaw <rearnsha@arm.com> gas/ * config/tc-arm.h (arm_min): New function. (SUB_SEGMENT_ALIGN): Define. gas/testsuite/ * gas/arm/align64.d: Delete trailing padding NOPs. ld/testsuite/ * ld-arm/armthumb-lib.d: Regenerate expected output. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/armthumb-lib.sym: Likewise. * ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-b.d: Likewise. * ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-bcc.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-bl.d: Likewise. * ld-arm/cortex-a8-fix-blx-bcond.d: Likewise. * ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise. * ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise. * ld-arm/cortex-a8-fix-blx.d: Likewise. * ld-arm/cortex-a8-fix-hdr.d: Likewise. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise.
2015-04-07Modify get_reloc_section for targets that map .got.plt to .gotAlan Modra1-0/+1
Fixes tic6x testsuite failures due to .rela.plt having a zero sh_info. I considered passing link_info to get_reloc_section so we could directly return the .got.plt output section, but we need the fallback to name lookup anyway for objcopy. bfd/ * elf.c (_bfd_elf_get_reloc_section): Allow for .got.plt being mapped to output .got section. ld/testsuite/ * ld-arm/tls-gdesc-nlazy.g: Adjust for readelf note. * ld-tic6x/shlib-1.rd: Expect corrected .rela.plt sh_info. * ld-tic6x/shlib-1b.rd: Likewise. * ld-tic6x/shlib-1r.rd: Likewise. * ld-tic6x/shlib-1rb.rd: Likewise. * ld-tic6x/shlib-app-1.rd: Likewise. * ld-tic6x/shlib-app-1b.rd: Likewise. * ld-tic6x/shlib-app-1r.rd: Likewise. * ld-tic6x/shlib-app-1rb.rd: Likewise. * ld-tic6x/shlib-noindex.rd: Likewise.
2015-02-26[ARM]Update for Tag_ABI_HardFP_use per EABI docTerry Guo22-15/+86
Updated how we merge and display this attribute per the latest EABI documents. bfd/ChangeLog * elf32-arm.c (elf32_arm_merge_eabi_attributes): Update how we merge Tag_ABI_HardFP_use. binutils/ChangeLog * readelf.c (arm_attr_tag_ABI_HardFP_use): Update how we display it. ld/testsuite/ChangeLog * ld-arm/attr-merge-3.attr: Remove Tag_ABI_HardFP_use. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/attr-merge-vfp-6.d: Likewise. * ld-arm/attr-merge-vfp-6r.d: Likewise. * ld-arm/attr-merge-vfp-7.d: Likewise. * ld-arm/attr-merge-vfp-7r.d: Likewise. * ld-arm/attr-merge-vfp-8.d: Likewise. * ld-arm/attr-merge-vfp-8r.d: Likewise.
2015-01-14[ARM] Reject R_ARM_REL32 when trying to defer it to runtimeJiong Wang13-968/+283
bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Reject R_ARM_32/_NOI when trying to defer them to runtime. ld/testsuite/ * ld-arm/elf32-reject.s: New testcase. * ld-arm/elf32-reject.d: Likewise. * ld-arm/elf32-reject-pie.s: Likewise. * ld-arm/elf32-reject-pie.d: Likewise. * ld-arm/arm-elf.exp: Run new testcases. * ld-arm/ifunc-7.s: Delete f2/f4 test items. * ld-arm/ifunc-7.rd: Likewise. * ld-arm/ifunc-7.gd: Likewise. * ld-arm/ifunc-7.dd: Likewise. * ld-arm/ifunc-8.s: Likewise. * ld-arm/ifunc-8.rd: Likewise. * ld-arm/ifunc-8.gd: Likewise. * ld-arm/ifunc-8.dd: Likewise.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra2-2/+2
2014-12-25ARM: Add support for value 3 of Tag_ABI_VFP_args attributeTerry Guo9-0/+16
*** bfd/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. (elf32_arm_post_process_headers): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. *** binutils/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible". *** gdb/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of Tag_ABI_VFP_args. Also replace hardcoded values by enum values in the switch handling the different values of Tag_ABI_VFP_args. *** gold/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF header as hard float only when Tag_ABI_VFP_args is 1, using new enum value AEABI_VFP_args_vfp to check that. (Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args value and replace hardcoded values by enum values. *** include/elf/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum values. *** ld/testsuite/ChangeLog *** 2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args. * ld-arm/attr-merge-2b.s: Likewise. * ld-arm/attr-merge-2.attr: Likewise. * ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and Tag_ABI_VFP_args. * ld-arm/attr-merge-4b.s: Likewise. * ld-arm/attr-merge-4.attr: Likewise. * ld-arm/attr-merge-6a.s: Likewise. * ld-arm/attr-merge-6b.s: Likewise. * ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
2014-11-21Calculate ARM arch attribute after relaxationTerry Guo4-4/+6
gas/ 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (md_assemble): Do not consider relaxation. (md_convert_frag): Test and set target arch attribute accordingly. (aeabi_set_attribute_string): Turn it into a global function. * config/tc-arm.h (md_post_relax_hook): Enable it for ARM target. (aeabi_set_public_attributes): Declare it. gas/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/attr-arch-assumption.d: New file. * gas/arm/attr-arch-assumption.s: Likewise. ld/testsuite/ 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/tls-longplt-lib.s: Require ARMv6T2. * ld-arm/tls-longplt.s: Likewise. * ld-arm/tls-longplt-lib.d: Updated. * ld-arm/tls-longplt.d: Likewise.
2014-11-21Support ARM Cortex-M7Terry Guo18-0/+214
include/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. bfd/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5. binutils/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5. gas/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. (aeabi_set_public_attributes): Set proper FP arch for FPv5. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. ld/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-vfp-4-sp.s: New test source file. * ld-arm/attr-merge-vfp-5-sp.s: Likewise. * ld-arm/attr-merge-vfp-5.s: Likewise. * ld-arm/attr-merge-vfp-8.d: New test. * ld-arm/attr-merge-vfp-8r.d: Likewise. * ld-arm/attr-merge-vfp-9.d: Likewise. * ld-arm/attr-merge-vfp-9r.d: Likewise. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-11.d: Likewise. * ld-arm/attr-merge-vfp-11r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/arm-elf.exp: Run the new tests.
2014-11-20Enable to link ARM object file that hasn't attribute section.Terry Guo4-0/+39
bfd/ChangeLog 2014-11-20 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Skip if input bfd hasn't attribute section. ld/testsuite/ChangeLog: 2014-11-20 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-nosection-1.d: New file. * ld-arm/attr-merge-nosection-1a.s: Likewise. * ld-arm/attr-merge-nosection-1b.s: Likewise. * ld-arm/arm-elf.exp: Include the new test.
2014-09-16Make the linker return an error status if it fails to merge ARM binaries withTerry Guo4-0/+32
different architecture tags. Add a test case to make sure that this works, and update readelf so that it will not seg-fault when trying to display the attributes of binaries with invalid architecture tags. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if failed to merge. * ld-arm/attr-merge-arch-2.d: New test case. * ld-arm/attr-merge-arch-2a.s: New test case source file. * ld-arm/attr-merge-arch-2b.s: Likewise. * ld-arm/arm-elf.exp: Run new test case. * readelf.c (display_arm_attribute): Use unsigned int type for tag, val and type variables.
2014-08-21bfd/ChangeLogTerry Guo8-0/+166
2014-08-21 Tony Wang <tony.wang@arm.com> * elf32-arm.c (elf32_arm_final_link_relocate): Implement the veneer routine for R_ARM_THM_JUMP19. (arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19 (elf32_arm_size_stub): Ditto. ld/testsuite/ChangeLog 2014-08-21 Tony Wang <tony.wang@arm.com> * ld-arm/jump-reloc-veneers-cond.s: New test. * ld-arm/farcall-cond-thumb-arm.s: Ditto. * ld-arm/jump-reloc-veneers-cond-short.d: Expected output for target without a veneer generation. * ld-arm/jump-reloc-veneers-cond-long.d: Expected output for target with a veneer generation. * ld-arm/farcall-cond-thumb-arm.d: Expected output for inter working veneer generation. * ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
2014-08-20Fix PR ld/17277: bogus dynamic relocs and TEXTREL for ARM PC-relative relocsRoland McGrath3-0/+45
bfd/ PR ld/17277 * elf32-arm.c (elf32_arm_check_relocs): Increment P->pc_count for all reloc types with pc_relative set in the howto, not just for R_ARM_REL32 and R_ARM_REL32_NOI. (allocate_dynrelocs_for_symbol): Update comment. (elf32_arm_gc_sweep_hook): For all reloc types with pc_relative set in the howto, set call_reloc_p and may_need_local_target_p but not may_become_dynamic_p; not only for R_ARM_REL32 and R_ARM_REL32_NOI. (elf32_arm_check_relocs): Likewise. ld/testsuite/ PR ld/17277 * ld-arm/pcrel-shared.s: New file. * ld-arm/pcrel-shared.rd: New file. * ld-arm/arm-elf.exp (armelftests_common): Add it.
2014-07-10Fix tests when configured for arm-linux and arm-elfWill Newton26-214/+215
With this change all gas and most ld tests pass when configured for arm-linux. It doesn't look like these configurations have been tested in a long time but this attempts to stem the bit-rot slightly. gas/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * gas/arm/bl-local-2.d: Only enable the test on EABI and NaCl configurations. * gas/arm/bl-local-v4t.d: Likewise. * gas/arm/blx-local.d: Likewise. * gas/arm/branch-reloc.d: Likewise. ld/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix tests, IFUNC tests and other EABI requiring tests to... (armeabitests_nonacl): ...here. * ld-arm/arm-app-abs32.d: Loosen regex for architecture type to allow test to pass on configurations without an attributes section. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-static-app.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-far.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-descrelax-be32.d: Likewise. * ld-arm/tls-descrelax.d: Likewise. * ld-arm/tls-descseq.d: Likewise. * ld-arm/tls-gdesc-got.d: Likewise. * ld-arm/tls-gdesc.d: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-thumb1.d: Likewise.
2014-07-08ld/ARM: Increase maximum page size to 64kBWill Newton4-8/+8
Increase the maximum page size to 64kB and align the TEXT_START_ADDR to a 64kB boundary. This brings AArch32 in line with AArch64 and improves compatability under certain conditions. bfd/ChangeLog: 2014-07-08 Will Newton <will.newton@linaro.org> * elf32-arm.c (ELF_MAXPAGESIZE): Increase the default value to 64kB and remove custom setting for NaCl. ld/ChangeLog: 2014-07-08 Will Newton <will.newton@linaro.org> * emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase alignment to 64kB boundary. ld/testsuite/ChangeLog: 2014-07-08 Will Newton <will.newton@linaro.org> * ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to match bfd. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to take into account increased segment alignment. * ld-arm/ifunc-gdesc.r: Likewise. * ld-arm/tls-lib.d: Likewise.
2014-06-25ld/arm: adjust offsets in tls-gdierelax2.dKyle McMartin1-4/+4
Addition of DF_STATIC_TLS in eea6dad2 results in the addition of flags to the dynamic section, which in turn changes these addresses. Fix them up to match their new positions. ld/testsuite/Changelog: 2014-06-24 Kyle McMartin <kyle@redhat.com> * ld-arm/tls-gdierelax2.d: Fix expected offsets.
2014-06-16ld/ARM: Fix IFUNC and TLS descriptors in the same shared objectWill Newton4-0/+42
Combining TLS descriptors and GNU indirect functions in the same object could lead to assertions or multiple dynamic relocations for the same GOT slot. Fix the bookkeeping so this doesn't happen. This allows building and make checking glibc with -mtls-dialect=gnu2. bfd/ChangeLog: 2014-06-16 Will Newton <will.newton@linaro.org> * elf32-arm.c (elf32_arm_allocate_plt_entry): Increment htab->next_tls_desc_index in the non-IPLT case. Calculate GOT offset correctly for the non-IPLT case. (allocate_dynrelocs_for_symbol): Don't increment htab->next_tls_desc_index here. ld/testsuite/ChangeLog: 2014-06-16 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Add ifunc-gdesc test. * ld-arm/ifunc-gdesc.r: New file. * ld-arm/ifunc-gdesc.s: Likewise. * ld-arm/ifunc-gdesc.ver: Likewise.
2014-04-23ld/arm: Fix testsuite failures for armeb-linux-eabiWill Newton24-132/+129
Fix all the cases where endianness needs to be taken into account in the ARM ld dump tests. ld/testsuite/ChangeLog: 2014-04-23 Will Newton <will.newton@linaro.org> * ld-arm/arm-no-rel-plt.ld: Remove OUTPUT_FORMAT and SEARCH_DIR commands. * ld-arm/arm-rel32.d: Update regexps to allow test to pass on armeb-linux-eabi configuration. * ld-arm/data-only-map.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/ifunc-1.gd: Likewise. * ld-arm/ifunc-10.gd: Likewise. * ld-arm/ifunc-11.gd: Likewise. * ld-arm/ifunc-12.gd: Likewise. * ld-arm/ifunc-13.gd: Likewise. * ld-arm/ifunc-14.gd: Likewise. * ld-arm/ifunc-15.gd: Likewise. * ld-arm/ifunc-16.gd: Likewise. * ld-arm/ifunc-17.gd: Likewise. * ld-arm/ifunc-2.gd: Likewise. * ld-arm/ifunc-3.gd: Likewise. * ld-arm/ifunc-4.gd: Likewise. * ld-arm/ifunc-5.gd: Likewise. * ld-arm/ifunc-6.gd: Likewise. * ld-arm/ifunc-7.gd: Likewise. * ld-arm/ifunc-8.gd: Likewise. * ld-arm/ifunc-9.gd: Likewise. * ld-arm/jump-reloc-veneers-long.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise.
2014-03-27Add support for limited pretty-printing of ARM PLT entries on eabi and nacl ↵Yury Gribov28-384/+450
targets. * elf32-arm.c (elf32_arm_get_synthetic_symtab): Add new callback. (elf32_arm_nacl_plt_sym_val): Likewise. (elf32_arm_plt0_size): Add helper function. (elf32_arm_plt_size): Likewise. * ld-arm/arm-app-abs32.d: Updated test. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-fix-b-plt.d: Likewise. * ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-plt.d: Likewise. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise. * ld-arm/cortex-a8-fix-blx-plt.d: Likewise. * ld-arm/farcall-mixed-app-v5.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/ifunc-10.dd: Likewise. * ld-arm/ifunc-14.dd: Likewise. * ld-arm/ifunc-15.dd: Likewise. * ld-arm/ifunc-3.dd: Likewise. * ld-arm/ifunc-4.dd: Likewise. * ld-arm/ifunc-7.dd: Likewise. * ld-arm/ifunc-8.dd: Likewise. * ld-arm/ifunc-9.dd: Likewise. * ld-arm/long-plt-format.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/thumb2-bl-undefweak.d: Likewise. * ld-arm/thumb2-bl-undefweak1.d: Likewise.
2014-03-20bfd/elf32-arm.c: Set st_value to zero for undefined symbolsWill Newton1-2/+2
Unless pointer_equality_needed is set then set st_value to be zero for undefined symbols. bfd/ChangeLog: 2014-03-20 Will Newton <will.newton@linaro.org> PR ld/16715 * elf32-arm.c (elf32_arm_check_relocs): Set pointer_equality_needed for absolute references within executable links. (elf32_arm_finish_dynamic_symbol): Set st_value to zero unless pointer_equality_needed is set. ld/testsuite/ChangeLog: 2014-03-20 Will Newton <will.newton@linaro.org> * ld-arm/ifunc-14.rd: Update symbol values.
2014-03-06Apply ld-arm/gc-hidden-1 to all ELF targets, not just *eabi* targetsRoland McGrath1-8/+9
ld/testsuite/ * ld-arm/gc-hidden-1.d: Remove target, add not-target to match other ELF-only tests in this directory. Loosen regexps so they don't care what the exact addresses are.
2014-03-06Disable --long-plt test for arm-nacl targets.Roland McGrath1-4/+4
ld/testsuite/ * ld-arm/arm-elf.exp (armelftests_common): Move long-plt case ... (armelftests_nonacl): ... here.
2014-03-05Update copyright yearsAlan Modra2-2/+2
2014-03-01ld-arm/long-plt-format.d, ld-arm/arm-elf.exp: Adjust for arm-eabi.Yuri Gribov2-11/+11
2014-02-27This patch adds support for ARM PLT entries that support a full 32-bit ↵Yuri Gribov3-1/+27
offset range. Enabled via the use of a new linker command line option: --long-plt. * bfd-in.h: Add export of bfd_elf32_arm_use_long_plt. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_plt_entry_long): New array. (elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if using long PLT entries. (bfd_elf32_arm_use_long_plt): New function. (elf32_arm_populate_plt_entry): Add support for long PLT entries. * emultempl/armelf.em (OPTION_LONG_PLT): Define. (PARSE_AND_LIST_LONGOPTS): Add long-plt. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Handle long-plt. * ld.texinfo: Document --long-plt. * ld-arm/long-plt-format.s: New test case. * ld-arm/long-plt-format.d: Expected disassembly. * ld-arm/arm-elf.exp: Run the new test.
2014-01-22Make assignments to dot keep an empty output section.Alan Modra3-3/+2
An assignment to dot in an output section that allocates space of course keeps the output section. Here, I'm changing the behaviour for assignments that don't allocate space. The idea is not so much to allow people to force output of an empty section with ". = .", but to fix cases where an otherwise empty section has padding added by an alignment expression that changes with relaxation or .eh_frame editing. Such a section might have zero size before relaxation and so be stripped incorrectly. ld/ * ld.texinfo (Output Section Discarding): Mention assigning to dot as a way of keeping otherwise empty sections. * ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0, is_dot_plus_0, is_align_conditional): New predicates. (exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an output section, except for some special cases. * scripttempl/elfmicroblaze.sc: Use canonical form to align at end of .heap and .stack. ld/testsuite/ * ld-shared/elf-offset.ld: Align end of .bss with canonical form of ALIGN that allows an empty .bss to be removed. * ld-arm/arm-dyn.ld: Likewise. * ld-arm/arm-lib.ld: Likewise. * ld-elfvsb/elf-offset.ld: Likewise. * ld-mips-elf/mips-dyn.ld: Likewise. * ld-mips-elf/mips-lib.ld: Likewise. * ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN. * ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section. ALIGN address of section instead. * ld-powerpc/vle-multiseg-2.ld: Likewise. * ld-powerpc/vle-multiseg-3.ld: Likewise. * ld-powerpc/vle-multiseg-4.ld: Likewise. * ld-powerpc/vle-multiseg-6.ld: Likewise. * ld-scripts/empty-aligned.d: Check section headers not program headers. Remove xfail and notarget. * ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
2013-11-14ld/ARM: Fix script-type testsuite failure.Will Newton1-1/+0
Commit 34a79995c4cc34f6f41e2a4b2df477db31b31f0c changed how STT_FILE symbols were emitted but this testcase got missed in the cleanup. ld/testsuite/ChangeLog: 2013-11-14 Will Newton <will.newton@linaro.org> * ld-arm/script-type.sym: Remove redundant STT_FILE symbol.
2013-09-04ld/testsuite/Yufeng Zhang1-1/+1
2013-09-04 Vidya Praveen <vidyapraveen@arm.com> * ld-arm/export-class.exp: Fix the condition.
2013-08-24 * ld-arm/export-class.exp: Handle non-EABI targets.Maciej W. Rozycki1-3/+9
2013-08-14 PR ld/15787Nick Clifton11-25/+36
* elf32-arm.c (elf32_arm_final_link_relocate): Use origin of output segment containing the relocating symbol instead of assuming 0 for sb group relocations. * ld-arm/group-relocs-ldr-bad.s: Redefine bar into foo section beyond 16 bit offset width. * ld-arm/group-relocs-ldrs-bad.s: Likewise. * ld-arm/group-relocs-ldr-bad.d: Adjust expected result. * ld-arm/group-relocs-ldrs-bad.d: Likewise. * ld-arm/group-relocs.s: Add comments. Move symbols used for sb group relocations into .data section. Drop section zero. Use pc/r0 as base register when pc/sb group relocations are used. * ld-arm/group-relocs.d: Adjust expected result. * ld-arm/group-relocs-alu-bad-2.d: New test for sb group relocation. * ld-arm/group-relocs-ldc-bad-2.d: Likewise. * ld-arm/group-relocs-ldr-bad-2.d: New test for pc group relocation. * ld-arm/group-relocs-ldrs-bad-2.d: Likewise. * ld-arm/unresolved-2.d: Add sb relocation failure test. * ld-arm/group-relocs-alu-bad-2.s: New test source. * ld-arm/group-relocs-ldr-bad-2.s: Likewise. * ld-arm/group-relocs-ldrs-bad-2.s: Likewise. * ld-arm/group-relocs-ldc-bad-2.s: Likewise. * ld-arm/unresolved-2.s: Likewise. * ld-arm/arm-elf.exp: For group-relocs, drop section zero start definition. Run the new tests.
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