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2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-24[ARM] Bind defined symbol locally in PIEJiong Wang1-0/+1
bfd/ PR target/20737 * elf32-arm.c (elf32_arm_final_link_relocate): Bind defined symbol locally in PIE. ld/ * testsuite/ld-arm/pie-bind-locally-a.s: New test source. * testsuite/ld-arm/pie-bind-locally-b.s: Likewise. * testsuite/ld-arm/pie-bind-locally.d: New testcase. * testsuite/ld-arm/arm-elf.exp: Run new testcase.
2016-09-28[ARM] PR ld/20608 Relocation truncated to fit: R_ARM_THM_JUMP24 for ↵Christophe Lyon1-0/+6
relocation to PLT entry 2016-09-28 Christophe Lyon <christophe.lyon@linaro.org> PR ld/20608 bfd/ * elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT Thumb-ARM stub is too far. ld * testsuite/ld-arm/arm-elf.exp: Handle new testcase. * testsuite/ld-arm/farcall-mixed-app2.d: New file. * testsuite/ld-arm/farcall-mixed-app2.r: Likewise. * testsuite/ld-arm/farcall-mixed-app2.s: Likewise. * testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
2016-08-26Add support for stable secure gateway veneers addressesThomas Preud'homme1-2/+45
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for the input import library bfd. * bfd-in2.h: Regenerate. * elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd and new_cmse_stub_offset fields. (stub_hash_newfunc): Initialize stub_offset and stub_template_size to -1. (elf32_arm_add_stub): Likewise for stub_offset. (arm_new_stubs_start_offset_ptr): New function. (arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow empty SG veneers to have zero relocations. (arm_size_one_stub): Only initialize stub size and template information for non empty veneers. Do not update veneer section size if veneer already has an offset. (elf32_arm_create_stub): Return the stub entry pointer or NULL instead of a boolean indicating success or failure. (cmse_scan): Change stub_changed parameter into an integer pointer parameter cmse_stub_created to count the number of stub created and adapt to change of return value in elf32_arm_create_stub. (cmse_entry_fct_p): New function. (arm_list_new_cmse_stub): Likewise. (set_cmse_veneer_addr_from_implib): Likewise. (elf32_arm_size_stubs): Define cmse_stub_created, pass its address to cmse_scan instead of that of cmse_stub_changed to compute the number of stub created and use it to initialize stub_changed. Call set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change of return value in elf32_arm_create_stub. Use arm_stub_section_start_offset () if not NULL to initialize size of secure gateway veneers section. Initialize stub_offset of Cortex-A8 erratum fix to -1. Use ret to hold return value. (elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not NULL to initialize size of secure gateway veneers section. Adapt comment to stress the importance of zeroing veneer section content. (bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to initialize eponymous field in struct elf32_arm_link_hash_table. ld/ * emultempl/armelf.em (in_implib_filename): Declare and initialize new variable. (arm_elf_create_output_section_statements): Open import input library file for writing and pass resulting in_implib_bfd to bfd_elf32_arm_set_target_relocs. (PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option. (PARSE_AND_LIST_LONGOPTS): Define --in-implib option. (PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option. (PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case. * ld.texinfo (--cmse-implib): Update to mention --in-implib. (--in-implib): Document new option. * NEWS: Likewise. * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): add --defsym VER=1 to gas CLI. (Secure gateway import library generation: errors): Likewise. (Input secure gateway import library): New test. (Input secure gateway import library: no output import library): Likewise. (Input secure gateway import library: not an SG input import library): Likewise. (Input secure gateway import library: earlier stub section base): Likewise. (Input secure gateway import library: later stub section base): Likewise. (Input secure gateway import library: veneer comeback): Likewise. (Input secure gateway import library: entry function change): Likewise. * testsuite/ld-arm/cmse-implib.s: Add input import library testing. * testsuite/ld-arm/cmse-implib.rd: Update accordingly. * testsuite/ld-arm/cmse-new-implib.out: New file. * testsuite/ld-arm/cmse-new-implib.rd: Likewise. * testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise. * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise. * testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise. * testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise. * testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme1-0/+12
bfd/ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter. * bfd-in2.h: Regenerate. * elf32-arm.c (struct elf32_arm_link_hash_table): Declare new cmse_implib field. (bfd_elf32_arm_set_target_relocs): Add new parameter to initialize cmse_implib field in struct elf32_arm_link_hash_table. (elf32_arm_filter_cmse_symbols): New function. (elf32_arm_filter_implib_symbols): Likewise. (elf_backend_filter_implib_symbols): Define to elf32_arm_filter_implib_symbols. ld/ * emultempl/armelf.em (cmse_implib): Declare and define this new static variable. (arm_elf_create_output_section_statements): Add new cmse_implib parameter. (OPTION_CMSE_IMPLIB): Define macro. (PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case. * ld.texinfo (--cmse-implib): Document new option. * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): New test. (Secure gateway import library generation: errors): Likewise. * testsuite/ld-arm/cmse-implib.s: New file. * testsuite/ld-arm/cmse-implib-errors.out: Likewise. * testsuite/ld-arm/cmse-implib.rd: Likewise.
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme1-0/+27
bfd/ * elf32-arm.c (CMSE_PREFIX): Define macro. (elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence. (cmse_branch_thumb_only): Declare stub. (struct elf32_arm_link_hash_table): Define cmse_stub_sec field. (elf32_arm_get_plt_info): Add globals parameter. Use it to return FALSE if there is no PLT. (arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature. (elf32_arm_final_link_relocate): Likewise. (elf32_arm_gc_sweep_hook): Likewise. (elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M secure entry functions. (arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required): Change to a switch case and add a case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required_alignment): Likewise. (arm_stub_dedicated_output_section_name): Likewise. (arm_stub_dedicated_input_section_ptr): Likewise and remove ATTRIBUTE_UNUSED for htab parameter. (arm_stub_required_alignment): Likewise. (arm_stub_sym_claimed): Likewise. (arm_dedicated_stub_section_padding): Likewise. (cmse_scan): New function. (elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets. Set stub_changed to TRUE if such veneers were created. (elf32_arm_swap_symbol_in): Add detection code for CMSE special symbols. include/ * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro. (ARM_SET_SYM_CMSE_SPCL): Likewise. ld/ * ld.texinfo (Placement of SG veneers): New concept entry. * testsuite/ld-arm/arm-elf.exp (Secure gateway veneers: no .gnu.sgstubs section): New test. (Secure gateway veneers: wrong entry functions): Likewise. (Secure gateway veneers (ARMv8-M Baseline)): Likewise. (Secure gateway veneers (ARMv8-M Mainline)): Likewise. * testsuite/ld-arm/cmse-veneers.s: New file. * testsuite/ld-arm/cmse-veneers.d: Likewise. * testsuite/ld-arm/cmse-veneers.rd: Likewise. * testsuite/ld-arm/cmse-veneers.sd: Likewise. * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise. * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-07-05[ARM] Purecode compatible long branch veneer for M-profile targets with MOVW.Andre Vieria1-0/+3
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com> * elf32-arm.c (THUMB32_MOVT): New veneer macro. (THUMB32_MOVW): Likewise. (elf32_arm_stub_long_branch_thumb2_only_pure): New. (DEF_STUBS): Define long_branch_thumb2_only_pure. (arm_stub_is_thumb): Add new veneer stub. (arm_type_of_stub): Use new veneer. (arm_stub_required_alignment): Add new veneer. 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/farcall-thumb2-purecode.d: New test result. * testsuite/ld-arm/farcall-thumb2-purecode.s: New test. * testsuite/ld-arm/arm-elf.exp: Run it.
2016-07-01Fix Thumb-2 BL detectionThomas Preud'homme1-1/+4
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb2_bl): New function. (arm_type_of_stub): Declare thumb2 variable together and change type to bfd_boolean. Use using_thumb2_bl () to determine whether THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be checked for BL range. (elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine the bit size of BL offset. ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7. (Thumb-2 BL on ARMv6-M): New testcase. * testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename. * testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
2016-06-17Add support for Thumb-2 long branch veneersThomas Preud'homme1-1/+4
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com> Tony Wang <tony.wang@arm.com> bfd/ * elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub sequence. (stub_long_branch_thumb2_only): Define stub. (arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only. (arm_stub_long_branch_thumb2_only): Likewise. (arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2 capable targets. ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile): Assemble for ARMv6-M. (Thumb2-Thumb2 farcall M profile): New testcase. * testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file. * testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to reflect the use of Thumb-2 veneers for Thumb-2 capable targets. * testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-05-13Set dynamic tag VMA and size from dynamic section when possibleAlan Modra1-3/+3
Rather than searching the output for a specific named section, it's better, where possible, to use a linker created dynamic section to set a dynamic tag's value. That way ld doesn't depend on the output section name, making it possibile to map dynamic sections differently. bfd/ * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use linker dynamic sections in calculating size and address of * dynamic tags rather than using output sections. Remove asserts. * elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise. * elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise. * elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise. * elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise. * elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise. * elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise. * elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise. * elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise. * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise. * elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise. * elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise. * elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise. * elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise. * elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise. * elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise. * elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise. * elflink.c (bfd_elf_final_link): Likewise. * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise. * elfxx-sparc.c (sparc_finish_dyn): Likewise. Adjust error message. * elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and don't set doit. Look up dynobj section. (elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION invocation and dynamic tag vma calculation. Don't test boolean var == TRUE. * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix DT_JMPREL calc. ld/ * testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing. Use different output file name for static app without .rel.plt. * testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn. * testsuite/ld-arm/arm-no-rel-plt.out: Delete. * testsuite/ld-arm/arm-no-rel-plt.r: New. * testsuite/ld-arm/arm-static-app.d: Don't check file name. * testsuite/ld-arm/arm-static-app.r: Likewise.
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme1-0/+3
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (elf32_arm_merge_eabi_attributes): Add merging logic for Tag_DSP_extension. binutils/ * readelf.c (display_arm_attribute): Add output for Tag_DSP_extension. (arm_attr_public_tags): Define DSP_extension attribute. gas/ * NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions. * config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP instructions. (arm_extensions): Add dsp extension for ARMv8-M Mainline. (aeabi_set_public_attributes): Memorize the feature bits of the architecture selected for Tag_CPU_arch. Use it to set Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension. (arm_convert_symbolic_attribute): Define Tag_DSP_extension. * testsuite/gas/arm/arch7em-bad.d: Rename to ... * testsuite/gas/arm/arch7em-bad-1.d: This. * testsuite/gas/arm/arch7em-bad-2.d: New file. * testsuite/gas/arm/arch7em-bad-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise. * testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise. include/ * elf/arm.h (Tag_DSP_extension): Define. ld/ * testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New test. * testsuite/ld-arm/attr-merge-10b-dsp.s: New file. * testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
2016-05-09[ARM/STM32L4XX] PR 20030: --fix-stm32l4xx-629360 fails to create vldm/vpop ↵Christophe Monat1-1/+5
veneers for double-precision registers bfd/ PR ld/20030 * elf32-arm.c (is_thumb2_vldm): Account for T1 (DP) encoding. (stm32l4xx_need_create_replacing_stub): Rename ambiguous nb_regs to nb_words. (create_instruction_vldmia): Add is_dp to disambiguate SP/DP encoding. (create_instruction_vldmdb): Likewise. (stm32l4xx_create_replacing_stub_vldm): is_dp detects DP encoding, uses it to re-encode. ld/ PR ld/20030 * testsuite/ld-arm/arm-elf.exp: Run new stm32l4xx-fix-vldm-dp tests. Fix misnamed stm32l4xx-fix-all. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.s: New tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-vldm-dp.d: New reference file. * testsuite/ld-arm/stm32l4xx-fix-vldm.s: Add missing comment. * testsuite/ld-arm/stm32l4xx-fix-all.s: Add tests for multiple loads with DP registers. * testsuite/ld-arm/stm32l4xx-fix-all.d: Update reference.
2016-03-10PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targetsMickael Guene1-0/+6
gas/ * config/tc-arm.c (do_arit): Protect against bad relocations usage. (do_mov): Likewise. (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets. (do_t_mov_cmp): Likewise. (do_t_add_sub): Protect against bad relocations usage. (do_t_mov_cmp): Likewise. gas/testsuite/ * gas/arm/adds-thumb1-reloc-local-armv7-m.s: New. * gas/arm/adds-thumb1-reloc-local-armv7-m.d: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.s: New. * gas/arm/movs-thumb1-reloc-local-armv7-m.d: New. ld/ * testsuite/ld-arm/arm-elf.exp: New tests. * testsuite/ld-arm/thumb1-adds-armv7-m.s: New. * testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
2016-02-04Remove support for creating ARM NOREAD sections.Nick Clifton1-12/+0
gas * config/obj-elf.c (obj_elf_change_section): Remove support for ARM NOREAD sections. * config/tc-arm.c (arm_elf_section_letter): Delete. * config/tc-arm.h (md_elf_section_letter): Delete. * doc/c-arm.texi (ARM Section Attribute): Delete section. * testsuite/gas/arm/section-execute-only.d: Delete. * testsuite/gas/arm/section-execute-only.s: Delete. ld * testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests. * testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete. * testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete. * testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete. * testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete. * testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete. * testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete. * testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete. * testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
2016-01-21Fix linker testsuite failures for ARM netbsdelf target.Nick Clifton1-5/+21
PR ld/19453 * testsuite/ld-arm/arm-elf.exp: Skip tests that do not work for the arm-netbsdelf target.
2016-01-14Fix Thumb-Thumb farcall v6-M (no profile) testThomas Preud'homme1-1/+1
2016-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)): Set address of .foo section when linking. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc in .foo section. * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected output to the above changes.
2016-01-12Add cantunwind when unwind info does not match start of section.Yury Usishchev1-0/+3
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when address in first unwind entry does not match start of section. tests * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-mix.d: New file. * ld-arm/unwind-mix1.s: New file. * ld-arm/unwind-mix2.s: New file.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-26Add test for ARMv6-M farcall with no profile infoThomas Preud'homme1-0/+4
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> ld/testsuite/ * ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no profile)". * ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file. * ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise. * ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
2015-12-24Add support for linking ARMv8-M object filesThomas Preud'homme1-0/+15
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise.
2015-12-22ARM: Fix exidx coverage for relocatable builds.Yury Usishchev1-0/+6
bfd * elf-bfd.h: Add callback to count additional relocations. * elf32-arm.c (_arm_elf_section_data): Add new counter. (insert_cantunwind_after): Increment relocations counter. (elf32_arm_fix_exidx_coverage): Remove exidx entries and add terminating CANTUNWIND entry only in final builds. (elf32_arm_add_relocation): New function. (elf32_arm_write_section): Add relocations in relocatable builds. (elf32_arm_count_additional_relocs): New function. (elf_backend_count_additional_relocs): New define. * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of .rel section. * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define. ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call elf32_arm_fix_exidx_coverage for relocatable builds. ld/testsuite * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-rel.d: New file. * ld-arm/unwind-rel1.s: New file. * ld-arm/unwind-rel2.s: New file. * ld-arm/unwind-rel3.s: New file.
2015-12-22Add support for ARM's NOREAD section flag.Mickael Guene1-0/+12
include/elf * arm.h: Add arm SHF_ARM_NOREAD section flag. bfd * bfd-in2.h: Regenerate. * section.c: Add SEC_ELF_NOREAD. * elf32-arm.c (elf32_arm_post_process_headers): Only set PF_X attribute if a segment only contains section with SHF_ARM_NOREAD flag. (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion. (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD to bfd flag. (elf32_arm_lookup_section_flags): New function to allow INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag. (elf32_arm_special_sections): Add special sections array to catch section prefix by '.text.noread' pattern. ld/testsuite * ld-arm/arm-elf.exp: New tests. * ld-arm/thumb1-input-section-flag-match.d: New * ld-arm/thumb1-input-section-flag-match.s: New * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New * ld-arm/thumb1-noread-present-one-section.d: New * ld-arm/thumb1-noread-present-one-section.s: New * ld-arm/thumb1-noread-present-two-section.d: New * ld-arm/thumb1-noread-present-two-section.s: New binutils * readelf.c (get_elf_section_flags): Add support for ARM specific section flags.
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene1-0/+6
To support thumb1 execute-only code we need to support four new relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC). These relocations allow the static linker to finalize construction of symbol address. Typical sequence of code to get address of the symbol foo is then the following : movs r3, #:upper8_15:#foo lsls r3, #8 adds r3, #:upper0_7:#foo lsls r3, #8 adds r3, #:lower8_15:#foo lsls r3, #8 adds r3, #:lower0_7:#foo This will give following sequence of text and relocations after assembly : 4: 2300 movs r3, #0 4: R_ARM_THM_ALU_ABS_G3_NC foo 6: 021b lsls r3, r3, #8 8: 3300 adds r3, #0 8: R_ARM_THM_ALU_ABS_G2_NC foo a: 021b lsls r3, r3, #8 c: 3300 adds r3, #0 c: R_ARM_THM_ALU_ABS_G1_NC foo e: 021b lsls r3, r3, #8 10: 3300 adds r3, #0 10: R_ARM_THM_ALU_ABS_G0_NC foo
2015-10-27Add --fix-stm32l4xx-629360 to the ARM linker to enable a link-time ↵Laurent Alfonsi1-0/+18
workaround for a bug in the bus matrix / memory controller for some of the STM32 Cortex-M4 based products (STM32L4xx). bfd * bfd-in2.h: Regenerate. * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how STM32L4XX instruction scanning should be done. (bfd_elf32_arm_set_stm32l4xx_fix) (bfd_elf32_arm_stm32l4xx_erratum_scan) (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes. (bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument to prototype. * elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME) (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros. (elf32_stm32l4xx_erratum_type): New enum. (elf32_stm32l4xx_erratum_list): New struct. List of veneers or jumps to veneers. (_arm_elf_section_data): Add stm32l4xx_erratumcount, stm32l4xx_erratumlist. (elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size, stm32l4xx_fix and num_stm32l4xx_fixes fields. (ctz): New function. (popcount): New function. (elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix. (put_thumb2_insn): New function. (STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for LDM instructions. (STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for VLDM instructions. (bfd_elf32_arm_allocate_interworking_sections): Initialise erratum glue section. (record_stm32l4xx_erratum_veneer) : New function. Create a single veneer, and its associated symbols. (bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue. (bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of erratum workaround required. (bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find out where veneers and branches to veneers have been placed in virtual memory after layout. (is_thumb2_ldmia): New function. (is_thumb2_ldmdb): Likewise. (is_thumb2_vldm ): Likewise. (stm32l4xx_need_create_replacing_stub): New function. Decide if a veneer must be emitted. (bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an input BFD for potential erratum-triggering insns. Record results. (bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in global hash table. (elf32_arm_size_dynamic_sections): Collect glue information. (create_instruction_branch_absolute): New function. (create_instruction_ldmia): Likewise. (create_instruction_ldmdb): Likewise. (create_instruction_mov): Likewise. (create_instruction_sub): Likewise. (create_instruction_vldmia): Likewise. (create_instruction_vldmdb): Likewise. (create_instruction_udf_w): Likewise. (create_instruction_udf): Likewise. (push_thumb2_insn32): Likewise. (push_thumb2_insn16): Likewise. (stm32l4xx_fill_stub_udf): Likewise. (stm32l4xx_create_replacing_stub_ldmia): New function. Expands the replacing stub for ldmia instructions. (stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb. (stm32l4xx_create_replacing_stub_vldm): Likewise for vldm. (stm32l4xx_create_replacing_stub): New function. Dispatches the stub emission to the appropriate functions. (elf32_arm_write_section): Output veneers, and branches to veneers. ld * ld.texinfo: Description of the STM32L4xx erratum workaround. * emultempl/armelf.em (stm32l4xx_fix): New. (arm_elf_before_allocation): Choose the type of fix, scan for erratum. (gld${EMULATION_NAME}_finish): Fix veneer locations. (arm_elf_create_output_section_statements): Propagate stm32l4xx_fix value. (PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX. (PARSE_AND_LIST_LONGOPTS): Add entry for handling --fix-stm32l4xx-629360. (PARSE_AND_LIST_OPTION): Add entry for helping on --fix-stm32l4xx-629360. (PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX. tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX tests. * ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New. * ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-all.d: Likewise. * ld-arm/stm32l4xx-fix-all.s: Likewise. * ld-arm/stm32l4xx-fix-it-block.d: Likewise. * ld-arm/stm32l4xx-fix-it-block.s: Likewise. * ld-arm/stm32l4xx-fix-ldm.d: Likewise. * ld-arm/stm32l4xx-fix-ldm.s: Likewise. * ld-arm/stm32l4xx-fix-vldm.d: Likewise. * ld-arm/stm32l4xx-fix-vldm.s: Likewise.
2015-07-27[ARM] Fix extern protected data handlingSzabolcs Nagy1-0/+1
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data in shared objects. This is needed for the fix of glibc bug 17711: https://sourceware.org/bugzilla/show_bug.cgi?id=17711 bfd: PR ld/18705 * elf32-arm.c (elf_backend_extern_protected_data): Define. ld/testsuite: PR ld/18705 * ld-arm/protected-data.d: New. * ld-arm/protected-data.s: New. * ld-arm/arm-elf.exp: Add new test.
2015-02-26[ARM]Update for Tag_ABI_HardFP_use per EABI docTerry Guo1-0/+2
Updated how we merge and display this attribute per the latest EABI documents. bfd/ChangeLog * elf32-arm.c (elf32_arm_merge_eabi_attributes): Update how we merge Tag_ABI_HardFP_use. binutils/ChangeLog * readelf.c (arm_attr_tag_ABI_HardFP_use): Update how we display it. ld/testsuite/ChangeLog * ld-arm/attr-merge-3.attr: Remove Tag_ABI_HardFP_use. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/attr-merge-vfp-6.d: Likewise. * ld-arm/attr-merge-vfp-6r.d: Likewise. * ld-arm/attr-merge-vfp-7.d: Likewise. * ld-arm/attr-merge-vfp-7r.d: Likewise. * ld-arm/attr-merge-vfp-8.d: Likewise. * ld-arm/attr-merge-vfp-8r.d: Likewise.
2015-01-14[ARM] Reject R_ARM_REL32 when trying to defer it to runtimeJiong Wang1-0/+2
bfd/ * elf32-arm.c (elf32_arm_final_link_relocate): Reject R_ARM_32/_NOI when trying to defer them to runtime. ld/testsuite/ * ld-arm/elf32-reject.s: New testcase. * ld-arm/elf32-reject.d: Likewise. * ld-arm/elf32-reject-pie.s: Likewise. * ld-arm/elf32-reject-pie.d: Likewise. * ld-arm/arm-elf.exp: Run new testcases. * ld-arm/ifunc-7.s: Delete f2/f4 test items. * ld-arm/ifunc-7.rd: Likewise. * ld-arm/ifunc-7.gd: Likewise. * ld-arm/ifunc-7.dd: Likewise. * ld-arm/ifunc-8.s: Likewise. * ld-arm/ifunc-8.rd: Likewise. * ld-arm/ifunc-8.gd: Likewise. * ld-arm/ifunc-8.dd: Likewise.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-11-21Support ARM Cortex-M7Terry Guo1-0/+14
include/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. bfd/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Support FPv5. binutils/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * readelf.c (arm_attr_tag_FP_arch): Extended to support FPv5. gas/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (fpu_vfp_ext_armv8xd): New. (arm_cpus): Support cortex-m7. (arm_fpus): Support fpv5-sp-d16 and fpv5-d16. (do_vfp_nsyn_cvt_fpv8): Generate error when use D register for S register only target like FPv5-SP-D16. (do_neon_cvttb_1): Likewise. (do_vfp_nsyn_fpv8): Likewise. (do_vrint_1): Likewise. (aeabi_set_public_attributes): Set proper FP arch for FPv5. * doc/c-arm.texi: Document new cpu and fpu names for cortex-m7. gas/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * gas/arm/armv7e-m+fpv5-d16.s: New. * gas/arm/armv7e-m+fpv5-d16.d: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.s: Likewise. * gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise. ld/testsuite/ChangeLog: 2014-11-21 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-vfp-4-sp.s: New test source file. * ld-arm/attr-merge-vfp-5-sp.s: Likewise. * ld-arm/attr-merge-vfp-5.s: Likewise. * ld-arm/attr-merge-vfp-8.d: New test. * ld-arm/attr-merge-vfp-8r.d: Likewise. * ld-arm/attr-merge-vfp-9.d: Likewise. * ld-arm/attr-merge-vfp-9r.d: Likewise. * ld-arm/attr-merge-vfp-10.d: Likewise. * ld-arm/attr-merge-vfp-10r.d: Likewise. * ld-arm/attr-merge-vfp-11.d: Likewise. * ld-arm/attr-merge-vfp-11r.d: Likewise. * ld-arm/attr-merge-vfp-12.d: Likewise. * ld-arm/attr-merge-vfp-12r.d: Likewise. * ld-arm/attr-merge-vfp-13.d: Likewise. * ld-arm/attr-merge-vfp-13r.d: Likewise. * ld-arm/attr-merge-vfp-14.d: Likewise. * ld-arm/attr-merge-vfp-14r.d: Likewise. * ld-arm/arm-elf.exp: Run the new tests.
2014-11-20Enable to link ARM object file that hasn't attribute section.Terry Guo1-0/+1
bfd/ChangeLog 2014-11-20 Terry Guo <terry.guo@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Skip if input bfd hasn't attribute section. ld/testsuite/ChangeLog: 2014-11-20 Terry Guo <terry.guo@arm.com> * ld-arm/attr-merge-nosection-1.d: New file. * ld-arm/attr-merge-nosection-1a.s: Likewise. * ld-arm/attr-merge-nosection-1b.s: Likewise. * ld-arm/arm-elf.exp: Include the new test.
2014-09-16Make the linker return an error status if it fails to merge ARM binaries withTerry Guo1-0/+1
different architecture tags. Add a test case to make sure that this works, and update readelf so that it will not seg-fault when trying to display the attributes of binaries with invalid architecture tags. * elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if failed to merge. * ld-arm/attr-merge-arch-2.d: New test case. * ld-arm/attr-merge-arch-2a.s: New test case source file. * ld-arm/attr-merge-arch-2b.s: Likewise. * ld-arm/arm-elf.exp: Run new test case. * readelf.c (display_arm_attribute): Use unsigned int type for tag, val and type variables.
2014-08-21bfd/ChangeLogTerry Guo1-0/+35
2014-08-21 Tony Wang <tony.wang@arm.com> * elf32-arm.c (elf32_arm_final_link_relocate): Implement the veneer routine for R_ARM_THM_JUMP19. (arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19 (elf32_arm_size_stub): Ditto. ld/testsuite/ChangeLog 2014-08-21 Tony Wang <tony.wang@arm.com> * ld-arm/jump-reloc-veneers-cond.s: New test. * ld-arm/farcall-cond-thumb-arm.s: Ditto. * ld-arm/jump-reloc-veneers-cond-short.d: Expected output for target without a veneer generation. * ld-arm/jump-reloc-veneers-cond-long.d: Expected output for target with a veneer generation. * ld-arm/farcall-cond-thumb-arm.d: Expected output for inter working veneer generation. * ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
2014-08-20Fix PR ld/17277: bogus dynamic relocs and TEXTREL for ARM PC-relative relocsRoland McGrath1-0/+4
bfd/ PR ld/17277 * elf32-arm.c (elf32_arm_check_relocs): Increment P->pc_count for all reloc types with pc_relative set in the howto, not just for R_ARM_REL32 and R_ARM_REL32_NOI. (allocate_dynrelocs_for_symbol): Update comment. (elf32_arm_gc_sweep_hook): For all reloc types with pc_relative set in the howto, set call_reloc_p and may_need_local_target_p but not may_become_dynamic_p; not only for R_ARM_REL32 and R_ARM_REL32_NOI. (elf32_arm_check_relocs): Likewise. ld/testsuite/ PR ld/17277 * ld-arm/pcrel-shared.s: New file. * ld-arm/pcrel-shared.rd: New file. * ld-arm/arm-elf.exp (armelftests_common): Add it.
2014-07-10Fix tests when configured for arm-linux and arm-elfWill Newton1-190/+190
With this change all gas and most ld tests pass when configured for arm-linux. It doesn't look like these configurations have been tested in a long time but this attempts to stem the bit-rot slightly. gas/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * gas/arm/bl-local-2.d: Only enable the test on EABI and NaCl configurations. * gas/arm/bl-local-v4t.d: Likewise. * gas/arm/blx-local.d: Likewise. * gas/arm/branch-reloc.d: Likewise. ld/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix tests, IFUNC tests and other EABI requiring tests to... (armeabitests_nonacl): ...here. * ld-arm/arm-app-abs32.d: Loosen regex for architecture type to allow test to pass on configurations without an attributes section. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-static-app.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-far.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-descrelax-be32.d: Likewise. * ld-arm/tls-descrelax.d: Likewise. * ld-arm/tls-descseq.d: Likewise. * ld-arm/tls-gdesc-got.d: Likewise. * ld-arm/tls-gdesc.d: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-thumb1.d: Likewise.
2014-06-16ld/ARM: Fix IFUNC and TLS descriptors in the same shared objectWill Newton1-0/+3
Combining TLS descriptors and GNU indirect functions in the same object could lead to assertions or multiple dynamic relocations for the same GOT slot. Fix the bookkeeping so this doesn't happen. This allows building and make checking glibc with -mtls-dialect=gnu2. bfd/ChangeLog: 2014-06-16 Will Newton <will.newton@linaro.org> * elf32-arm.c (elf32_arm_allocate_plt_entry): Increment htab->next_tls_desc_index in the non-IPLT case. Calculate GOT offset correctly for the non-IPLT case. (allocate_dynrelocs_for_symbol): Don't increment htab->next_tls_desc_index here. ld/testsuite/ChangeLog: 2014-06-16 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Add ifunc-gdesc test. * ld-arm/ifunc-gdesc.r: New file. * ld-arm/ifunc-gdesc.s: Likewise. * ld-arm/ifunc-gdesc.ver: Likewise.
2014-03-06Disable --long-plt test for arm-nacl targets.Roland McGrath1-4/+4
ld/testsuite/ * ld-arm/arm-elf.exp (armelftests_common): Move long-plt case ... (armelftests_nonacl): ... here.
2014-03-05Update copyright yearsAlan Modra1-1/+1
2014-03-01ld-arm/long-plt-format.d, ld-arm/arm-elf.exp: Adjust for arm-eabi.Yuri Gribov1-1/+1
2014-02-27This patch adds support for ARM PLT entries that support a full 32-bit ↵Yuri Gribov1-1/+5
offset range. Enabled via the use of a new linker command line option: --long-plt. * bfd-in.h: Add export of bfd_elf32_arm_use_long_plt. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_plt_entry_long): New array. (elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if using long PLT entries. (bfd_elf32_arm_use_long_plt): New function. (elf32_arm_populate_plt_entry): Add support for long PLT entries. * emultempl/armelf.em (OPTION_LONG_PLT): Define. (PARSE_AND_LIST_LONGOPTS): Add long-plt. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Handle long-plt. * ld.texinfo: Document --long-plt. * ld-arm/long-plt-format.s: New test case. * ld-arm/long-plt-format.d: Expected disassembly. * ld-arm/arm-elf.exp: Run the new test.
2013-08-14 PR ld/15787Nick Clifton1-0/+1
* elf32-arm.c (elf32_arm_final_link_relocate): Use origin of output segment containing the relocating symbol instead of assuming 0 for sb group relocations. * ld-arm/group-relocs-ldr-bad.s: Redefine bar into foo section beyond 16 bit offset width. * ld-arm/group-relocs-ldrs-bad.s: Likewise. * ld-arm/group-relocs-ldr-bad.d: Adjust expected result. * ld-arm/group-relocs-ldrs-bad.d: Likewise. * ld-arm/group-relocs.s: Add comments. Move symbols used for sb group relocations into .data section. Drop section zero. Use pc/r0 as base register when pc/sb group relocations are used. * ld-arm/group-relocs.d: Adjust expected result. * ld-arm/group-relocs-alu-bad-2.d: New test for sb group relocation. * ld-arm/group-relocs-ldc-bad-2.d: Likewise. * ld-arm/group-relocs-ldr-bad-2.d: New test for pc group relocation. * ld-arm/group-relocs-ldrs-bad-2.d: Likewise. * ld-arm/unresolved-2.d: Add sb relocation failure test. * ld-arm/group-relocs-alu-bad-2.s: New test source. * ld-arm/group-relocs-ldr-bad-2.s: Likewise. * ld-arm/group-relocs-ldrs-bad-2.s: Likewise. * ld-arm/group-relocs-ldc-bad-2.s: Likewise. * ld-arm/unresolved-2.s: Likewise. * ld-arm/arm-elf.exp: For group-relocs, drop section zero start definition. Run the new tests.
2013-07-31 PR ld/15787Nick Clifton1-1/+5
* elf32-arm.c (elf32_arm_final_link_relocate): Base SB on the output section VMA. * ld-arm/group-relocs-alu-bad-2.d; New. * ld-arm/group-relocs-alu-bad-2.s: New. * ld-arm/group-relocs-ldc-bad-2.d: New. * ld-arm/group-relocs-ldc-bad-2.s: New. * ld-arm/group-relocs-ldr-bad-2.d: New. * ld-arm/group-relocs-ldr-bad-2.s: New. * ld-arm/group-relocs-ldrs-bad-2.d: New. * ld-arm/group-relocs-ldrs-bad-2: New. * ld-arm/arm-elf.exp: Add the new tests. * ld-arm/group-relocs-ldr-bad.d: Update expected output. * ld-arm/group-relocs-ldr-bad.s: Likewise. * ld-arm/group-relocs-ldrs-bad.d: Likewise. * ld-arm/group-relocs-ldrs-bad.s: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/group-relocs.s: Likewise.
2013-07-18 * elf32-arm.c (elf32_arm_stub_long_branch_arm_nacl): New variable.Nick Clifton1-171/+201
(elf32_arm_stub_long_branch_arm_nacl_pic): New variable. (arm_build_one_stub): Increase MAXRELOCS to 3. (arm_type_of_stub): Use them if GLOBALS->nacl_p. (struct elf32_arm_link_hash_table): Give add_stub_section member's pointee type a third argument. (elf32_arm_create_or_find_stub_sec): Update caller. (elf32_arm_size_stubs): Update argument type. * bfd-in.h (elf32_arm_size_stubs): Update decl. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * emultempl/armelf.em (elf32_arm_add_stub_section): Take third argument ALIGNMENT_POWER, use it instead of constant 3. * ld-arm/farcall-arm-nacl.d: New file. * ld-arm/farcall-arm-nacl-pic.d: New file. * ld-arm/farcall-data-nacl.d: New file. * ld-arm/arm-elf.exp (armeabitests_common): Add extra element to "action" lists for those cases to use a different dump file for NaCl targets. Massage $armeabitests_common to drop the extra element or the one before it, depending on [istarget "arm*-*-nacl*"]. * ld-arm/arm-elf.exp (armelftests_common): Move all "Cortex-A8 erratum fix", Thumb-only and interworking cases to ... (armelftests_nonacl): ... here. (armeabitests_common): Move all "erratum 760522 fix", Thumb-only and interworking cases to ... (armeabitests_nonacl): ... here.
2013-06-13 PR ld/15302Nick Clifton1-2/+7
* elf32-arm.c (allocate_dynrelocs_for_symbol): Transform ST_BRANCH_TO_ARM into ST_BRANCH_TO_THUMB if the target only supports thumb instructions. PR ld/15302 * ld-arm/branch-lks-sym.ld: New script. * ld-arm/thumb-b-lks-sym.s: New test. * ld-arm/thumb-b-lks-sym.d: Expected disassembly. * ld-arm/thumb-bl-lks-sym.s: New test. * ld-arm/thumb-bl-lks-sym.d: Expected disassembly. * ld-arm/arm-elf.exp: Run the new tests.
2013-04-30ld/testsuite/ld-arm: Fix ifunc-17 failure with arm-eabi.Will Newton1-1/+1
ld/testsuite/ChangeLog: 2013-04-30 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Use linker script for IFUNC test 17. * ld-arm/ifunc-17.dd: Update offsets for linker script. * ld-arm/ifunc-17.gd: Likewise. * ld-arm/ifunc-17.rd: Likewise.
2013-04-29bfd/efl32-arm.c: Fix handling of IRELATIVE relocs.Will Newton1-0/+5
bfd/ChangeLog: 2013-04-24 Will Newton <will.newton@linaro.org> * elf32-arm.c (elf32_arm_populate_plt_entry): Call elf32_arm_add_dynreloc when emitting R_ARM_IRELATIVE relocs. ld/testsuite/ChangeLog: 2013-04-24 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Add IFUNC test 17. * ld-arm/ifunc-17.dd: New file. * ld-arm/ifunc-17.gd: Likewise. * ld-arm/ifunc-17.rd: Likewise. * ld-arm/ifunc-17.s: Likweise. * ld-arm/ifunc-1.rd: Reorder relocs to match linker output. * ld-arm/ifunc-2.rd: Likewise. * ld-arm/ifunc-5.rd: Likewise. * ld-arm/ifunc-6.rd: Likewise.
2013-03-15gas/testsuite/ChangeLog:Will Newton1-1/+1
2013-03-15 Will Newton <will.newton@linaro.org> * gas/arm/any-idiv.d: Expand *-*eabi test to cover *-*eabi*. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/arch4t.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv8-a+crypto.d: Likewise. * gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/arm/attr-march-armv8-a.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumbrel.d: Likewise. ld/testsuite/ChangeLog: 2013-03-15 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp: Expand *-*eabi test to cover *-*eabi*. * ld-arm/gc-hidden-1.d: Likewise. * ld-elfvsb/elfvsb.exp: Likewise. * ld-shared/shared.exp: Likewise.
2013-02-28 bfd/Julian Brown1-0/+3
* elf32-arm.c (elf32_arm_size_dynamic_sections): Don't call elf32_arm_allocate_dynrelocs for source reloc for non-dynamic link. ld/testsuite/ * ld-arm/tls-local-static.s: New test. * ld-arm/tls-local-static.d: New. * ld-arm/arm-elf.exp (tls-local-static): Add test.
2013-02-19 * lib/ld-lib.exp (run_ld_link_tests): Add another argument, passMaciej W. Rozycki1-174/+174
its contents to ar_simple_create and ld_simple_link after objfiles. * ld-aarch64/aarch64-elf.exp: Adjust accordingly. * ld-alpha/alpha.exp: Likewise. * ld-arm/arm-elf.exp: Likewise. * ld-arm/export-class.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/eh-group.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/export-class.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-frv/tls.exp: Likewise. * ld-i386/export-class.exp: Likewise. * ld-i386/i386.exp: Likewise. * ld-ia64/ia64.exp: Likewise. * ld-libs/libs.exp: Likewise. * ld-m68k/m68k.exp: Likewise. * ld-metag/metag.exp: Likewise. * ld-mips-elf/comm-data.exp: Likewise. * ld-mips-elf/export-class.exp: Likewise. * ld-mips-elf/mips-elf.exp: Likewise. * ld-mn10300/mn10300.exp: Likewise. * ld-pe/pe-compile.exp: Likewise. * ld-pe/pe.exp: Likewise. * ld-plugin/plugin.exp: Likewise. * ld-powerpc/aix52.exp: Likewise. * ld-powerpc/export-class.exp: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-s390/s390.exp: Likewise. * ld-sh/sh-vxworks.exp: Likewise. * ld-sh/sh64/sh64.exp: Likewise. * ld-sparc/sparc.exp: Likewise. * ld-tic6x/tic6x.exp: Likewise. * ld-tilegx/tilegx.exp: Likewise. * ld-tilepro/tilepro.exp: Likewise. * ld-undefined/entry.exp: Likewise. * ld-vax-elf/vax-elf.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/export-class.exp: Likewise. * ld-x86-64/x86-64.exp: Likewise. * ld-xc16x/xc16x.exp: Likewise. * ld-xstormy16/xstormy16.exp: Likewise. * ld-xtensa/xtensa.exp: Likewise.
2012-10-30bfd:Nick Clifton1-0/+15
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5 (elf32_arm_post_process_headers): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. binutils: * readelf.c (decode_ARM_machine_flags): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out the code for EABI_VER4 and EABI_VER5 to allow this. elfcpp: * arm.h: New enum for EABI soft- and hard-float flags. gold: * gold.cc (Target_arm::do_adjust_elf_header): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. include: * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. (EF_ARM_ABI_FLOAT_HARD): Likewise. ld/testsuite: * ld-arm/eabi-hard-float.s: New test source. * ld-arm/eabi-soft-float.s: New test source. * ld-arm/eabi-hard-float.d: New test. * ld-arm/eabi-soft-float.d: New test. * ld-arm/eabi-soft-float-ABI4.d: New test. * ld-arm/eabi-soft-float-r.d: New test. * ld-arm/arm-elf.xp: Use the new tests. binutils: PR binutils/14779 * configure.in: Add checks for wchar.h and mbstate_t. * config.in: Regenerate. * configure: Regenerate. * readelf.c: Conditionally include wchar.h. (print_symbol): Conditionally use mbstate_t.
2012-08-24 * bfd/elf32-arm.c (v8): New array.Matthew Gretton-Dann1-0/+2
(tag_cpu_arch_combine): Add support for ARMv8 attributes. (elf32_arm_merge_eabi_attributes): Likewise. (VFP_VERSION_COUNT): New define. * binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8. (arm_attr_tag_FP_arch): Likewise. (arm_attr_tag_Advanced_SIMD_arch): Likewise. * gas/config/tc-arm.h (arm_ext_v8): New variable. (fpu_vfp_ext_armv8): Likewise. (fpu_neon_ext_armv8): Likewise. (fpu_crypto_ext_armv8): Likewise. (arm_archs): Add armv8-a. (arm_extensions): Add crypto, fp, and simd. (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. (cpu_arch_ver): Add support for ARMv8. (aeabi_set_public_sttributes): Likewise. * gas/doc/c-arm.texi (ARM Options): Document new architecture and extension options for ARMv8. * gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected output. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase. * gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * include/elf/arm.h (TAG_CPU_ARCH_V8): New define. (MAX_TAG_CPU_ARCH): Update. * include/opcode/arm.h (ARM_EXT_V8): New define. (FPU_VFP_EXT_ARMV8): Likewise. (FPU_NEON_EXT_ARMV8): Likewise. (FPU_CRYPTO_EXT_ARMV8): Likewise. (ARM_AEXT_V8A): Likewise. (FPU_VFP_ARMV8): Likwise. (FPU_NEON_ARMV8): Likewise. (FPU_CRYPTO_ARMV8): Likewise. (FPU_ARCH_VFP_ARMV8): Likewise. (FPU_ARCH_NEON_VFP_ARMV8): Likewise. (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. (ARM_ARCH_V8A): Likwise. (ARM_ARCH_V8A_FP): Likewise. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTO): Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected output. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase. * ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
generated by cgit v1.1 at 2025-02-18 21:22:22 +0000