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path: root/ld/testsuite/ld-aarch64/emit-relocs-270.d
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2016-02-26[BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check.Renlin Li1-9/+8
For these three relocations, 17 bit signed value should be used, instead of 16 bit. The bitsize field is changed from 16 to 17, this field in aarch64 backend is used for overflow check only. bfd/ 2016-02-26 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2. ld/ 2016-02-26 Renlin Li <renlin.li@arm.com> * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases. * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary. * testsuite/ld-aarch64/emit-relocs-271.d: Likewise. * testsuite/ld-aarch64/emit-relocs-272.d: Likewise. * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New. * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
2013-01-04opcodes/Yufeng Zhang1-1/+1
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-opc.c (aarch64_print_operand): Change to print AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal in comment. * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and OP_MOV_IMM_WIDE. gas/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/int-insns.d: Update. * gas/aarch64/mov.d: Update. * gas/aarch64/reloc-insn.d: Update. ld/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to the objdump directive. * ld-aarch64/emit-relocs-266.d: Ditto. * ld-aarch64/emit-relocs-268.d: Ditto. * ld-aarch64/emit-relocs-269.d: Ditto. * ld-aarch64/emit-relocs-270.d: Ditto. * ld-aarch64/emit-relocs-271.d: Ditto. * ld-aarch64/emit-relocs-272.d: Ditto.
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+14