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2015-07-26Compile PR ld/18718 tests with -O2H.J. Lu1-0/+5
2015-07-26Set errcnt and warncnt to 0 in run_host_cmd_yesnoH.J. Lu1-0/+5
2015-07-25Add missing ChangeLog filesH.J. Lu1-0/+6
2015-07-25Fix broken -Bsymbolic-functionsAlan Modra1-0/+6
2015-07-24Replace -g with -ggdb3 in ld compress testsH.J. Lu1-0/+6
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu1-12/+12
2015-07-16[AArch64][3/3] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21Jiong Wang1-0/+6
2015-07-14Make default compression gABI compliantH.J. Lu1-0/+6
2015-07-092015-07-09 Catherine Moore <clm@codesourcery.com>Catherine Moore1-0/+15
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov1-0/+5
2015-07-05Fix an opd->append index in elf64-ppc.cRichard Sandiford1-0/+7
2015-07-03Add experimental support for --gc-sections with COFF and PE based targets.Kai Tietz1-0/+7
2015-07-01Add Nios II arch flags and compatibility testsSandra Loosemore1-0/+9
2015-06-27Update xtensa linker testsH.J. Lu1-0/+5
2015-06-26Add support for DT_MIPS_RLD_MAP_REL.Matthew Fortune1-0/+22
2015-06-25Run ld-elf/strtab only on linux/gnu targetsH.J. Lu1-0/+4
2015-06-25Update .strtab section sizes in mmix testsH.J. Lu1-0/+6
2015-06-25Use strtab with GC and suffix merging for .strtabH.J. Lu1-0/+6
2015-06-24Keep .plt section and DT_PLTGOT for prelinkH.J. Lu1-0/+9
2015-06-23[AArch64] Generate DT_TEXTREL for relocation against read-only sectionJiong Wang1-0/+6
2015-06-17[AArch64] Select correct linker emulation for ILP32 according to endianesJiong Wang1-0/+6
2015-06-16ppc476 linker workaround shared lib fixes againAlan Modra1-0/+6
2015-06-12Add new ld option: --print-memory-usageTristan Gingold1-0/+13
2015-06-05Fixes a typo in the list of targets that should not run the compressed1d test.Nick Clifton1-0/+4
2015-06-05ppc476 linker workaround shared lib fixesAlan Modra1-0/+8
2015-06-02[AArch64] Fix typo in testcaseJiong Wang1-0/+4
2015-06-01[AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14Jiong Wang1-0/+6
2015-06-01[AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow checkJiong Wang1-0/+6
2015-06-01[AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang1-0/+6
2015-05-29Fix building PE test executables in environments where $CFLAGS is needed.Stephen Kitt1-0/+5
2015-05-28Compact EH SupportCatherine Moore1-0/+18
2015-05-27Convert PLT reloc only if pointer equality isn't neededH.J. Lu1-0/+10
2015-05-16Don't generate PLT relocations for now bindingH.J. Lu1-0/+7
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu1-0/+8
2015-05-13Add missing ChangeLog entries for PR binutis/18386H.J. Lu1-0/+6
2015-05-12Allocate the first .plt entry space only if neededH.J. Lu1-0/+9
2015-05-11Default e_machine to EM_IAMCU for i?86-*-elfiamcuH.J. Lu1-0/+5
2015-05-11Add Intel MCU support to ldH.J. Lu1-0/+12
2015-04-29Link the last *normal against libfoozlib.soH.J. Lu1-0/+6
2015-04-29[ARM] Update ld testcasesJiong Wang1-0/+5
2015-04-27S/390: Fix gotreloc_31-1 testcase.Andreas Krebbel1-0/+4
2015-04-25Non-alloc sections don't belong in PT_LOAD segmentsAlan Modra1-0/+4
2015-04-24[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.Richard Earnshaw1-0/+27
2015-04-24Skip the compressed1d test for targets which do not use the elf32.em linker e...Nick Clifton1-0/+5
2015-04-24Correct ld-elf/compressed1e.d to use notarget and for cris-elf, not cris-*.Hans-Peter Nilsson1-0/+5
2015-04-23Xfail cris and frv for ld-elf/compressed1e.dH.J. Lu1-0/+5
2015-04-23Delay setting up compressed debug section namesH.J. Lu1-0/+6
2015-04-23Accept odd result in ld-powerpc/tocnovar testcaseAlan Modra1-0/+1
2015-04-23Align .TOC. for PowerPC64Alan Modra1-0/+28
2015-04-22Rewrite relro adjusting codeAlan Modra1-0/+4
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