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2002-05-28Add DLX targetNick Clifton7-1/+354
2002-05-25 * ia64.h: Use #include "" instead of <> for local header files.Alan Modra3-4/+9
* sparc.h: Likewise.
2002-05-24* sim-d10v.h: Delete file. Moved to include/gdb/.Andrew Cagney3-0/+8
* sim-d10v.h: New file. Moved from include/sim-d10v.h. * Makefile.in (INCLUDE): Add "gdb/sim-d10v.h". * interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h". * d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h". * Makefile.in (sim_d10v_h): Update definition.
2002-05-23 * elf.c (_bfd_elf_make_section_from_shdr): Set SEC_THREAD_LOCALJakub Jelinek4-3/+32
for symbols from SHF_TLS section. (_bfd_elf_print_private_bfd_data): Add PT_TLS. (elf_fake_sections): Set SHF_TLS for SEC_THREAD_LOCAL sections. (map_sections_to_segments): Build PT_TLS segment if necessary. (assign_file_positions_for_segments): Likewise. (get_program_header_size): Account for PT_TLS segment. (swap_out_syms): Set type of BSF_THREAD_LOCAL symbols and symbols from SEC_THREAD_LOCAL sections to STT_TLS. * reloc.c: Add 386 and IA-64 TLS relocs. * section.c (SEC_THREAD_LOCAL): Define. (SEC_CONSTRUCTOR_TEXT, SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS): Remove. * elflink.h (elf_link_add_object_symbols): Support .tcommon. (size_dynamic_sections): If DF_STATIC_TLS, set DF_FLAGS unconditionally. (struct elf_final_link_info): Add first_tls_sec. (elf_bfd_final_link): Set first_tls_sec. Compute elf_hash_table (info)->tls_segment. (elf_link_output_extsym): Handle STT_TLS symbols. (elf_link_input_bfd): Likewise. * syms.c (BSF_THREAD_LOCAL): Define. * bfd-in2.h: Rebuilt. * libbfd.h: Rebuilt. * elf32-i386.c (elf_i386_tls_transition, dtpoff_base, tpoff, elf_i386_mkobject, elf_i386_object_p): New functions. (elf_howto_table): Add TLS relocs. (elf_i386_reloc_type_lookup): Support TLS relocs. (elf_i386_info_to_howto_rel): Likewise. (struct elf_i386_link_hash_entry): Add tls_type. (struct elf_i386_obj_tdata): New. (elf_i386_hash_entry, elf_i386_tdata, elf_i386_local_got_tls_type): New macros. (struct elf_i386_link_hash_table): Add tls_ldm_got. (link_hash_newfunc): Clear tls_type. (elf_i386_check_relocs): Support TLS relocs. (elf_i386_gc_sweep_hook): Likewise. (allocate_dynrelocs): Likewise. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_finish_dynamic_symbol): Likewise. (bfd_elf32_mkobject, elf_backend_object_p): Define. * elfxx-ia64.c (struct elfNN_ia64_dyn_sym_info): Add tprel_offset, dtpmod_offset, dtprel_offset, tprel_done, dtpmod_done, dtprel_done, want_tprel, want_dtpmod, want_dtprel. (elfNN_ia64_tprel_base, elfNN_ia64_dtprel_base): New functions. (ia64_howto_table): Add TLS relocs, rename R_IA64_LTOFF_TP22 to R_IA64_LTOFF_TPREL22. (elf_code_to_howto_index): Add TLS relocs. (elfNN_ia64_check_relocs): Support TLS relocs. (allocate_global_data_got): Account for TLS .got data. (allocate_dynrel_entries): Account for TLS dynamic relocations. (elfNN_ia64_install_value): Supprt TLS relocs. (set_got_entry): Support TLS relocs. (elfNN_ia64_relocate_section): Likewise. * config/obj-elf.c (elf_common): Renamed from obj_elf_common. (obj_elf_common): Call elf_common. (obj_elf_tls_common): New function. (elf_pseudo_tab): Support .tls_common. (special_sections): Add .tdata and .tbss. (obj_elf_change_section): Set SEC_THREAD_LOCAL for SHF_TLS sections. (obj_elf_parse_section_letters): Support T in section flags (SHF_TLS). (obj_elf_parse_section_letters): Include T in error message. * config/tc-ppc.c (ppc_section_letter): Likewise. * config/tc-alpha.c (alpha_elf_section_letter): Likewise. (tc_gen_reloc): Handle SEC_THREAD_LOCAL the same way as SEC_MERGE. * config/tc-sparc.c (md_apply_fix3): Likewise. * config/tc-i386.c (tc_i386_fix_adjustable): Add TLS relocs. Define them if not BFD_ASSEMBLER. (lex_got): Support @TLSGD, @TLSLDM, @GOTTPOFF, @TPOFF, @DTPOFF and @NTPOFF. (md_apply_fix3): Add TLS relocs. * config/tc-ia64.c (enum reloc_func): Add FUNC_DTP_MODULE, FUNC_DTP_RELATIVE, FUNC_TP_RELATIVE, FUNC_LT_DTP_MODULE, FUNC_LT_DTP_RELATIVE, FUNC_LT_TP_RELATIVE. (pseudo_func): Support @dtpmod(), @dtprel() and @tprel(). (ia64_elf_section_letter): Include T in error message. (md_begin): Support TLS operators. (md_operand): Likewise. (ia64_gen_real_reloc_type): Support TLS relocs. * testsuite/gas/i386/tlspic.s: New file. * testsuite/gas/i386/tlsd.s: New file. * testsuite/gas/i386/tlsnopic.s: New file. * testsuite/gas/i386/tlsd.d: New file. * testsuite/gas/i386/tlsnopic.d: New file. * testsuite/gas/i386/tlspic.d: New file. * testsuite/gas/i386/i386.exp: Add tlsd, tlsnopic and tlspic tests. * testsuite/gas/ia64/tls.s: New file. * testsuite/gas/ia64/tls.d: New file. * testsuite/gas/ia64/ia64.exp: Add tls test. * write.c (adjust_reloc_syms): Don't change symbols in SEC_THREAD_LOCAL sections to STT_SECTION + addend. * elf/common.h (PT_TLS, SHF_TLS, STT_TLS, DF_STATIC_TLS): Define. * elf/ia64.h (R_IA64_LTOFF_TPREL22): Renamed from R_IA64_LTOFF_TP22. * elf/i386.h: Add TLS relocs. * scripttempl/elf.sc: Add .rel{,a}.t{bss,data}, .tdata and .tbss. * ldlang.c (lang_add_section): Set SEC_THREAD_LOCAL for output section if necessary. Handle .tbss. (lang_size_sections): Clear _raw_size for .tbss section (it allocates space in PT_TLS segment only). * ldwrite.c (build_link_order): Build link order for .tbss too. * readelf.c (get_segment_type): Add PT_TLS. (get_elf_section_flags): Add SHF_TLS. (get_dynamic_flags): Optimize. Add DF_STATIC_TLS. (process_dynamic_segment): Use puts instead of printf. (get_symbol_type): Support STT_TLS. * objdump.c (dump_section_header): Remove SEC_CONSTRUCTOR_TEXT, SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS. Add SEC_THREAD_LOCAL.
2002-05-222002-05-21 H.J. Lu (hjl@gnu.org)H.J. Lu2-0/+6
* bfdlink.h (bfd_link_info): Add allow_multiple_definition.
2002-05-21? gas/testsuite/gas/mips/rol64.dThiemo Seufer2-0/+8
? gas/testsuite/gas/mips/rol64.s Index: gas/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/ChangeLog,v retrieving revision 1.1334 diff -u -p -r1.1334 ChangeLog --- gas/ChangeLog 21 May 2002 20:01:51 -0000 1.1334 +++ gas/ChangeLog 21 May 2002 23:32:51 -0000 @@ -1,3 +1,8 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (macro2): Add 64 bit drol, dror macros. + Optimize the rotate by zero case. + 2002-05-21 Nick Clifton <nickc@cambridge.redhat.com> * configure.in: Remove accidental enabling of bfd_gas=yes for Index: gas/config/tc-mips.c =================================================================== RCS file: /cvs/src/src/gas/config/tc-mips.c,v retrieving revision 1.123 diff -u -p -r1.123 tc-mips.c --- gas/config/tc-mips.c 14 May 2002 23:35:59 -0000 1.123 +++ gas/config/tc-mips.c 21 May 2002 23:32:52 -0000 @@ -6686,6 +6686,17 @@ macro2 (ip) --mips_opts.noreorder; break; + case M_DROL: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + break; + case M_ROL: macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu", "d,v,t", AT, 0, treg); @@ -6697,15 +6708,55 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROL_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + l = (rot < 0x20) ? "dsll" : "dsll32"; + r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROL_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + + case M_DROR: + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu", + "d,v,t", AT, 0, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv", + "d,t,s", AT, sreg, AT); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv", + "d,t,s", dreg, sreg, treg); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); break; case M_ROR: @@ -6719,15 +6770,44 @@ macro2 (ip) "d,v,t", dreg, dreg, AT); break; + case M_DROR_I: + { + unsigned int rot; + char *l, *r; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x3f; + if (! rot) + break; + r = (rot < 0x20) ? "dsrl" : "dsrl32"; + l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32"; + rot &= 0x1f; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r, + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l, + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } + break; + case M_ROR_I: - if (imm_expr.X_op != O_constant) - as_bad (_("rotate count too large")); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<", - AT, sreg, (int) (imm_expr.X_add_number & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<", - dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f)); - macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t", - dreg, dreg, AT); + { + unsigned int rot; + + if (imm_expr.X_op != O_constant) + as_bad (_("rotate count too large")); + rot = imm_expr.X_add_number & 0x1f; + if (! rot) + break; + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", + "d,w,<", AT, sreg, rot); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", + "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f); + macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", + "d,v,t", dreg, dreg, AT); + } break; case M_S_DOB: Index: gas/testsuite/ChangeLog =================================================================== RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v retrieving revision 1.315 diff -u -p -r1.315 ChangeLog --- gas/testsuite/ChangeLog 20 May 2002 17:05:34 -0000 1.315 +++ gas/testsuite/ChangeLog 21 May 2002 23:32:54 -0000 @@ -1,3 +1,9 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * gas/mips/rol64.s: New file, test of drol, dror macros. + * gas/mips/rol64.d: Likewise. + * gas/mips/mips.exp: Add new test. + 2002-05-20 Nick Clifton <nickc@cambridge.redhat.com> * gas/arm/arm.exp: Replace deprecated command line switches Index: gas/testsuite/gas/mips/mips.exp =================================================================== RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v retrieving revision 1.32 diff -u -p -r1.32 mips.exp --- gas/testsuite/gas/mips/mips.exp 4 Apr 2002 08:23:30 -0000 1.32 +++ gas/testsuite/gas/mips/mips.exp 21 May 2002 23:32:54 -0000 @@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then { run_dump_test "mul" } run_dump_test "rol" + run_dump_test "rol64" if !$aout { run_dump_test "sb" } run_dump_test "trunc" if !$aout { run_dump_test "ulh" } Index: include/opcode/ChangeLog =================================================================== RCS file: /cvs/src/src/include/opcode/ChangeLog,v retrieving revision 1.167 diff -u -p -r1.167 ChangeLog --- include/opcode/ChangeLog 17 May 2002 19:01:03 -0000 1.167 +++ include/opcode/ChangeLog 21 May 2002 23:32:57 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases. + 2002-05-17 Andrey Volkov <avolkov@sources.redhat.com> * h8300.h: Corrected defs of all control regs Index: include/opcode/mips.h =================================================================== RCS file: /cvs/src/src/include/opcode/mips.h,v retrieving revision 1.24 diff -u -p -r1.24 mips.h --- include/opcode/mips.h 16 Mar 2002 03:09:18 -0000 1.24 +++ include/opcode/mips.h 21 May 2002 23:32:57 -0000 @@ -526,9 +526,13 @@ enum M_REM_3I, M_REMU_3, M_REMU_3I, + M_DROL, M_ROL, + M_DROL_I, M_ROL_I, + M_DROR, M_ROR, + M_DROR_I, M_ROR_I, M_S_DA, M_S_DOB, Index: opcodes/ChangeLog =================================================================== RCS file: /cvs/src/src/opcodes/ChangeLog,v retrieving revision 1.447 diff -u -p -r1.447 ChangeLog --- opcodes/ChangeLog 17 May 2002 14:36:45 -0000 1.447 +++ opcodes/ChangeLog 21 May 2002 23:33:00 -0000 @@ -1,3 +1,7 @@ +2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros. + Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com> * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. Index: opcodes/mips-opc.c =================================================================== RCS file: /cvs/src/src/opcodes/mips-opc.c,v retrieving revision 1.32 diff -u -p -r1.32 mips-opc.c --- opcodes/mips-opc.c 17 Mar 2002 02:42:25 -0000 1.32 +++ opcodes/mips-opc.c 21 May 2002 23:33:00 -0000 @@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 }, {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 }, {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 }, +{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 }, +{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 }, +{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 }, +{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 }, {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
2002-05-17* h8300.h: Corrected defs of all control regs and eepmov instr.Andrey Volkov2-43/+48
2002-05-17print_insn_sh cleanup:Joern Rennecke2-2/+4
include: * dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype. gdb: * sh-tdep.c (gdb_print_insn_sh64): Delete. (gdb_print_insn_sh): Just set info->endian and use print_insn_sh. (sh_gdbarch_init): Always use gdb_print_insn_sh. opcodes: * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. * sh-dis.c (LITTLE_BIT): Delete. (print_insn_sh, print_insn_shl): Deleted. (print_insn_shx): Renamed to (print_insn_sh). No longer static. Handle SHmedia instructions. Use info->endian to determine endianness. * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete. (print_insn_sh64x): No longer static. Renamed to (print_insn_sh64). Removed pfun_compact and endian arguments. If we got an uneven address to indicate SHmedia, adjust it. Return -2 for SHcompact instructions. sim/sh64: * sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of print_insn_shl.
2002-05-102002-05-10 Elena Zannoni <ezannoni@redhat.com>Elena Zannoni2-0/+58
* sim-sh.h: New file, for sh gdb<->sim interface.
2002-05-092002-05-09 Daniel Jacobowitz <drow@mvista.com>Daniel Jacobowitz2-10/+20
* signals.h: Update comments. (enum target_signal): Remove conditional compilation around Mach-specific signals. Move them to after TARGET_SIGNAL_DEFAULT.
2002-05-08* common.h (NT_GNU_ABI_TAG): Define.Jason Thorpe2-0/+24
(GNU_ABI_TAG_LINUX): Define. (GNU_ABI_TAG_HURD): Define. (GNU_ABI_TAG_SOLARIS): Define. (NT_NETBSD_IDENT): Define. (NT_FREEBSD_ABI_TAG): Define.
2002-04-252002-04-24 Elena Zannoni <ezannoni@redhat.com>Elena Zannoni2-0/+5
* dwarf2.h: Add DW_AT_GNU_vector.
2002-04-17merge from gccDJ Delorie2-4/+15
2002-04-11reorder cmpsd, movsdAlan Modra2-3/+4
2002-04-11 * i386.h: Add intel mode cmpsd and movsd.Alan Modra2-0/+10
2002-04-01merge from gccDJ Delorie2-3/+7
2002-03-18Add AIX 64 shared library support and emulation layer for binutilsNick Clifton2-58/+55
2002-03-16[ gas/ChangeLog ]Chris Demetriou2-4/+16
2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
2002-03-11gdb/:Daniel Jacobowitz3-0/+248
2002-03-10 Daniel Jacobowitz <drow@mvista.com> * Makefile.in (defs_h): Add $(INCLUDE_DIR)/gdb/signals.h. * defs.h: Include "gdb/signals.h". (enum target_signal): Move to $(INCLUDE_DIR)/gdb/signals.h. include/gdb: 2002-03-10 Daniel Jacobowitz <drow@mvista.com> * signals.h: New file, split from gdb/defs.h.
2002-03-06Remove floatformat_arm_ext.Andrew Cagney2-1/+4
2002-03-05 * pdp11.h: Add format codes for float instruction formats.Alan Modra2-2/+13
2002-02-25missditAlan Modra1-0/+4
2002-02-25 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.Alan Modra1-1/+8
2002-02-21include:Jim Blandy2-0/+35
Allow the user to specify functions for allocating memory for splay tree roots and nodes. * splay-tree.h (splay_tree_allocate_fn, splay_tree_deallocate_fn): New types. (splay_tree): New fields: `allocate', `deallocate', and `allocate_data'. (splay_tree_new_with_allocator): New function declaration. libiberty: * splay-tree.c (splay_tree_xmalloc_allocate, splay_tree_xmalloc_deallocate): New functions. (splay_tree_new): Call splay_tree_new_with_allocator, passing the above functions and a dummy data pointer. (splay_tree_new_with_allocator): New function. (splay_tree_delete_helper, splay_tree_delete, splay_tree_insert, splay_tree_remove): Use the splay tree's allocation and deallocation functions.
2002-02-18 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.Jan Hubicka2-5/+9
2002-02-15 Support arbitrary length fill patterns.Alan Modra2-9/+13
* bfdlink.h (enum bfd_link_order_type): Remove bfd_fill_link_order. (struct bfd_link_order): Remove fill. Add data.size.
2002-02-13bfd:Jason Thorpe2-0/+5
2002-02-13 Matt Fredette <fredette@netbsd.org> * elf32-m68k.c (elf32_m68k_print_private_bfd_data): Recognize EF_M68000. bintuls: 2002-02-13 Matt Fredette <fredette@netbsd.org> * readelf.c (get_machine_flags): Recognize EF_M68000. gas: 2002-02-13 Matt Fredette <fredette@netbsd.org> * config/tc-m68k.c (md_show_usage): No longer display a hard-coded "68020" for the default CPU, instead display the canonical name of the true, configured default CPU. (m68k_elf_final_processing): Mark objects for sub-68020 CPUs with the new EF_M68000 flag. include/elf: 2002-02-13 Matt Fredette <fredette@netbsd.org> * m68k.h (EF_M68000): Define.
2002-02-12Add DT_PPC64_OPD and DT_PPC64_OPDSZ dynamic tagsAlan Modra2-0/+8
2002-02-11 * i386.h (push,pop): Allow 16bit operands in 64bit mode.Jan Hubicka2-45/+70
(xchg): Fix. (in, out): Disable 64bit operands. (call, jmp): Avoid REX prefixes. (jcxz): Prohibit in 64bit mode (jrcxz, loop): Add 64bit variants. (movq): Fix patterns. (movmskps, pextrw, pinstrw): Add 64bit variants.
2002-02-09 * alpha.h (R_ALPHA_BRSGP): New.Richard Henderson2-0/+9
2002-02-08Contribute sh64-elf.Alexandre Oliva2-2/+181
2002-01-23 Alexandre Oliva <aoliva@redhat.com> * sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. (R_SH_FIRST_INVALID_RELOC_4): Adjust. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * sh.h: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_get_contents_type): Declare. (sh64_address_is_shmedia): Likewise. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (sh64_elf_crange): New type. (struct sh64_section_data): New. (sh64_elf_section_data): New macro. (EF_SH5): Rename back from EF_SH64. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED, SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE, SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET, SH64_CRANGE_CR_TYPE_OFFSET): New macros. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Don't define EF_SH64_ABI64. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete. (EF_SH64_ABI64): New. 2000-11-23 Hans-Peter Nilsson <hpn@cygnus.com> * sh.h (EF_SH64): Rename from EF_SH5. (EF_SH64_32BIT_ABI): New. (EF_SH64_64BIT_ABI): New. (R_SH_PT_16, R_SH_SHMEDIA_CODE R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New relocs. 2000-09-01 Ben Elliston <bje@redhat.com> * sh.h (EF_SH5): Define.
2002-02-08Contribute sh64-elf.Alexandre Oliva2-0/+11
2000-11-25 Hans-Peter Nilsson <hpn@cygnus.com> * dis-asm.h (print_insn_sh64): New prototype. (print_insn_sh64l): New prototype. (print_insn_sh64x_media): New prototype.
2002-02-05* opcodes disassembler extensionFrank Ch. Eigler2-0/+11
[includes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * dis-asm.h (disassemble_info): New field `insn_sets'. (INIT_DISASSEMBLE_INFO): Clear it. [opcodes] 2002-02-04 Frank Ch. Eigler <fche@redhat.com> * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
2002-02-05merge from gccDJ Delorie2-6/+10
2002-02-03Remove redundant entry.DJ Delorie1-5/+0
2002-02-03merge from gccDJ Delorie2-0/+9
2002-02-02Revert sh64 changes. Accidently committed.Andrew Cagney2-58/+0
2002-02-01Synchronize dates with FSF version of the ChangeLog. Remove spurious entry.Nick Clifton1-7/+3
2002-02-01 * sim-sh64.h: New file.Ben Elliston2-1/+59
2002-02-01 * mmix.h: Tweak comments.Hans-Peter Nilsson2-2/+27
(MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME): New. [BFD_ARCH_SIZE] (_bfd_mmix_prepare_linker_allocated_gregs, _bfd_mmix_finalize_linker_allocated_gregs, _bfd_mmix_check_all_relocs): Provide prototypes.
2002-02-01Support small archive for pre AIX 4.3Tom Rix2-4/+10
2002-01-31merge from gccDJ Delorie1-0/+4
2002-01-31Add support for OpenRISC 32-bit embedded processorNick Clifton9-36/+600
2002-01-28elf/dwarf2.h: Sync with gcc version.Jason Merrill2-23/+31
2002-01-28merge from gccDJ Delorie2-2/+6
2002-01-282002-01-27 David O'Brien <obrien@FreeBSD.org>David O'Brien2-8/+12
* cgen.h (BFD_VERSION): Use BFD_VERSION_DATE instead. Approved by: Nick Clifton <nickc@cambridge.redhat.com> <m3k7u2g5uc.fsf@north-pole.nickc.cambridge.redhat.com>
2002-01-22[ include/opcode/ChangeLog ]Graydon Hoare2-0/+27
2002-01-22 Graydon Hoare <graydon@redhat.com> * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure. (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field. [ opcodes/ChangeLog ] 2002-01-22 Graydon Hoare <graydon@redhat.com> * fr30-asm.c: Regenerate. * fr30-desc.c: Likewise. * fr30-desc.h: Likewise. * fr30-dis.c: Likewise. * fr30-ibld.c: Likewise. * fr30-opc.c: Likewise. * fr30-opc.h: Likewise. * m32r-asm.c: Likewise. * m32r-desc.c: Likewise. * m32r-desc.h: Likewise. * m32r-dis.c: Likewise. * m32r-ibld.c: Likewise. * m32r-opc.c: Likewise. * m32r-opc.h: Likewise. * m32r-opinst.c: Likewise. * openrisc-asm.c: Likewise. * openrisc-desc.c: Likewise. * openrisc-desc.h: Likewise. * openrisc-dis.c: Likewise. * openrisc-ibld.c: Likewise. * openrisc-opc.c: Likewise. * openrisc-opc.h: Likewise. * xstormy16-desc.c: Likewise. [ cgen/ChangeLog ] 2002-01-22 Graydon Hoare <graydon@redhat.com> * desc-cpu.scm (ifld-number-cache): Add. (ifld-number): Add. (gen-maybe-multi-ifld-of-op): Add. (gen-maybe-multi-ifld): Add. (gen-multi-ifield-nodes): Add. (cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-21comment typo fixesAlan Modra2-2/+6
2002-01-16* coff/arm.h (F_VFP_FLOAT): Define.Richard Earnshaw3-2/+10
* elf/arm.h (F_VFP_FLOAT, EF_ARM_VFP_FLOAT): Define.
2002-01-16 * ppc.h (DT_PPC64_GLINK): Define.Alan Modra2-0/+7
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