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2003-01-082003-01-07 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-9/+16
* mips.h: Fix missing space in comment. (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5) (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right by four bits.
2003-01-03 * dis-asm.h (print_insn_iq2000): Declare.Stan Cox5-0/+70
* common.h (EM_IQ2000): Define. * iq2000.h: New file.
2003-01-02[ gas/ChangeLog ]Chris Demetriou2-6/+15
2003-01-02 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c: Update copyright years to include 2003. (mips_ip): Fix indentation of "+A", "+B", and "+C" handling. Additionally, clean up their code slightly and clean up their comments some more. * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation. [ gas/testsuite/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * gas/mips/elf_arch_mips32r2.d: Fix file description comment. [ include/opcode/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * mips.h: Update copyright years to include 2002 (which had been missed previously) and 2003. Make comments about "+A", "+B", and "+C" operand types more descriptive.
2002-12-31[ gas/ChangeLog ]Chris Demetriou2-1/+7
2002-12-31 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (validate_mips_insn, mips_ip): Recognize the "+D" operand, which will be used only by the disassembler. [ gas/testsuite/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32r2.d: New test. * gas/mips/cp0sel-names-mips64.d: New test. * gas/mips/cp0sel-names-numeric.d: New test. * gas/mips/cp0sel-names-sb1.d: New test. * gas/mips/cp0sel-names.s: New test source file. * gas/mips/mips.exp: Run new tests. [ include/opcode/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips.h: Note that the "+D" operand type name is now used. [ opcodes/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0sel_name): New structure. (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2) (mips_cp0sel_names_sb1): New arrays. (mips_arch_choice): New structure members "cp0sel_names" and "cp0sel_names_len". (mips_arch_choices): Add references to new cp0sel_names arrays as appropriate, and make all existing entries reference appropriate mips_XXX_names_numeric arrays rather than simply using NULL. (mips_cp0sel_names, mips_cp0sel_names_len): New variables. (lookup_mips_cp0sel_name): New function. (set_default_mips_dis_options): Set mips_cp0sel_names and mips_cp0sel_names_len as appropriate. Remove now-unnecessary checks for NULL register name arrays. (parse_mips_dis_option): Likewise. (print_insn_arg): Handle "+D" operand type. * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register names symbolically.
2002-12-31[ bfd/ChangeLog ]Chris Demetriou4-2/+37
2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-30Add support for msp430.Nick Clifton7-0/+187
2002-12-30Added some more pseudo opcodes for system call processing.Nick Clifton2-0/+15
2002-12-27[ binutils/ChangeLog ]Chris Demetriou4-0/+29
2002-12-27 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Document MIPS -M options. [ gas/testsuite/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32.d: New file. * gas/mips/cp0-names-mips64.d: New file. * gas/mips/cp0-names-numeric.d: New file. * gas/mips/cp0-names-sb1.d: New file. * gas/mips/cp0-names.s: New file. * gas/mips/fpr-names-32.d: New file. * gas/mips/fpr-names-64.d: New file. * gas/mips/fpr-names-n32.d: New file. * gas/mips/fpr-names-numeric.d: New file. * gas/mips/fpr-names.s: New file. * gas/mips/gpr-names-32.d: New file. * gas/mips/gpr-names-64.d: New file. * gas/mips/gpr-names-n32.d: New file. * gas/mips/gpr-names-numeric.d: New file. * gas/mips/gpr-names.s: New file. * gas/mips/mips.exp: Run new tests. [ include/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * dis-asm.h (print_mips_disassembler_options): Prototype. [ include/opcode/ChangeLog ] 2002-12-19 Chris Demetriou <cgd@broadcom.com> * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3) (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2) (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1) (OP_OP_SDC2, OP_OP_SDC3): Define. [ opcodes/ChangeLog ] 2002-12-27 Chris Demetriou <cgd@broadcom.com> * disassemble.c (disassembler_usage): Add invocation of print_mips_disassembler_options. * mips-dis.c (print_mips_disassembler_options) (set_default_mips_dis_options, parse_mips_dis_option) (parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name) (choose_arch_by_number): New functions. (mips_abi_choice, mips_arch_choice): New structures. (mips32_reg_names, mips64_reg_names, reg_names): Remove. (mips_gpr_names_numeric, mips_gpr_names_oldabi) (mips_gpr_names_newabi, mips_fpr_names_numeric) (mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64) (mips_cp0_names_numeric, mips_cp0_names_mips3264) (mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices) (mips_processor, mips_isa, mips_gpr_names, mips_fpr_names) (mips_cp0_names): New variables. (print_insn_args): Use new variables to print GPR, FPR, and CP0 register names. (mips_isa_type): Remove. (print_insn_mips): Remove ISA and CPU setup since it is now done... (_print_insn_mips): Here. Remove register setup code, and call set_default_mips_dis_options and parse_mips_dis_options instead. (print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-26 * sim-h8300.h: Remove ^M.Kazu Hirata2-33/+37
2002-12-23 * bfdlink.h (struct bfd_link_info): Add "strip_discarded".Alan Modra2-0/+7
2002-12-20* xstormy16.h: Add XSTORMY16_12.DJ Delorie2-1/+6
2002-12-19 * bfdlink.h (struct bfd_link_info): Replace bfd_boolean fields withAlan Modra2-66/+71
bit-fields. Rearrange to put all like types together.
2002-12-17* xstormy16.h (START_RELOC_NUMBERS) Add relocation numbersDJ Delorie2-0/+8
for R_XSTORMY16_LO16 and R_XSTORMY16_HI16.
2002-12-16 * hppa.h (completer_chars): #if 0 out.Alan Modra2-1/+5
2002-12-16 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" andAlan Modra2-17/+22
"default_args". (struct not_wot): Constify "args". (struct not): Constify "name". (numopcodes): Delete. (endop): Delete.
2002-12-12 * pj.h (pj_opc_info_t): Add union.Alan Modra2-2/+9
* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change. * config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype. (c_to_r, ipush_code, fake_opcode, alias): Likewise. (fake_opcode): Adjust for pj_opc_int_t change. (md_begin): Likewise. (md_assemble): Likewise. (ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc instead of non-existent third arg of parse_exp_save_ilp. (md_parse_option): Correct "little" and "big" calls.
2002-12-10Add support for displaying extension to DWARF2 used by Unified Parallel CNick Clifton2-6/+20
compiler.
2002-12-05Patch to update IA-64 port to SDM 2.1.Jim Wilson2-6/+11
bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-03include/opcode/Richard Henderson2-0/+5
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV. bfd/ * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry. opcodes/ * ia64-opc-m.c: Add ld8.mov. * ia64-asmtab.c: Regenerate. gas/ * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case. gas/testsuite/ * gas/ia64/ldxmov-1.[ds]: New. * gas/ia64/ldxmov-2.[ls]: New. * gas/ia64/ia64.exp: Run them.
2002-12-02 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.Alan Modra2-3/+10
Constify "leaf" and "multi".
2002-12-01 * m68hc11.h (EF_M68HC12_MACH, EF_M68HCS12_MACH): Define.Stephane Carrez2-0/+24
(EF_M68HC11_MACH_MASK, EF_M68HC11_MACH): Define. (EF_M68HC11_MERGE_MACH, EF_M68HC11_CAN_MERGE_MACH): Define.
2002-11-30s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. SimplifyAlan Modra8-129/+127
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-28include/elf/ChangeLogAlan Modra2-67/+23
* internal.h (elf32_internal_ehdr, Elf32_Internal_Ehdr, elf64_internal_ehdr, Elf64_Internal_Ehdr, elf32_internal_phdr, Elf32_Internal_Phdr, elf64_internal_phdr, Elf64_Internal_Phdr, elf32_internal_shdr, Elf32_Internal_Shdr, elf64_internal_shdr, Elf64_Internal_Shdr, elf32_internal_sym, elf64_internal_sym, Elf32_Internal_Sym, Elf64_Internal_Sym, Elf32_Internal_Note, elf32_internal_note, elf32_internal_rel, Elf32_Internal_Rel, elf64_internal_rel, Elf64_Internal_Rel, elf32_internal_rela, elf64_internal_rela, Elf32_Internal_Rela, Elf64_Internal_Rela, elf32_internal_dyn, elf64_internal_dyn, Elf32_Internal_Dyn, Elf64_Internal_Dyn, elf32_internal_verdef, elf64_internal_verdef, elf32_internal_verdaux, elf64_internal_verdaux, elf32_internal_verneed, elf64_internal_verneed, elf32_internal_vernaux, elf64_internal_vernaux, elf32_internal_versym, elf64_internal_versym, Elf32_Internal_Verdef, Elf64_Internal_Verdef, Elf32_Internal_Verdaux, Elf64_Internal_Verdaux, Elf32_Internal_Verneed, Elf64_Internal_Verneed, Elf32_Internal_Vernaux, Elf64_Internal_Vernaux, Elf32_Internal_Versym, Elf64_Internal_Versym, Elf32_Internal_Syminfo, Elf64_Internal_Syminfo): Delete. (Elf_Internal_Rel): Delete. bfd/ChangeLog * elf-bfd.h: Replace occurrences of Elf32_Internal_* and Elf64_Internal_* with Elf_Internal_*. Replace Elf_Internal_Rel with Elf_Internal_Rela. * elf-hppa.h, elf-m10200.c, elf-m10300.c, elf32-arc.c, elf32-arm.h, elf32-avr.c, elf32-cris.c, elf32-d10v.c, elf32-d30v.c, elf32-dlx.c, elf32-fr30.c, elf32-frv.c, elf32-gen.c, elf32-h8300.c, elf32-hppa.c, elf32-i370.c, elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c, elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c, elf32-m68k.c, elf32-mcore.c, elf32-mips.c, elf32-openrisc.c, elf32-or32.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-v850.c, elf32-vax.c, elf32-xstormy16.c, elf64-alpha.c, elf64-gen.c, elf64-hppa.c, elf64-mips.c, elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c, elfarm-nabi.c, elfarm-oabi.c, elfcode.h, elflink.h, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c: Ditto. * elf-hppa.h (elf_hppa_internal_shdr): Delete. Use Elf_Internal_Shdr throughout instead. * elf.c (_bfd_elf_no_info_to_howto_rel): Delete. * elfcode.h (elf_swap_reloca_in): Pass source operand as a bfd_byte *. Remove INLINE keyword. (elf_swap_reloc_in): Likewise. Also clear r_addend. (elf_swap_reloc_out, elf_swap_reloca_out): Pass destination operand as a bfd_byte *. (elf_write_relocs): Consolidate REL and RELA code. (elf_slurp_reloc_table_from_section): Simplify REL code. (NAME(_bfd_elf,size_info)): Populate reloc swap entries. * elf-bfd.h (MAX_INT_RELS_PER_EXT_REL): Define. * elflink.h (elf_link_read_relocs_from_section): Consolidate REL and RELA code. (elf_link_adjust_relocs): Likewise. Don't malloc space for temp reloc array, use a fixed size of MAX_INT_RELS_PER_EXT_REL. (elf_link_output_relocs): Likewise. (elf_reloc_link_order): Likewise. (elf_finish_pointer_linker_section): Likewise. (struct elf_link_sort_rela): Remove union. (elf_link_sort_cmp1): Update to suit. (elf_link_sort_cmp2): Here too. (elf_link_sort_relocs): Consolidate REL and RELA code. Fix memory over-allocation for int_rels_per_ext_rel != 1 case. * elf32-arm.h: Update all bfd_elf32_swap_reloc_out calls. * elf32-i386.c: Likewise. * elf32-cris.c: Likewise for bfd_elf32_swap_reloca_out. * elf32-hppa.c, elf32-i370.c, elf32-m68k.c, elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-vax.c, elfxx-mips.c: Likewise. * elf64-alpha.c: Likewise for bfd_elf64_swap_reloca_out. * elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c, elf64-sparc.c, elf64-x86-64.c: Likewise. * elfxx-ia64.c: Likewise for bfd_elfNN_swap_reloca_out. * elfxx-mips.c (sort_dynamic_relocs): Likewise for bfd_elf32_swap_reloc_in. * elf32-arm.h: Update elf32_arm_info_to_howto calls. * elf32-mips.c: Likewise for mips_info_to_howto_rel. (mips_elf64_swap_reloc_in): Zero r_addend. (mips_elf64_be_swap_reloc_in): Likewise. (mips_elf64_slurp_one_reloc_table): Simplify. * elf64-alpha.c (alpha_elf_size_info): Populate reloc swap entries. * elf64-hppa.c (hppa64_elf_size_info): Likewise. * elf64-sparc.c (sparc64_elf_size_info): Likewise.
2002-11-24* libiberty.h (basename): Add NetBSD to the list.Jason Thorpe2-1/+5
2002-11-22merge from gccDJ Delorie2-0/+10
2002-11-192002-11-19 Klee Dienes <kdienes@apple.com>Klee Dienes2-22/+26
* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size' fields. (h8_opcodes). Modify initializer and initializer macros to no longer initialize the removed fields.
2002-11-19Fixed LDHI constraintSvein Seldal2-2/+6
2002-11-182002-11-11 Klee Dienes <kdienes@apple.com>Klee Dienes2-22/+28
* h8300.h (h8_opcode): Remove 'length' field. (h8_opcodes): Mark as 'const' (both the declaration and definition). Modify initializer and initializer macros to no longer initialize the length field. 2002-11-11 Klee Dienes <kdienes@apple.com> * h8300-dis.c: Include libiberty.h (for xmalloc). (struct h8_instruction): New type, used to wrap h8_opcodes with a length field (computed at run-time). (h8_instructions): New variable. (bfd_h8_disassemble_init): Allocate the storage for h8_instructions. Fill h8_instructions with pointers to the appropriate opcode and the correct value for the length field. (bfd_h8_disassemble): Iterate through h8_instructions instead of h8_opcodes.
2002-11-182002-11-18 Klee Dienes <kdienes@apple.com>Klee Dienes3-3/+11
* arc.h (arc_ext_opcodes): Declare as extern. (arc_ext_operands): Declare as extern. * i860.h (i860_opcodes): Declare as const. 2002-11-18 Klee Dienes <kdienes@apple.com> * arc-opc.c (arc_ext_opcodes): Define. (arc_ext_operands): Define. * i386-dis.c (Suffix3DNow): Declare as const. * arm-opc.h (arm_opcodes): Declare as const. (thumb_opcodes): Declare as const. * h8500-opc.h (h8500_table): Declare as const. (h8500_table): Use a NULL for the opcode in the terminator, so that code testing (opcode->name) behaves correctly. * mcore-opc.h (mcore_table): Declare as const. * sh-opc.h (sh_table): Declare as const. * w65-opc.h (optable): Declare as const. * z8k-opc.h (z8k_table): Declare as const.
2002-11-18Fixups in ChangeLog entries which has been filed in the wrong place.Svein Seldal2-14/+14
2002-11-18 * gas/config/tc-tic4x.c: Fixed proper commandlineSvein Seldal2-375/+369
parameters. Added support for new opcode-list format. General error message fixups. (c4x_inst_add): Reject insn not for our CPU (md_begin): Added matrix for setting the proper opcode-level & device-flags according to cpu type and revision. Rewrite the opcode hasher. (c4x_operand_parse): Fix opcode bug (c4x_operands_match): New function argument. Added dry-run mechanism, that is optional error generation. Added constraint 'i' and 'j'. (c4x_insn_check): Added new function for post-verification of the generated insn. (md_assemble): Check all opcodes before croaking because of an argument mismatch. Need this to be able to fully support ortogonally arguments. (md_parse_options): Revised commandprompt swicthes and added new ones. (md_show_usage): Complete rewrite of printout. * gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn * gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter * gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter * gas/testsuite/gas/tic4x/allopcodes.S: Add support for new opclass.h changes * gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for the new enhanced opcodes. * gas/testsuite/gas/tic4x/opcodes.s: Regenerate * gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above * gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for the enhanced and special insns. * gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite * include/opcode/tic4x.h: File reordering. Added enhanced opcodes. * opcodes/tic4x-dis.c: Added support for enhanced and special insn. (c4x_print_op): Added insn class 'i' and 'j' (c4x_hash_opcode_special): Add to support special insn (c4x_hash_opcode): Update to support the new opcode-list format. Add support for the new special insns. (c4x_disassemble): New opcode-list support.
2002-11-162002-11-16 Klee Dienes <kdienes@apple.com>Klee Dienes2-485/+7
* opcode/m88k.h (INSTAB): Remove 'next' field. (instruction): Remove definition; replace with extern declaration and mark as const. W
2002-11-16 * gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.Svein Seldal2-1077/+827
(c4x_operands_match): Added check for 8-bits LDF insn. Give warning when using constant direct bigger than 2^16. Add the new arguments. * include/opcode/tic4x.h: Major rewrite of entire file. Define instruction classes, and put each instruction into a class. * opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new argument format. Fix bug in 'N' register printer.
2002-11-14Add --enable-auto-import extension.Nick Clifton2-0/+10
2002-11-11 gas tic4x target enhancements (long list - see gas/ChangeLog andSvein Seldal2-5/+16
include/ChangeLog)
2002-10-27merge from gccDJ Delorie3-2/+10
2002-10-27merge from gccDJ Delorie2-0/+8
2002-10-25merge from gccDJ Delorie2-1/+10
2002-10-16merge from gccDJ Delorie2-1/+5
2002-10-14 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.Alan Modra2-8/+12
2002-10-11 * sh.h: Add SH TLS relocs.Kaz Kojima2-3/+17
2002-09-30Fix date in last commit.Richard Sandiford1-1/+1
2002-09-30[include/opcode/]Richard Sandiford2-4/+42
* mips.h: Update comment for new opcodes. (OP_MASK_VECBYTE, OP_SH_VECBYTE): New. (OP_MASK_VECALIGN, OP_SH_VECALIGN): New. (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New. (CPU_VR4120, CPU_VR5400, CPU_VR5500): New. (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags. Don't match CPU_R4111 with INSN_4100. [opcodes/] * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'. (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. * mips-opc.c (V1): Include INSN_4111 and INSN_4120. (N411, N412, N5, N54, N55): New convenience defines. (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes. Change dmadd16 and madd16 from V1 to N411.
2002-09-30[include/elf]Richard Sandiford2-0/+11
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New. [bfd/] * archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New. (bfd_mach_mips5500): New. * cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New. (arch_info_struct): Add corresponding entries here. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120, E_MIPS_MACH_5400 and E_MIPS_MACH_5500. (_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. (_bfd_mips_elf_mach_extends_p): New function. (_bfd_mips_elf_merge_private_bfd_data): Use it to help merge the EF_MIPS_MACH flags. * bfd-in2.h: Regenerate.
2002-09-27bfd/Jakub Jelinek2-8/+20
* reloc.c: Add x86-64 TLS relocs. * bfd-in2.h, libbfd.h: Rebuilt. * elf64-x86-64.c (x86_64_elf_howto): Fix size fields for 32-bit relocs. Add TLS relocs. (x86_64_reloc_map): Add TLS relocs. (elf64_x86_64_info_to_howto): Adjust for added TLS relocs. (struct elf64_x86_64_link_hash_entry): Add tls_type field. (GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE): Define. (elf64_x86_64_hash_entry): Define. (struct elf64_x86_64_obj_tdata): New. (elf64_x86_64_tdata, elf64_x86_64_local_got_tls_type): Define. (struct elf64_x86_64_link_hash_table): Add tls_ld_got. (link_hash_newfunc): Initialize tls_type. (elf64_x86_64_link_hash_table_create): Initialize tls_ld_got. (elf64_x86_64_copy_indirect_symbol): Swap tls_type if necessary. (elf64_x86_64_mkobject): New. (elf64_x86_64_elf_object_p): Allocate struct elf64_x86_64_obj_tdata. (elf64_x86_64_tls_transition): New. (elf64_x86_64_check_relocs): Add r_type variable and use it. Handle TLS relocs. (elf64_x86_64_gc_sweep_hook): Handle TLS relocs. (allocate_dynrelocs): Allocate GOT space for TLS relocs. (elf64_x86_64_size_dynamic_sections): Likewise. (dtpoff_base, tpoff): New. (elf64_x86_64_relocate_section): Handle TLS relocs. (elf64_x86_64_finish_dynamic_symbol): Only handle non-TLS GOT entries. (bfd_elf64_mkobject): Define. * elf32-i386.c (elf_i386_check_relocs) [R_386_TLS_LE]: Set DF_STATIC_TLS if shared. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Add x86-64 TLS relocs. Define them if not BFD_ASSEMBLER. (lex_got): Handle @tlsgd, @dtpoff and @tpoff in 64-bit mode, add @tlsld. (md_apply_fix3): No addend for BFD_RELOC_X86_64_TLSGD, BFD_RELOC_X86_64_TLSLD and BFD_RELOC_X86_64_GOTTPOFF. (tc_gen_reloc): Handle x86-64 TLS relocs. include/ * elf/x86-64.h: Add TLS relocs. ld/testsuite/ * lib/ld-lib.exp (run_ld_link_tests): Add. * ld-sh/sh64/sh64.exp (run_ld_link_tests, regexp_diff, file_contents): Remove. (sh64tests): Add 6th field to the tests array. * ld-i386/i386.exp (run_ld_link_tests): Remove. * ld-x86-64/x86-64.exp: New. * ld-x86-64/tlsbin.dd: New test. * ld-x86-64/tlsbinpic.s: New test. * ld-x86-64/tlsbin.rd: New test. * ld-x86-64/tlsbin.s: New test. * ld-x86-64/tlsbin.sd: New test. * ld-x86-64/tlsbin.td: New test. * ld-x86-64/tlslib.s: New test. * ld-x86-64/tlspic1.s: New test. * ld-x86-64/tlspic2.s: New test. * ld-x86-64/tlspic.dd: New test. * ld-x86-64/tlspic.rd: New test. * ld-x86-64/tlspic.sd: New test. * ld-x86-64/tlspic.td: New test.
2002-09-262002-09-26 Andrew Cagney <ac131313@redhat.com>Andrew Cagney2-0/+4
* regs/: Delete directory.
2002-09-20* libiberty.h (asprintf, vasprintf): Don't declare them if theAlexandre Oliva2-0/+9
corresponding HAVE_DECL_ macro is 1.
2002-09-19bfd/Jakub Jelinek2-1/+9
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Add. * bfd-in2.h, libbfd.h: Rebuilt. * elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE and R_386_TLS_GOTIE. (elf_i386_reloc_type_lookup): Handle it. (struct elf_i386_link_hash_entry): Change tls_type type to unsigned char instead of enum, change GOT_* into defines. (GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define. (elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE. (elf_i386_check_relocs): Likewise. Avoid crash if local symbol is accessed both as normal and TLS symbol. Move R_386_TLS_LDM and R_386_PLT32 cases so that R_386_TLS_IE can fall through. Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs. (elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE. Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs. (allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if tls_type is GOT_TLS_IE_BOTH. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE. Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs. (elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch all 4 GOT_TLS_* TLS types. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE. (BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0 if not defined. (lex_got): Handle @GOTNTPOFF and @INDNTPOFF. (md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE. gas/testsuite/ * gas/i386/tlspic.s: Add tests. * gas/i386/tlspic.d: Regenerated. * gas/i386/tlsnopic.s: Add tests. * gas/i386/tlsnopic.d: Regenerated. include/ * elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE): Define. ld/testsuite/ * ld-i386/i386.exp: New. * ld-i386/tlsbin.dd: New test. * ld-i386/tlsbinpic.s: New test. * ld-i386/tlsbin.rd: New test. * ld-i386/tlsbin.s: New test. * ld-i386/tlsbin.sd: New test. * ld-i386/tlsbin.td: New test. * ld-i386/tlslib.s: New test. * ld-i386/tlsnopic1.s: New test. * ld-i386/tlsnopic2.s: New test. * ld-i386/tlsnopic.dd: New test. * ld-i386/tlsnopic.rd: New test. * ld-i386/tlsnopic.sd: New test. * ld-i386/tlspic1.s: New test. * ld-i386/tlspic2.s: New test. * ld-i386/tlspic.dd: New test. * ld-i386/tlspic.rd: New test. * ld-i386/tlspic.sd: New test. * ld-i386/tlspic.td: New test.
2002-09-19Remove (errant) trailing semicolon (;) from the extern "C" { } declaration.Nick Clifton2-1/+6
2002-09-12Handle DW_OP_GNU_push_tls_address.Nick Clifton2-16/+24
Synch up with the gcc's dwarf2.h
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