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2023-02-06ppc32 and "LOAD segment with RWX permissions"Alan Modra1-0/+3
When using a bss-plt we'll always trigger the RWX warning, which disturbs gcc test results. On the other hand, there may be reason to want the warning when gcc is configured with --enable-secureplt. So turning off the warning entirely for powerpc might not be the best solution. Instead, we'll turn off the warning whenever a bss-plt is generated, unless the user explicitly asked for the warning. bfd/ * elf32-ppc.c (ppc_elf_select_plt_layout): Set no_warn_rwx_segments on generating a bss plt, unless explicity enabled by the user. Also show the bss-plt warning when --warn-rwx-segments is given without --bss-plt. include/ * bfdlink.h (struct bfd_link_info): Add user_warn_rwx_segments. ld/ * lexsup.c (parse_args): Set user_warn_rwx_segments. * testsuite/ld-elf/elf.exp: Pass --secure-plt for powerpc to the rwx tests.
2023-02-03bpf: fix error conversion from long unsigned int to unsigned int ↵Guillermo E. Martinez1-1/+1
[-Werror=overflow] Regenerating BPF target using the maintainer mode emits: .../opcodes/bpf-opc.c:57:11: error: conversion from ‘long unsigned int’ to ‘unsigned int’ changes value from ‘18446744073709486335’ to ‘4294902015’ [-Werror=overflow] 57 | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } } The use of a narrow size to handle the mask CGEN in instruction format is causing this error. Additionally eBPF `call' instructions constructed by expressions using symbols (BPF_PSEUDO_CALL) emits annotations in `src' field of the instruction, used to identify BPF target endianness. cpu/ * bpf.cpu (define-call-insn): Remove `src' field from instruction mask. include/ *opcode/cge.h (CGEN_IFMT): Adjust mask bit width. opcodes/ * bpf-opc.c: Regenerate.
2023-02-02bfd: use "stack trace" instead of "unwind" for SFrameIndu Bhagat1-1/+1
SFrame format is meant for generating stack traces only. bfd/ * elf-bfd.h: Replace the use of "unwind" with "stack trace". * elf-sframe.c: Likewise. * elf64-x86-64.c: Likewise. * elfxx-x86.c: Likewise. include/ * elf/common.h: Likewise.
2023-02-02sframe: use "stack trace" instead of "unwind" for SFrameIndu Bhagat1-14/+14
SFrame format is meant for generating stack traces only. include/ * sframe.h: Fix comments in the header file.
2023-01-18sim: info: convert verbose field to a boolMike Frysinger1-2/+3
The verbose argument has always been an int treated as a bool, so convert it to an explicit bool. Further, update the API docs to match the reality that the verbose value is actually used by some of the internal modules.
2023-01-12ctf: fix various dreadful typos in the ctf_archive format commentsNick Alcock1-4/+4
When defining a format it helps to a) get the endianness right when you explicitly state what it is and b) define things in terms of fields that exist rather than fields that don't. (A bunch of changes of names during implementation were not reflected in these comments...) Thanks to Jose "Eye of the Eagle" Marchesi for spotting these. include/ * ctf.h (struct ctf_archive) [ctfa_ctfs]: The size element of this is in little-endian byte order, not network byte order. (struct ctf_archive_modent): This is positioned right after the end fo the struct ctf_archive, not at the offset of a nonexistent field. The number of elements in the array depends on ctfa_ndicts, not another nonexistent field.
2023-01-10Fix size of external_reloc for pe-aarch64Mark Harmstone1-2/+1
This patch series finishes off the work by Jedidiah Thompson, and adds support for creating aarch64 PE images. This should be essentially complete: I've used this to create a "hello world" Windows program in asm, and (with GCC patches) a UEFI program in C. I think the only things missing are the .secidx relocation, which is needed for PDBs, and the SEH pseudos used for C++ exceptions. This first patch fixes the size of RELSZ; I'm not sure why it was 14 in the first place. This is the size of the "Base Relocation Block" in https://learn.microsoft.com/en-us/windows/win32/debug/pe-format, and AFAIK should be 10 for everything.
2023-01-06sframe: fix the defined SFRAME_FRE_TYPE_*_LIMIT constantsIndu Bhagat2-4/+7
An earlier commit 3f107464 defined the SFRAME_FRE_TYPE_*_LIMIT constants. These constants are used (by gas and libsframe) to pick an SFrame FRE type based on the function size. Those constants, however, were buggy, causing the generated SFrame sections to be bloated as SFRAME_FRE_TYPE_ADDR2/SFRAME_FRE_TYPE_ADDR4 got chosen more often than necessary. gas/ * sframe-opt.c (sframe_estimate_size_before_relax): Use typecast. (sframe_convert_frag): Likewise. libsframe/ * sframe.c (sframe_calc_fre_type): Use a more appropriate type for argument. Adjust the check for SFRAME_FRE_TYPE_ADDR4_LIMIT to keep it warning-free but meaningful. include/ * sframe-api.h (sframe_calc_fre_type): Use a more appropriate type for the argument. * sframe.h (SFRAME_FRE_TYPE_ADDR1_LIMIT): Correct the constant. (SFRAME_FRE_TYPE_ADDR2_LIMIT): Likewise. (SFRAME_FRE_TYPE_ADDR4_LIMIT): Likewise.
2023-01-03Add new NT_ARM_ZA and NT_ARM_SSVE register set constants.Luis Machado2-0/+9
2023-01-01Update year range in copyright notice of binutils filesAlan Modra316-316/+316
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-12-31Add markers for 2.40 branchNick Clifton1-0/+4
2022-12-31sync libiberty sources with gcc mainlineNick Clifton1-0/+20
2022-12-27RISC-V: Fix T-Head Fmv vendor extension encodingChristoph Müllner1-2/+2
A recent change in the XTheadFmv spec fixed an encoding bug in the document. This patch changes the code to follow this bugfix. Spec patch can be found here: https://github.com/T-head-Semi/thead-extension-spec/pull/11 Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-12-22sim: drop unused SIM_ADDR type [PR sim/7504]Mike Frysinger1-6/+0
Now that sim APIs either use 64-bit addresses all the time, or more appropriate target-specific types, drop this now-unused 32-bit-only address type. Bug: https://sourceware.org/PR7504
2022-12-22sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]Mike Frysinger1-2/+4
We've been using SIM_ADDR which has always been 32-bit. This means the upper 32-bit address range in 64-bit sims is inaccessible. Use 64-bit addresses all the time since we want the APIs to be stable regardless of the active arch backend (which can be 32 or 64-bit). The length is also 64-bit because it's completely feasible to have a program that is larger than 4 GiB in size/image/runtime. Forcing the caller to manually chunk those accesses up into 4 GiB at a time doesn't seem useful to anyone. Bug: https://sourceware.org/PR7504
2022-12-22sframe.h: add support for .cfi_b_key_frameIndu Bhagat1-6/+19
ARM 8.3 provides five separate keys that can be used to authenticate pointers. There are two key for executable (instruction) pointers. The enum pointer_auth_key in gas/config/tc-aarch64.h currently holds two keys: enum pointer_auth_key { AARCH64_PAUTH_KEY_A, AARCH64_PAUTH_KEY_B }; Analogous to the above, in SFrame format V1, a bit is reserved in the SFrame FDE to indicate which key is used for signing the frame's return addresses: - SFRAME_AARCH64_PAUTH_KEY_A has a value of 0 - SFRAME_AARCH64_PAUTH_KEY_B has a value of 1 Note that the information in this bit will always be used along with the mangled_ra_p bit, the latter indicates whether the return addresses are mangled/contain PAC auth bits. include/ChangeLog: * sframe.h (SFRAME_AARCH64_PAUTH_KEY_A): New definition. (SFRAME_AARCH64_PAUTH_KEY_B): Likewise. (SFRAME_V1_FUNC_INFO): Adjust to accommodate pauth_key. (SFRAME_V1_FUNC_PAUTH_KEY): New macro. (SFRAME_V1_FUNC_INFO_UPDATE_PAUTH_KEY): Likewise.
2022-12-20sim: move register headers into sim/ namespace [PR sim/29869]Mike Frysinger15-0/+0
These headers define the register numbers for each port to implement the sim_fetch_register & sim_store_register interfaces. While gdb uses these, the APIs are part of the sim, not gdb. Move the headers out of the gdb/ include namespace and into sim/ instead.
2022-12-16libsframe: provide new access API for mangled RA bitIndu Bhagat1-0/+7
include/ChangeLog: * sframe-api.h (sframe_fre_get_ra_mangled_p): New declaration. ChangeLog: * libsframe/sframe.c (sframe_get_fre_ra_mangled_p): New definition. (sframe_fre_get_ra_mangled_p): New static function.
2022-12-16sframe.h: add support for .cfi_negate_ra_stateIndu Bhagat1-8/+15
Use the last remaining bit in the 'SFrame FRE info' word to store whether the RA is signed/unsigned with PAC authorization code: this bit is named as the "mangled RA" bit. This bit is still unused for x86-64. The behaviour of the mangled-RA info bit in SFrame format closely follows the behaviour of DW_CFA_AARCH64_negate_ra_state in DWARF. During unwinding, whenever an SFrame FRE with non-zero "mangled RA" bit is encountered, it means the upper bits of the return address contain Pointer Authentication code. The unwinder, hence, must use appropriate means to restore LR correctly in such cases. include/ChangeLog: * sframe.h (SFRAME_V1_FRE_INFO_UPDATE_MANGLED_RA_P): New macro. (SFRAME_V1_FRE_MANGLED_RA_P): Likewise.
2022-12-15libsframe asan: avoid generating misaligned loadsIndu Bhagat1-2/+6
There are two places where unaligned loads were seen on aarch64: - #1. access to the SFrame FRE stack offsets in the in-memory representation/abstraction provided by libsframe. - #2. access to the SFrame FRE start address in the on-disk representation of the frame row entry. For #1, we can fix this by reordering the struct members of sframe_frame_row_entry in libsframe/sframe-api.h. For #2, we need to default to using memcpy instead, and copy out the bytes to a location for output. SFrame format is an unaligned on-disk format. As such, there are other blobs of memory in the on-disk SFrame FRE that are on not on their natural boundaries. But that does not pose further problems yet, because the users are provided access to the on-disk SFrame FRE data via libsframe's sframe_frame_row_entry, the latter has its' struct members aligned on their respective natural boundaries (and initialized using memcpy). PR 29856 libsframe asan: load misaligned at sframe.c:516 ChangeLog: PR libsframe/29856 * bfd/elf64-x86-64.c: Adjust as the struct members have been reordered. * libsframe/sframe.c (sframe_decode_fre_start_address): Use memcpy to perform 16-bit/32-bit reads. * libsframe/testsuite/libsframe.encode/encode-1.c: Adjust as the struct members have been reordered. include/ChangeLog: PR libsframe/29856 * sframe-api.h: Reorder fre_offsets for natural alignment.
2022-12-09libsframe: rename API sframe_fde_func_info to sframe_fde_create_func_infoIndu Bhagat1-2/+2
The new name better reflects the purpose of the function. ChangeLog: * bfd/elfxx-x86.c (_bfd_x86_elf_create_sframe_plt): Use new name. * libsframe/sframe.c (sframe_fde_create_func_info): Rename sframe_fde_func_info to this. * libsframe/testsuite/libsframe.encode/encode-1.c: Use new name. include/ChangeLog: * sframe-api.h (sframe_fde_create_func_info): Rename sframe_fde_func_info to this.
2022-12-09sframe: gas: libsframe: define constants and remove magic numbersIndu Bhagat1-0/+15
Define constants in sframe.h for the various limits associated with the range of offsets that can be encoded in the start address of an SFrame FRE. E.g., sframe_frame_row_entry_addr1 is used when start address offset can be encoded as 1-byte unsigned value. Update the code in gas to use these defined constants as it checks for these limits, and remove the usage of magic numbers. ChangeLog: * gas/sframe-opt.c (sframe_estimate_size_before_relax): (sframe_convert_frag): Do not use magic numbers. * libsframe/sframe.c (sframe_calc_fre_type): Likewise. include/ChangeLog: * sframe.h (SFRAME_FRE_TYPE_ADDR1_LIMIT): New constant. (SFRAME_FRE_TYPE_ADDR2_LIMIT): Likewise. (SFRAME_FRE_TYPE_ADDR4_LIMIT): Likewise.
2022-12-09sframe.h: make some macros more preciseIndu Bhagat1-3/+4
include/ChangeLog: * sframe.h (SFRAME_V1_FUNC_INFO): Use specific bits only. (SFRAME_V1_FRE_INFO): Likewise.
2022-12-07Compression tidy and fixesAlan Modra1-3/+0
Tidies: - Move stuff from bfd-in.h and libbfd.c to compress.c - Delete COMPRESS_DEBUG from enum compressed_debug_section_type - Move compress_debug field out of link_info to ld_config. Fixes: - Correct test in bfd_convert_section_setup to use obfd flags, not ibfd. - Apply bfd_applicable_file_flags to compression bfd flags added by gas and ld to the output bfd. bfd/ * bfd-in.h (enum compressed_debug_section_type), (struct compressed_type_tuple), (bfd_get_compression_algorithm), (bfd_get_compression_algorithm_name), * libbfd.c (compressed_debug_section_names), (bfd_get_compression_algorithm), (bfd_get_compression_algorithm_name): Move.. * compress.c: ..to here, deleting COMPRESS_DEBUG from enum compressed_debug_section_type. (bfd_convert_section_setup): Test obfd flags not ibfd for compression flags. * elf.c (elf_fake_sections): Replace link_info->compress_debug test with abfd->flags test. * bfd-in2.h: Regenerate. binutils/ * objcopy.c (copy_file): Tidy setting of bfd compress flags. Expand comment. gas/ * write.c (compress_debug): Test bfd compress flags rather than flag_compress_debug. (write_object_file): Apply bfd_applicable_file_flags to compress debug flags added to output bfd. include/ * bfdlink.h (struct bfd_link_info): Delete compress_debug. ld/ * ld.h (ld_config_type): Add compress_debug. * emultempl/elf.em: Replace references to link_info.compress_debug with config.compress_debug. * lexsup.c (elf_static_list_options): Likewise. * ldmain.c (main): Likewise. Apply bfd_applicable_file_flags to compress debug flags added to output bfd.
2022-11-28xtensa: allow dynamic configurationMax Filippov1-0/+442
Import include/xtensa-dynconfig.h that defines XCHAL_* macros as fields of a structure returned from the xtensa_get_config_v<x> function call. Define that structure and fill it with default parameter values specified in the include/xtensa-config.h. Define reusable function xtensa_load_config that tries to load configuration and return an address of an exported object from it. Define functions xtensa_get_config_v{1,2} that use xtensa_load_config to get structures xtensa_config_v{1,2}, either dynamically configured or the default. bfd/ * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Append xtensa-dynconfig.c. * Makefile.in: Regenerate. * configure: Regenerate. * configure.ac (xtensa_elf32_be_vec, xtensa_elf32_le_vec): Add xtensa-dynconfig.lo to the tb. * elf32-xtensa.c (xtensa-config.h): Replace #include with xtensa-dynconfig.h. (XSHAL_ABI, XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): Remove definitions. * xtensa-dynconfig.c: New file. * xtensa-isa.c (xtensa-dynconfig.h): New #include. (xtensa_get_modules): New function. (xtensa_isa_init): Call xtensa_get_modules instead of taking address of global xtensa_modules. gas/ * config/tc-xtensa.c (xtensa-config.h): Replace #include with xtensa-dynconfig.h. (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0, XTENSA_MARCH_EARLIEST): Remove definitions. * config/tc-xtensa.h (xtensa-config.h): Replace #include with xtensa-dynconfig.h. * config/xtensa-relax.c (xtensa-config.h): Replace #include with xtensa-dynconfig.h. (XCHAL_HAVE_WIDE_BRANCHES): Remove definition. include/ * xtensa-dynconfig.h: New file. ld/ * emultempl/xtensaelf.em (xtensa-config.h): Replace #include with xtensa-dynconfig.h. (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): Remove definitions.
2022-11-25riscv: Add AIA extension support (Smaia, Ssaia)Christoph Müllner1-0/+68
This commit adds the AIA extensions (Smaia and Ssaia) CSRs. bfd/ChangeLog: * elfxx-riscv.c: Add 'smaia' and 'ssaia' to the list of known standard extensions. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): (riscv_csr_address): Add CSR classes for Smaia/Ssaia. * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.s: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_MISELECT): New CSR macro. (CSR_MIREG): Likewise. (CSR_MTOPEI): Likewise. (CSR_MTOPI): Likewise. (CSR_MVIEN): Likewise. (CSR_MVIP): Likewise. (CSR_MIDELEGH): Likewise. (CSR_MIEH): Likewise. (CSR_MVIENH): Likewise. (CSR_MVIPH): Likewise. (CSR_MIPH): Likewise. (CSR_SISELECT): Likewise. (CSR_SIREG): Likewise. (CSR_STOPEI): Likewise. (CSR_STOPI): Likewise. (CSR_SIEH): Likewise. (CSR_SIPH): Likewise. (CSR_HVIEN): Likewise. (CSR_HVICTL): Likewise. (CSR_HVIPRIO1): Likewise. (CSR_HVIPRIO2): Likewise. (CSR_VSISELECT): Likewise. (CSR_VSIREG): Likewise. (CSR_VSTOPEI): Likewise. (CSR_VSTOPI): Likewise. (CSR_HIDELEGH): Likewise. (CSR_HVIENH): Likewise. (CSR_HVIPH): Likewise. (CSR_HVIPRIO1H): Likewise. (CSR_HVIPRIO2H): Likewise. (CSR_VSIEH): Likewise. (CSR_VSIPH): Likewise. (DECLARE_CSR): Add CSRs for Smaia and Ssaia. Changes for v3: - Imply ssaia for smaia - Imply zicsr for ssaia (and transitively smaia) - Move hypervisor CSRs to Ssaia+H - Rebase on upstream/master Changes for v2: - Add hypervisor and VS CSRs - Fix whitespace issue Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-19RISC-V: Add 'Ssstateen' extension and its CSRsTsukasa OI1-13/+13
This commit adds 'Ssstateen' extension, which is a supervisor-visible view of the 'Smstateen' extension. It means, this extension implements sstateen* and hstateen* CSRs of the 'Smstateen' extension. Note that 'Smstateen' extension itself is unchanged but due to implementation simplicity, it is implemented so that 'Smstateen' implies 'Ssstateen' (just like 'M' implies 'Zmmul'). This is based on the latest version of RISC-V Profiles (version 0.9-draft, Frozen): <https://github.com/riscv/riscv-profiles/commit/226b7f643067b29abc6723fac60d5f6d3f9eb901> bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Update implication rules. (riscv_supported_std_s_ext) Add 'Ssstateen' extension. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Rename CSR_CLASS_SMSTATEEN_AND_H{,_32} to CSR_CLASS_SSSTATEEN_... Add CSR_CLASS_SSSTATEEN. (riscv_csr_address): Support new/renamed CSR classes. * testsuite/gas/riscv/csr.s: Add 'Ssstateen' extension to comment. * testsuite/gas/riscv/csr-version-1p9p1.l: Reflect changes to error messages. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/ssstateen-csr.s: Test for 'Ssstateen' CSRs. * testsuite/gas/riscv/ssstateen-csr.d: Likewise. * testsuite/gas/riscv/smstateen-csr-s.d: Test to make sure that supervisor/hypervisor part of 'Smstateen' CSRs are accessible from 'RV32IH_Smstateen', not just from 'RV32IH_Ssstateen' that is tested in ssstateen-csr.d. include/ChangeLog: * opcode/riscv-opc.h: Update DECLARE_CSR declarations with new CSR classes.
2022-11-17RISC-V: Add T-Head Int vendor extensionChristoph Müllner2-0/+9
This patch adds the XTheadInt extension, which provides interrupt stack management instructions. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-17RISC-V: Add T-Head Fmv vendor extensionChristoph Müllner2-0/+9
This patch adds the XTheadFmv extension, which allows to access the upper 32 bits of a double-precision floating-point register in RV32. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-15readelf/objdump: support for SFrame sectionIndu Bhagat1-0/+3
This patch adds support for SFrame in readelf and objdump. The arguments of --sframe are optional for both readelf and objdump. include/ChangeLog: * sframe-api.h (dump_sframe): New function declaration. ChangeLog: * binutils/Makefile.am: Add dependency on libsframe for readelf and objdump. * binutils/Makefile.in: Regenerate. * binutils/doc/binutils.texi: Document --sframe=[section]. * binutils/doc/sframe.options.texi: New file. * binutils/objdump.c: Add support for SFrame format. * binutils/readelf.c: Likewise. * include/sframe-api.h: Add new API for dumping .sframe section. * libsframe/Makefile.am: Add sframe-dump.c. * libsframe/Makefile.in: Regenerate. * libsframe/sframe-dump.c: New file.
2022-11-15bfd: linker: merge .sframe sectionsIndu Bhagat3-1/+3
The linker merges all the input .sframe sections. When merging, the linker verifies that all the input .sframe sections have the same abi/arch. The linker uses libsframe library to perform key actions on the .sframe sections - decode, read, and create output data. This implies buildsystem changes to make and install libsframe before libbfd. The linker places the output .sframe section in a new segment of its own: PT_GNU_SFRAME. A new segment is not added, however, if the generated .sframe section is empty. When a section is discarded from the final link, the corresponding entries in the .sframe section for those functions are also deleted. The linker sorts the SFrame FDEs on start address by default and sets the SFRAME_F_FDE_SORTED flag in the .sframe section. This patch also adds support for generation of SFrame unwind information for the .plt* sections on x86_64. SFrame unwind info is generated for IBT enabled PLT, lazy/non-lazy PLT. The existing linker option --no-ld-generated-unwind-info has been adapted to include the control of whether .sframe unwind information will be generated for the linker generated sections like PLT. Changes to the linker script have been made as necessary. ChangeLog: * Makefile.def: Add install dependency on libsframe for libbfd. * Makefile.in: Regenerated. * bfd/Makefile.am: Add elf-sframe.c * bfd/Makefile.in: Regenerated. * bfd/bfd-in2.h (SEC_INFO_TYPE_SFRAME): Regenerated. * bfd/configure: Regenerate. * bfd/configure.ac: Add elf-sframe.lo. * bfd/elf-bfd.h (struct sframe_func_bfdinfo): New struct. (struct sframe_dec_info): Likewise. (struct sframe_enc_info): Likewise. (struct elf_link_hash_table): New member for encoded .sframe object. (struct output_elf_obj_tdata): New member. (elf_sframe): New access macro. (_bfd_elf_set_section_sframe): New declaration. * bfd/elf.c (get_segment_type): Handle new segment PT_GNU_SFRAME. (bfd_section_from_phdr): Likewise. (get_program_header_size): Likewise. (_bfd_elf_map_sections_to_segments): Likewise. * bfd/elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Add contents to the .sframe sections or .plt* entries. * bfd/elflink.c (elf_section_ignore_discarded_relocs): Handle SEC_INFO_TYPE_SFRAME. (_bfd_elf_default_action_discarded): Handle .sframe section. (elf_link_input_bfd): Merge .sframe section. (bfd_elf_final_link): Write the output .sframe section. (bfd_elf_discard_info): Handle discarding .sframe section. * bfd/elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Create .sframe section for .plt and .plt.sec. (_bfd_x86_elf_finish_dynamic_sections): Handle .sframe from .plt* sections. * bfd/elfxx-x86.h (PLT_SFRAME_FDE_START_OFFSET): New definition. (SFRAME_PLT0_MAX_NUM_FRES): Likewise. (SFRAME_PLTN_MAX_NUM_FRES): Likewise. (struct elf_x86_sframe_plt): New structure. (struct elf_x86_link_hash_table): New member. (struct elf_x86_init_table): New members for .sframe creation. * bfd/section.c: Add new definition SEC_INFO_TYPE_SFRAME. * binutils/readelf.c (get_segment_type): Handle new segment PT_GNU_SFRAME. * ld/ld.texi: Update documentation for --no-ld-generated-unwind-info. * ld/scripttempl/elf.sc: Support .sframe sections. * ld/Makefile.am (TESTSFRAMELIB): Use it. (check-DEJAGNU): Likewise. * ld/Makefile.in: Regenerated. * ld/configure.ac (TESTSFRAMELIB): Set to the .so or .a like TESTBFDLIB. * ld/configure: Regenerated. * bfd/elf-sframe.c: New file. include/ChangeLog: * elf/common.h (PT_GNU_SFRAME): New definition. * elf/internal.h (struct elf_segment_map): Handle new segment type PT_GNU_SFRAME. ld/testsuite/ChangeLog: * ld/testsuite/ld-bootstrap/bootstrap.exp: Add SFRAMELIB. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test sframe-simple-1. * ld/testsuite/ld-aarch64/sframe-bar.s: New file. * ld/testsuite/ld-aarch64/sframe-foo.s: Likewise. * ld/testsuite/ld-aarch64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-sframe/sframe-empty.d: New test. * ld/testsuite/ld-sframe/sframe-empty.s: New file. * ld/testsuite/ld-sframe/sframe.exp: New testsuite. * ld/testsuite/ld-x86-64/sframe-bar.s: New file. * ld/testsuite/ld-x86-64/sframe-foo.s: Likewise. * ld/testsuite/ld-x86-64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-x86-64/sframe-plt-1.d: Likewise. * ld/testsuite/ld-x86-64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-x86-64/x86-64.exp: Add new tests - sframe-simple-1, sframe-plt-1. * ld/testsuite/lib/ld-lib.exp: Add new proc to check if assembler supports SFrame section. * ld/testsuite/ld-sframe/discard.d: New file. * ld/testsuite/ld-sframe/discard.ld: Likewise. * ld/testsuite/ld-sframe/discard.s: Likewise.
2022-11-15libsframe: add the SFrame libraryWeimin Pan1-0/+231
libsframe is a library that allows you to: - decode a .sframe section - probe and inspect a .sframe section - encode (and eventually write) a .sframe section. This library is currently being used by the linker, readelf, objdump. This library will also be used by the SFrame unwinder which is still to be upstream'd. The file include/sframe-api.h defines the user-facing APIs for decoding, encoding and probing .sframe sections. A set of error codes together with their error message strings are also defined. Endian flipping is performed automatically at read and write time, if cross-endianness is detected. ChangeLog: * Makefile.def: Add libsframe as new module with its dependencies. * Makefile.in: Regenerated. * binutils/Makefile.am: Add libsframe. * binutils/Makefile.in: Regenerated. * configure: Regenerated * configure.ac: Add libsframe to host_libs. * libsframe/Makefile.am: New file. * libsframe/Makefile.in: New file. * libsframe/aclocal.m4: New file. * libsframe/config.h.in: New file. * libsframe/configure: New file. * libsframe/configure.ac: New file. * libsframe/sframe-error.c: New file. * libsframe/sframe-impl.h: New file. * libsframe/sframe.c: New file. include/ChangeLog: * sframe-api.h: New file. testsuite/ChangeLog: * libsframe/testsuite/Makefile.am: New file. * libsframe/testsuite/Makefile.in: Regenerated. * libsframe/testsuite/libsframe.decode/Makefile.am: New file. * libsframe/testsuite/libsframe.decode/Makefile.in: Regenerated. * libsframe/testsuite/libsframe.decode/decode.exp: New file. * libsframe/testsuite/libsframe.encode/Makefile.am: Likewise. * libsframe/testsuite/libsframe.encode/Makefile.in: Regenerated. * libsframe/testsuite/libsframe.encode/encode.exp: New file. * libsframe/testsuite/libsframe.encode/encode-1.c: Likewise. * libsframe/testsuite/libsframe.decode/be-flipping.c: Likewise. * libsframe/testsuite/libsframe.decode/frecnt-1.c: Likewise. * libsframe/testsuite/libsframe.decode/frecnt-2.c: Likewise. * libsframe/testsuite/libsframe.decode/DATA-BE: New file. * libsframe/testsuite/libsframe.decode/DATA1: Likewise. * libsframe/testsuite/libsframe.decode/DATA2: Likewise.
2022-11-15sframe.h: Add SFrame format definitionIndu Bhagat1-0/+303
The header sframe.h defines the SFrame format. The SFrame format is the Simple Frame format. It can be used to represent the minimal necessary unwind information required for backtracing. The current version supports AMD64 and AARCH64. More details of the SFrame format are included in the documentation of the header file in this patch. include/ChangeLog: * sframe.h: New file.
2022-11-14aarch64: Add support for Common Short Sequence Compression extensionAndre Vieira1-1/+5
This patch adds support for the CSSC extension and its corresponding instructions: ABS, CNT, CTZ, SMAX, UMAX, SMIN, UMIN. gas/ChangeLog: * config/tc-aarch64.c (parse_operands): Handle new operand types. * doc/c-aarch64.texi: Document new extension. * testsuite/gas/aarch64/cssc.d: New test. * testsuite/gas/aarch64/cssc.s: New test. include/ChangeLog: * opcode/aarch64.h (AARCH64_FEATURE_CSSC): New feature Macro. (enum aarch64_opnd): New operand types. (enum aarch64_insn_class): New instruction class. opcodes/ChangeLog: * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-opc.c (operand_general_constraint_met_p): Update for new operand types. (aarch64_print_operand): Likewise. * aarch64-opc.h (enum aarch64_field_kind): Declare FLD_CSSC_imm8 field. * aarch64-tbl.h (aarch64_feature_cssc): Define new feature set. (CSSC): Define new feature set Macro. (CSSC_INSN): Define new instruction type. (aarch64_opcode_table): Add new instructions.
2022-11-08sim: drop unused CORE_ADDR_TYPEMike Frysinger1-7/+0
This hasn't been used by gdb in decades, and doesn't make sense with a standalone sim program/library where the ABI is fixed. So punt it to simplify the code.
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-3/+2
When reading/writing arbitrary data to the system's memory, the unsigned char pointer type doesn't make that much sense. Switch it to void so we align a bit with standard C library read/write functions, and to avoid having to sprinkle casts everywhere.
2022-10-31sim: reg: constify store helperMike Frysinger1-1/+2
These functions only read from memory, so mark the pointer as const.
2022-10-31sim: common: change sim_read & sim_write to use void* buffersMike Frysinger1-2/+2
When reading/writing arbitrary data to the system's memory, the unsigned char pointer type doesn't make that much sense. Switch it to void so we align a bit with standard C library read/write functions, and to avoid having to sprinkle casts everywhere.
2022-10-28include: Define macro to ignore -Wdeprecated-declarations on GCCTsukasa OI1-0/+3
"-Wdeprecated-declarations" warning option can be helpful to track deprecated function delarations but sometimes we need to disable this warning for a good reason. DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS is an existing macro but only defined on Clang. Since "-Wdeprecated-declarations" is also available on GCC (>= 3.4.0), this commit adds equivalent definition as Clang. __GNUC__ and __GNUC_MINOR__ are not checked because this header file seems to assume GCC >= 4.6 (with "GCC diagnostic push/pop"). include/ChangeLog: * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS): Define also on GCC.
2022-10-27PowerPC: Add support for RFC02653 - Dense Math FacilityPeter Bergner1-15/+18
gas/ * config/tc-ppc.c (pre_defined_registers): Add dense math registers. (md_assemble): Check dmr specified in correct operand. * testsuite/gas/ppc/outerprod.s <dmsetaccz, dmxvbf16ger2, dmxvbf16ger2nn, dmxvbf16ger2np, dmxvbf16ger2pn, dmxvbf16ger2pp, dmxvf16ger2, dmxvf16ger2nn, dmxvf16ger2np, dmxvf16ger2pn, dmxvf16ger2pp, dmxvf32ger, dmxvf32gernn, dmxvf32gernp, dmxvf32gerpn, dmxvf32gerpp, dmxvf64ger, dmxvf64gernn, dmxvf64gernp, dmxvf64gerpn, dmxvf64gerpp, dmxvi16ger2, dmxvi16ger2pp, dmxvi16ger2s, dmxvi16ger2spp, dmxvi4ger8, dmxvi4ger8pp, dmxvi8ger4, dmxvi8ger4pp, dmxvi8ger4spp, dmxxmfacc, dmxxmtacc, pmdmxvbf16ger2, pmdmxvbf16ger2nn, pmdmxvbf16ger2np, pmdmxvbf16ger2pn, pmdmxvbf16ger2pp, pmdmxvf16ger2, pmdmxvf16ger2nn, pmdmxvf16ger2np, pmdmxvf16ger2pn, pmdmxvf16ger2pp, pmdmxvf32ger, pmdmxvf32gernn, pmdmxvf32gernp, pmdmxvf32gerpn, pmdmxvf32gerpp, pmdmxvf64ger, pmdmxvf64gernn, pmdmxvf64gernp, pmdmxvf64gerpn, pmdmxvf64gerpp, pmdmxvi16ger2, pmdmxvi16ger2pp, pmdmxvi16ger2s, pmdmxvi16ger2spp, pmdmxvi4ger8, pmdmxvi4ger8pp, pmdmxvi8ger4, pmdmxvi8ger4pp, pmdmxvi8ger4spp>: Add new tests. * testsuite/gas/ppc/outerprod.d: Likewise. * testsuite/gas/ppc/rfc02653.s: New test. * testsuite/gas/ppc/rfc02653.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it. include/ * opcode/ppc.h (PPC_OPERAND_DMR): Define. Renumber following PPC_OPERAND defines. opcodes/ * ppc-dis.c (print_insn_powerpc): Prepend 'dm' when printing DMR regs. * ppc-opc.c (insert_p2, (extract_p2, (insert_xa5, (extract_xa5, insert_xb5, (extract_xb5): New functions. (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a): Disallow operand overlap only on Power10. (DMR, DMRAB, P1, P2, XA5p, XB5p, XDMR_MASK, XDMRDMR_MASK, XX2ACC_MASK, XX2DMR_MASK, XX3DMR_MASK): New defines. (powerpc_opcodes): Add dmmr, dmsetaccz, dmsetdmrz, dmxor, dmxvbf16ger2, dmxvbf16ger2nn, dmxvbf16ger2np, dmxvbf16ger2pn, dmxvbf16ger2pp, dmxvf16ger2, dmxvf16ger2nn, dmxvf16ger2np, dmxvf16ger2pn, dmxvf16ger2pp, dmxvf32ger, dmxvf32gernn, dmxvf32gernp, dmxvf32gerpn, dmxvf32gerpp, dmxvf64ger, dmxvf64gernn, dmxvf64gernp, dmxvf64gerpn, dmxvf64gerpp, dmxvi16ger2, dmxvi16ger2pp, dmxvi16ger2s, dmxvi16ger2spp, dmxvi4ger8, dmxvi4ger8pp, dmxvi8ger4, dmxvi8ger4pp, dmxvi8ger4spp, dmxxextfdmr256, dmxxextfdmr512, dmxxinstdmr256, dmxxinstdmr512, dmxxmfacc, dmxxmtacc, pmdmxvbf16ger2, pmdmxvbf16ger2nn, pmdmxvbf16ger2np, pmdmxvbf16ger2pn, pmdmxvbf16ger2pp, pmdmxvf16ger2, pmdmxvf16ger2nn, pmdmxvf16ger2np, pmdmxvf16ger2pn, pmdmxvf16ger2pp, pmdmxvf32ger, pmdmxvf32gernn, pmdmxvf32gernp, pmdmxvf32gerpn, pmdmxvf32gerpp, pmdmxvf64ger, pmdmxvf64gernn, pmdmxvf64gernp, pmdmxvf64gerpn, pmdmxvf64gerpp, pmdmxvi16ger2, pmdmxvi16ger2pp, pmdmxvi16ger2s, pmdmxvi16ger2spp, pmdmxvi4ger8, pmdmxvi4ger8pp, pmdmxvi8ger4, pmdmxvi8ger4pp, pmdmxvi8ger4spp.
2022-10-19aarch64-pe support for LD, GAS and BFDJedidiah Thompson1-0/+22
Allows aarch64-pe to be targeted natively, not having to use objcopy to convert it from ELF to PE. Based on initial work by Jedidiah Thompson Co-authored-by: Jedidiah Thompson <wej22007@outlook.com> Co-authored-by: Zac Walker <zac.walker@linaro.org>
2022-10-14e200 LSP supportAlan Modra1-0/+5
It has bothered me for a long time that we have disabled LSP (and SPE) tests. Also the LSP test comment indicating there is something wrong with get_powerpc_dialect. I don't think there is. Decoding of a VLE instruction depends on whether the processor is in VLE mode (some processors support both VLE and standard PPC) which we flag per section with SHF_PPC_VLE for decoding when disassembling. Background: Some versions of powerpc e200 have "Lightweight Signal Processing" support, examples being e200z215 and e200z425. As far as I can tell, LSP and SPE are mutually exclusive. This seems to be borne out by insn encoding, for example LSP "zvaddih" and SPE "evaddw" have the same encoding. So none of the processor descriptions in ppc_opts ought to have both PPC_OPCODE_LSP and PPC_OPCODE_SPE/2, if we want disassembly to work. I also could not find anything to suggest that the LSP insns are enabled only in VLE mode, which means the LSP insns should not be in vle_opcodes. Fix all this by moving the LSP insns to their own table, and add a new e200z2 cpu entry with LSP support, removing LSP from -me200z4 and from -mvle. (Yes, I know, as I said above some of the e200z4 processors have LSP. Others have SPE. It's hard to choose good options. Think of z2 as meaning earlier, z4 as later.) Also add -mlsp to allow adding the LSP insn set. include/ * opcode/ppc.h (lsp_opcodes, lsp_num_opcodes): Declare. (LSP_OP_TO_SEG): Define. binutils/ * doc/binutils.texi: Update ppc docs. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Add lsp opcodes to ppc_hash. * doc/c-ppc.texi: Document e200 and lsp. * testsuite/gas/ppc/lsp-checks.d: Assemble with -me200z2. * testsuite/gas/ppc/lsp.d: Likewise, disassembly too. * testsuite/gas/ppc/ppc.exp: Don't xfail lsp test. opcodes/ * ppc-dis.c (ppc_opts): Add e200z2 and lsp. Don't set PPC_OPCODE_LSP for e200z4 or vle. (ppc_parse_cpu): Mutually exclude LSP and SPE. (LSP_OPCD_SEGS): Define. (lsp_opcd_indices): New array. (disassemble_init_powerpc): Init lsp_opcd_indices. (lookup_lsp): New function. (print_insn_powerpc): Call it. * ppc-opc.c: Include libiberty.h for ARRAY_SIZE and use throughout. (vle_opcodes): Move LSP opcodes to.. (lsp_opcodes): ..here, and sort. (lsp_num_opcodes): New.
2022-10-14RISC-V: Move certain arrays to riscv-opc.cTsukasa OI1-11/+2
This is a part of small tidying (declare tables in riscv-opc.c). include/ChangeLog: * opcode/riscv.h (riscv_rm, riscv_pred_succ): Move declarations to opcodes/riscv-opc.c. New non-static definitions. opcodes/ChangeLog: * riscv-opc.c (riscv_rm, riscv_pred_succ): Move from include/opcode/riscv.h. Add description.
2022-10-04RISC-V: Fix buffer overflow on print_insn_riscvTsukasa OI1-0/+2
Because riscv_insn_length started to support instructions up to 176-bit, we need to increase packet buffer size to 176-bit in size. include/ChangeLog: * opcode/riscv.h (RISCV_MAX_INSN_LEN): Max instruction length for use in buffer size. opcodes/ChangeLog: * riscv-dis.c (print_insn_riscv): Increase buffer size for max 176-bit length instructions.
2022-10-04RISC-V: Renamed INSN_CLASS for floating point in integer extensions.Nelson Chu1-7/+7
Just added suffix _INX for those INSN_CLASS should be enough to represent their fpr can be replaced by gpr.
2022-10-04RISC-V/gas: allow generating up to 176-bit instructions with .insnJan Beulich1-0/+3
For the time being simply utilize O_big to avoid widening other fields, bypassing append_insn() etc.
2022-10-03Fix self-move warning check for GCC 13+Jan-Benedict Glaw2-0/+8
GCC 13 got the self-move warning (0abb78dda084a14b3d955757c6431fff71c263f3), but that warning is only checked for clang, resulting in: /usr/lib/gcc-snapshot/bin/g++ -x c++ -I. -I. -I./config -DLOCALEDIR="\"/tmp/gdb-m68k-linux/share/locale\"" -DHAVE_CONFIG_H -I./../include/opcode -I./../readline/readline/.. -I./../zlib -I../bfd -I./../bfd -I./../include -I../libdecnumber -I./../libdecnumber -I./../gnulib/import -I../gnulib/import -I./.. -I.. -I./../libbacktrace/ -I../libbacktrace/ -DTUI=1 -I./.. -pthread -Wall -Wpointer-arith -Wno-unused -Wunused-value -Wunused-variable -Wunused-function -Wno-switch -Wno-char-subscripts -Wempty-body -Wunused-but-set-parameter -Wunused-but-set-variable -Wno-sign-compare -Wno-error=maybe-uninitialized -Wno-mismatched-tags -Wsuggest-override -Wimplicit-fallthrough=3 -Wduplicated-cond -Wshadow=local -Wdeprecated-copy -Wdeprecated-copy-dtor -Wredundant-move -Wmissing-declarations -Wstrict-null-sentinel -Wformat -Wformat-nonliteral -Werror -g -O2 -c -o unittests/environ-selftests.o -MT unittests/environ-selftests.o -MMD -MP -MF unittests/.deps/environ-selftests.Tpo unittests/environ-selftests.c unittests/environ-selftests.c: In function 'void selftests::gdb_environ_tests::test_self_move()': unittests/environ-selftests.c:228:7: error: moving 'env' of type 'gdb_environ' to itself [-Werror=self-move] 228 | env = std::move (env); | ~~~~^~~~~~~~~~~~~~~~~ unittests/environ-selftests.c:228:7: note: remove 'std::move' call cc1plus: all warnings being treated as errors make[1]: *** [Makefile:1896: unittests/environ-selftests.o] Error 1 make[1]: Leaving directory '/var/lib/laminar/run/gdb-m68k-linux/3/binutils-gdb/gdb' make: *** [Makefile:13193: all-gdb] Error 2
2022-09-30LoongArch: Update ELF e_flags handling according to specification.liuzhensong1-23/+21
Update handling of e_flags according to the documentation update [1] (discussions [2][3]). Object file bitness is now represented in the EI_CLASS byte. The e_flags field is now interpreted as follows: e_flags[2:0]: Base ABI modifier - 0x1: soft-float - 0x2: single-precision hard-float - 0x3: double-precision hard-float e_flags[7:6]: ELF object ABI version - 0x0: v0 - 0x1: v1 [1]: https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-ELF-ABI-EN.adoc#e_flags-identifies-abi-type-and-version [2]: https://github.com/loongson/LoongArch-Documentation/pull/61 [3]: https://github.com/loongson/LoongArch-Documentation/pull/47
2022-09-23Support AT_USRSTACKBASE and AT_USRSTACKLIM.John Baldwin1-0/+2
FreeBSD's kernel has recently added two new ELF auxiliary vector entries to describe the location of the user stack for the initial thread in a process. This change displays the proper name and description of these entries in 'info auxv'.
2022-09-23RISC-V: Add Zawrs ISA extension supportChristoph Müllner2-0/+9
This patch adds support for the Zawrs ISA extension ("wrs.nto" and "wrs.sto" instructions). The specification can be found here: https://github.com/riscv/riscv-zawrs/blob/main/zawrs.adoc Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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