Age | Commit message (Collapse) | Author | Files | Lines |
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bit-fields. Rearrange to put all like types together.
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for R_XSTORMY16_LO16 and R_XSTORMY16_HI16.
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"default_args".
(struct not_wot): Constify "args".
(struct not): Constify "name".
(numopcodes): Delete.
(endop): Delete.
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* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
* config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype.
(c_to_r, ipush_code, fake_opcode, alias): Likewise.
(fake_opcode): Adjust for pj_opc_int_t change.
(md_begin): Likewise.
(md_assemble): Likewise.
(ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc
instead of non-existent third arg of parse_exp_save_ilp.
(md_parse_option): Correct "little" and "big" calls.
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compiler.
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bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
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* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
* cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
gas/
* config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
* gas/ia64/ldxmov-1.[ds]: New.
* gas/ia64/ldxmov-2.[ls]: New.
* gas/ia64/ia64.exp: Run them.
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Constify "leaf" and "multi".
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(EF_M68HC11_MACH_MASK, EF_M68HC11_MACH): Define.
(EF_M68HC11_MERGE_MACH, EF_M68HC11_CAN_MERGE_MACH): Define.
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comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
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* internal.h (elf32_internal_ehdr, Elf32_Internal_Ehdr,
elf64_internal_ehdr, Elf64_Internal_Ehdr, elf32_internal_phdr,
Elf32_Internal_Phdr, elf64_internal_phdr, Elf64_Internal_Phdr,
elf32_internal_shdr, Elf32_Internal_Shdr, elf64_internal_shdr,
Elf64_Internal_Shdr, elf32_internal_sym, elf64_internal_sym,
Elf32_Internal_Sym, Elf64_Internal_Sym, Elf32_Internal_Note,
elf32_internal_note, elf32_internal_rel, Elf32_Internal_Rel,
elf64_internal_rel, Elf64_Internal_Rel, elf32_internal_rela,
elf64_internal_rela, Elf32_Internal_Rela, Elf64_Internal_Rela,
elf32_internal_dyn, elf64_internal_dyn, Elf32_Internal_Dyn,
Elf64_Internal_Dyn, elf32_internal_verdef, elf64_internal_verdef,
elf32_internal_verdaux, elf64_internal_verdaux, elf32_internal_verneed,
elf64_internal_verneed, elf32_internal_vernaux, elf64_internal_vernaux,
elf32_internal_versym, elf64_internal_versym, Elf32_Internal_Verdef,
Elf64_Internal_Verdef, Elf32_Internal_Verdaux, Elf64_Internal_Verdaux,
Elf32_Internal_Verneed, Elf64_Internal_Verneed, Elf32_Internal_Vernaux,
Elf64_Internal_Vernaux, Elf32_Internal_Versym, Elf64_Internal_Versym,
Elf32_Internal_Syminfo, Elf64_Internal_Syminfo): Delete.
(Elf_Internal_Rel): Delete.
bfd/ChangeLog
* elf-bfd.h: Replace occurrences of Elf32_Internal_* and
Elf64_Internal_* with Elf_Internal_*. Replace Elf_Internal_Rel
with Elf_Internal_Rela.
* elf-hppa.h, elf-m10200.c, elf-m10300.c, elf32-arc.c, elf32-arm.h,
elf32-avr.c, elf32-cris.c, elf32-d10v.c, elf32-d30v.c, elf32-dlx.c,
elf32-fr30.c, elf32-frv.c, elf32-gen.c, elf32-h8300.c, elf32-hppa.c,
elf32-i370.c, elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c,
elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c, elf32-m68k.c,
elf32-mcore.c, elf32-mips.c, elf32-openrisc.c, elf32-or32.c,
elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-v850.c, elf32-vax.c,
elf32-xstormy16.c, elf64-alpha.c, elf64-gen.c, elf64-hppa.c,
elf64-mips.c, elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c,
elf64-sparc.c, elf64-x86-64.c, elfarm-nabi.c, elfarm-oabi.c,
elfcode.h, elflink.h, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c: Ditto.
* elf-hppa.h (elf_hppa_internal_shdr): Delete. Use Elf_Internal_Shdr
throughout instead.
* elf.c (_bfd_elf_no_info_to_howto_rel): Delete.
* elfcode.h (elf_swap_reloca_in): Pass source operand as a bfd_byte *.
Remove INLINE keyword.
(elf_swap_reloc_in): Likewise. Also clear r_addend.
(elf_swap_reloc_out, elf_swap_reloca_out): Pass destination operand
as a bfd_byte *.
(elf_write_relocs): Consolidate REL and RELA code.
(elf_slurp_reloc_table_from_section): Simplify REL code.
(NAME(_bfd_elf,size_info)): Populate reloc swap entries.
* elf-bfd.h (MAX_INT_RELS_PER_EXT_REL): Define.
* elflink.h (elf_link_read_relocs_from_section): Consolidate REL and
RELA code.
(elf_link_adjust_relocs): Likewise. Don't malloc space for temp
reloc array, use a fixed size of MAX_INT_RELS_PER_EXT_REL.
(elf_link_output_relocs): Likewise.
(elf_reloc_link_order): Likewise.
(elf_finish_pointer_linker_section): Likewise.
(struct elf_link_sort_rela): Remove union.
(elf_link_sort_cmp1): Update to suit.
(elf_link_sort_cmp2): Here too.
(elf_link_sort_relocs): Consolidate REL and RELA code. Fix memory
over-allocation for int_rels_per_ext_rel != 1 case.
* elf32-arm.h: Update all bfd_elf32_swap_reloc_out calls.
* elf32-i386.c: Likewise.
* elf32-cris.c: Likewise for bfd_elf32_swap_reloca_out.
* elf32-hppa.c, elf32-i370.c, elf32-m68k.c, elf32-ppc.c, elf32-s390.c,
elf32-sh.c, elf32-vax.c, elfxx-mips.c: Likewise.
* elf64-alpha.c: Likewise for bfd_elf64_swap_reloca_out.
* elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c,
elf64-sparc.c, elf64-x86-64.c: Likewise.
* elfxx-ia64.c: Likewise for bfd_elfNN_swap_reloca_out.
* elfxx-mips.c (sort_dynamic_relocs): Likewise for
bfd_elf32_swap_reloc_in.
* elf32-arm.h: Update elf32_arm_info_to_howto calls.
* elf32-mips.c: Likewise for mips_info_to_howto_rel.
(mips_elf64_swap_reloc_in): Zero r_addend.
(mips_elf64_be_swap_reloc_in): Likewise.
(mips_elf64_slurp_one_reloc_table): Simplify.
* elf64-alpha.c (alpha_elf_size_info): Populate reloc swap entries.
* elf64-hppa.c (hppa64_elf_size_info): Likewise.
* elf64-sparc.c (sparc64_elf_size_info): Likewise.
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* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
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* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
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* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
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parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
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* opcode/m88k.h (INSTAB): Remove 'next' field.
(instruction): Remove definition; replace with extern declaration
and mark as const.
W
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(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
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include/ChangeLog)
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* mips.h: Update comment for new opcodes.
(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
Don't match CPU_R4111 with INSN_4100.
[opcodes/]
* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
and bfd_mach_mips5500.
* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
(N411, N412, N5, N54, N55): New convenience defines.
(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
Change dmadd16 and madd16 from V1 to N411.
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* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.
[bfd/]
* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
(bfd_mach_mips5500): New.
* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
(arch_info_struct): Add corresponding entries here.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
bfd_mach_mips5400 and bfd_mach_mips5500.
(_bfd_mips_elf_mach_extends_p): New function.
(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
the EF_MIPS_MACH flags.
* bfd-in2.h: Regenerate.
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* reloc.c: Add x86-64 TLS relocs.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf64-x86-64.c (x86_64_elf_howto): Fix size fields for 32-bit
relocs. Add TLS relocs.
(x86_64_reloc_map): Add TLS relocs.
(elf64_x86_64_info_to_howto): Adjust for added TLS relocs.
(struct elf64_x86_64_link_hash_entry): Add tls_type field.
(GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE): Define.
(elf64_x86_64_hash_entry): Define.
(struct elf64_x86_64_obj_tdata): New.
(elf64_x86_64_tdata, elf64_x86_64_local_got_tls_type): Define.
(struct elf64_x86_64_link_hash_table): Add tls_ld_got.
(link_hash_newfunc): Initialize tls_type.
(elf64_x86_64_link_hash_table_create): Initialize tls_ld_got.
(elf64_x86_64_copy_indirect_symbol): Swap tls_type if necessary.
(elf64_x86_64_mkobject): New.
(elf64_x86_64_elf_object_p): Allocate struct elf64_x86_64_obj_tdata.
(elf64_x86_64_tls_transition): New.
(elf64_x86_64_check_relocs): Add r_type variable and use it.
Handle TLS relocs.
(elf64_x86_64_gc_sweep_hook): Handle TLS relocs.
(allocate_dynrelocs): Allocate GOT space for TLS relocs.
(elf64_x86_64_size_dynamic_sections): Likewise.
(dtpoff_base, tpoff): New.
(elf64_x86_64_relocate_section): Handle TLS relocs.
(elf64_x86_64_finish_dynamic_symbol): Only handle non-TLS GOT
entries.
(bfd_elf64_mkobject): Define.
* elf32-i386.c (elf_i386_check_relocs) [R_386_TLS_LE]: Set
DF_STATIC_TLS if shared.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Add x86-64 TLS relocs.
Define them if not BFD_ASSEMBLER.
(lex_got): Handle @tlsgd, @dtpoff and @tpoff in 64-bit mode, add
@tlsld.
(md_apply_fix3): No addend for BFD_RELOC_X86_64_TLSGD,
BFD_RELOC_X86_64_TLSLD and BFD_RELOC_X86_64_GOTTPOFF.
(tc_gen_reloc): Handle x86-64 TLS relocs.
include/
* elf/x86-64.h: Add TLS relocs.
ld/testsuite/
* lib/ld-lib.exp (run_ld_link_tests): Add.
* ld-sh/sh64/sh64.exp (run_ld_link_tests, regexp_diff,
file_contents): Remove.
(sh64tests): Add 6th field to the tests array.
* ld-i386/i386.exp (run_ld_link_tests): Remove.
* ld-x86-64/x86-64.exp: New.
* ld-x86-64/tlsbin.dd: New test.
* ld-x86-64/tlsbinpic.s: New test.
* ld-x86-64/tlsbin.rd: New test.
* ld-x86-64/tlsbin.s: New test.
* ld-x86-64/tlsbin.sd: New test.
* ld-x86-64/tlsbin.td: New test.
* ld-x86-64/tlslib.s: New test.
* ld-x86-64/tlspic1.s: New test.
* ld-x86-64/tlspic2.s: New test.
* ld-x86-64/tlspic.dd: New test.
* ld-x86-64/tlspic.rd: New test.
* ld-x86-64/tlspic.sd: New test.
* ld-x86-64/tlspic.td: New test.
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* regs/: Delete directory.
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corresponding HAVE_DECL_ macro is 1.
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* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
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Synch up with the gcc's dwarf2.h
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From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
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(M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
memory banks.
(M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
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EF_M68HC11_ABI): Define for ABI specification.
(STO_M68HC12_FAR, STO_M68HC12_INTERRUPT): Symbol flags for
linker and debugger.
(R_M68HC11_24, R_M68HC11_LO16, R_M68HC11_PAGE): New relocs.
(R_M68HC11_RL_JUMP, R_M68HC11_RL_GROUP): New reloc for linker
relaxation.
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