Age | Commit message (Collapse) | Author | Files | Lines |
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2009-04-08 H.J. Lu <hongjiu.lu@intel.com>
* elflink.c (elf_link_add_object_symbols): Warn alternate ELF
machine code.
include/
2009-04-08 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (bfd_link_info): Add warn_alternate_em.
ld/
2009-04-08 H.J. Lu <hongjiu.lu@intel.com>
* lexsup.c (option_values): Add OPTION_WARN_ALTERNATE_EM.
(ld_options): Likewise.
(parse_args): Likewise.
* ld.texinfo: Document --warn-alternate-em.
* NEWS: Mention --warn-alternate-em.
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* mep.h (EF_MEP_CPU_C5): New.
[bfd]
* archures.c: Add bfd_mach_mep_c5.
* bfd-in2.h: Likewise.
* cpu-mep.c: Add bfd_c5_arch.
* elf32-mep.c: Support it.
[gas]
* config/tc-mep.c: Add UCI/DSP instruction support. Add C5 support.
(md_show_usage): Change default endian to little.
* config/tc-mep.h (TARGET_BYTES_BIG_ENDIAN): Change default to little.
[ld]
* emulparams/elf32mep.sh: Change default endian to little.
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* elf32-h8300.c (elf32_h8_relax_section): Relax MOVA opcodes.
[gas]
* tc-h8300.c (do_a_fix_imm): Pass the insn, force relocs for MOVA
immediates.
(build_bytes): Pass insn to do_a_fix_imm.
[include/opcode]
* h8300.h: Add relaxation attributes to MOVA opcodes.
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* xcoff.h (xcoff_link_hash_table): Move to bfd/xcofflink.c.
bfd/
* xcofflink.c (xcoff_link_hash_table): Moved from include/coff/xcoff.h.
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* common.h (EM_INTEL178): Removed.
(EM_INTEL179): Likewise.
(EM_ETPU): New.
(EM_SLE9X): Likewise.
(EM_INTEL181): Likewise.
(EM_INTEL182): Likewise.
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* common.h (EM_INTEL178): New.
(EM_INTEL179): Likewise.
(EM_INTEL180): Likewise.
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* common.h (SHT_GNU_INCREMENTAL_INPUTS): Define.
elfcpp:
* elfcpp.h (SHT_GNU_INCREMENTAL_INPUTS): Define.
gold:
* incremental.cc: New file.
* Makefile.am (CCFILES): Add incremental.cc.
* Makefile.in: Rebuild.
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(NT_OPENBSD_REGS, NT_OPENBSD_FPREGS, NT_OPENBSD_XFPREGS)
(NT_OPENBSD_WCOOKIE): New defines.
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* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13
documentation.
bfd/
* elf32-m68hc1x.c: Include alloca-conf.h.
* xsym.c: Likewise.
* elf64-hppa.c: Likewise. Remove existing #if's handling alloca.
* som.c: Likewise.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
binutils/
* sysdep.h: Include alloca-conf.h instead of config.h and remove
existing #if's handling alloca.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
gas/
* as.h: Include alloca-conf.h instead of config.h and remove
existing #if's handling alloca.
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
* openrisc-opc.c: Regenerate.
ld/
* ld.h: Remove alloca handling.
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* common.h (AT_RANDOM): Define.
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* xcoff.h (XCOFF_EXPALL, XCOFF_EXPFULL): New flags.
(xcoff_loader_info): Add auto_export_flags.
bfd/
* bfd-in.h (bfd_xcoff_size_dynamic_sections): Replace the
bfd_boolean export_defineds parameter with an unsigned int
auto_export_flags parameter.
* bfd-in2.h: Regenerate.
* xcofflink.c (xcoff_archive_contains_shared_object_p): New function,
split out from xcoff_build_ldsyms.
(xcoff_covered_by_expall_p): New function.
(xcoff_auto_export_p): New function, split out from xcoff_build_ldsyms
but with extra code to handle -bexpfull and -bexpall.
(xcoff_mark_auto_exports): New function.
(xcoff_build_ldsyms): Use xcoff_auto_export_p to decide whether
a function should be automatically exported.
(bfd_xcoff_size_dynamic_sections): Replace the export_defineds
parameter with an auto_export_flags parameter. Update ldinfo
accordingly. Use xcoff_mark_auto_exports to mark all automatically-
exported symbols.
ld/
* emultempl/aix.em (auto_export_flags): New variable.
(explicit_auto_export_flags): Likewise.
(OPTION_EXPALL, OPTION_EXPFULL): New enum values.
(OPTION_NOEXPALL, OPTION_NOEXPFULL): Likewise.
(gld${EMULATION_NAME}_add_options): Add -bexpall, -bexpfull,
-bnoexpall and -bnoexpfull.
(gld${EMULATION_NAME}_handle_option): Handle them.
(gld${EMULATION_NAME}_before_allocation): Update the call to
bfd_size_dynamic_sections.
ld/testsuite/
* ld-powerpc/aix-export-1-all.dd, ld-powerpc/aix-export-1-full.dd,
ld-powerpc/aix-export-1a.s, ld-powerpc/aix-export-1b.s: New tests.
* ld-powerpc/aix52.exp: Run them.
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* internal.h (C_AIX_WEAKEXT): New macro.
(C_WEAKEXT): Use the GNU definition in the generic part of the file,
and conditionally reset it to C_AIX_WEAKEXT in the XCOFF part of
the file.
(CSECT_SYM_P): New macro.
* xcoff.h (L_WEAK): Define.
(EXTERN_SYM_P): New macro.
bfd/
* coffcode.h (coff_pointerize_aux_hook): Update CSECT_SYM_P to
check whether a symbol has csect information.
(coff_print_aux): Likewise.
* coff-rs6000.c (_bfd_xcoff_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff_swap_aux_out): Likewise.
(xcoff_reloc_type_br): Handle defweak symbols too.
* coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Handle auxillary csect
information for C_AIX_WEAKEXT too.
(_bfd_xcoff64_swap_aux_out): Likewise.
(xcoff64_reloc_type_br): Handle defweak symbols too.
* coffgen.c (coff_print_symbol): Handle auxillary function
information for C_AIX_WEAKEXT too.
* xcofflink.c (_bfd_xcoff_canonicalize_dynamic_symtab): Set BSF_WEAK
instead of BSF_GLOBAL if the L_WEAK flag is set.
(xcoff_dynamic_definition_p): New function.
(xcoff_link_add_dynamic_symbols): Use it to decide whether ldsym
defines h. Don't change h if ldsym isn't the definition. Otherwise,
always take the symbol class from the ldsym. Use weak bfd symbol
types for weak ldsyms.
(xcoff_link_add_symbols): Use CSECT_SYM_P and EXTERN_SYM_P.
Fix the check for whether a definition is from a shared object.
Allow redefinitions of weak symbols.
(xcoff_link_check_ar_symbols): Use EXTERN_SYM_P.
(xcoff_keep_symbol_p): Likewise.
(bfd_xcoff_size_dynamic_sections): Use CSECT_SYM_P.
(xcoff_link_input_bfd): Use CSECT_SYM_P and EXTERN_SYM_P.
Add .loader entries for C_AIX_WEAKEXT as well as C_EXT symbols,
but mark them as L_WEAK.
(xcoff_write_global_symbol): Treat weak symbols as C_AIX_WEAKEXT
instead of C_EXT if C_AIX_WEAKEXT == C_WEAKEXT.
gas/
* config/tc-ppc.c (ppc_frob_symbol): Add csect information for
C_AIX_WEAKEXT too.
ld/testsuite/
* ld-powerpc/aix-glink-2a.s, ld-powerpc/aix-glink-2a.ex,
ld-powerpc/aix-glink-2b.s, ld-powerpc/aix-glink-2c.s,
ld-powerpc/aix-glink-2c.ex, ld-powerpc/aix-glink-2d.s,
ld-powerpc/aix-glink-2-32.dd, ld-powerpc/aix-glink-2-64.dd,
ld-powerpc/aix-weak-1a.s, ld-powerpc/aix-weak-1b.s,
ld-powerpc/aix-weak-1-rel.hd, ld-powerpc/aix-weak-1-rel.nd,
ld-powerpc/aix-weak-1-dso.hd, ld-powerpc/aix-weak-1-dso.nd,
ld-powerpc/aix-weak-1-dso.dnd, ld-powerpc/aix-weak-1.ex,
ld-powerpc/aix-weak-2a.s, ld-powerpc/aix-weak-2a.ex,
ld-powerpc/aix-weak-2a.nd, ld-powerpc/aix-weak-2b.s,
ld-powerpc/aix-weak-2b.nd, ld-powerpc/aix-weak-2c.s,
ld-powerpc/aix-weak-2c.ex, ld-powerpc/aix-weak-2c.nd,
ld-powerpc/aix-weak-2c.od, ld-powerpc/aix-weak-3a.s,
ld-powerpc/aix-weak-3a.ex, ld-powerpc/aix-weak-3b.s,
ld-powerpc/aix-weak-3b.ex, ld-powerpc/aix-weak-3-32.d,
ld-powerpc/aix-weak-3-32.dd, ld-powerpc/aix-weak-3-64.d,
ld-powerpc/aix-weak-3-64.dd: New tests.
* ld-powerpc/aix52.exp: Run them. Replace tmp/aix-* with
tmp/aix64-* in 64-bit ld options.
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* xcoff.h (XCOFF_ALLOCATED): New flag.
bfd/
* xcofflink.c (xcoff_mark): When walking the relocations,
only mark the target symbol or the target section, not both.
(xcoff_final_definition_p): New function.
(xcoff_keep_symbol_p): Use it to check whether an external XCOFF
symbol is a valid definition of the associated output symbol.
Use XCOFF_ALLOCATED to stop the same hash table entry having
two output symbols.
(bfd_xcoff_size_dynamic_sections): Set XCOFF_ALLOCATED when
keeping a symbol.
(xcoff_link_input_bfd): Use xcoff_final_definition_p.
ld/testsuite/
* ld-powerpc/aix-no-dup-syms-1a.s, ld-powerpc/aix-no-dup-syms-1b.s,
ld-powerpc/aix-no-dup-syms-1.ex, ld-powerpc/aix-no-dup-syms-1.im,
ld-powerpc/aix-no-dup-syms-1-dso.dnd,
ld-powerpc/aix-no-dup-syms-1-dso.drd,
ld-powerpc/aix-no-dup-syms-1-dso.nd,
ld-powerpc/aix-no-dup-syms-1-dso.rd,
ld-powerpc/aix-no-dup-syms-1-rel.nd,
ld-powerpc/aix-no-dup-syms-1-rel.rd: New tests.
* ld-powerpc/aix52.exp: Run them.
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* xcoff.h (XCOFF_CALLED, XCOFF_IMPORT): Update comments.
(XCOFF_WAS_UNDEFINED): New flag.
(xcoff_link_hash_table): Add an "rtld" field.
bfd/
* coff-rs6000.c (xcoff_ppc_relocate_section): Report relocations
against undefined symbols if the symbol's XCOFF_WAS_UNDEFINED
flag is set. Assert that all undefined symbols are either
imported or defined by a dynamic object.
* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
* xcofflink.c (xcoff_link_add_symbols): Extend function-symbol
handling to all relocations. Only set XCOFF_CALLED for function
symbols.
(xcoff_find_function): New function, split out from...
(bfd_xcoff_export_symbol) ...here.
(xcoff_set_import_path): New function, split out from...
(bfd_xcoff_import_symbol): ...here. Remove assertion for old
meaning of XCOFF_CALLED.
(xcoff_mark_symbol): If we mark an undefined and unimported
symbol, find some way of defining it. If the symbol is a function
descriptor, fill in its definition automatically. If the symbol
is a function, mark its descriptor and allocate room for global
linkage code. Otherwise mark the symbol as implicitly imported.
Move the code for creating function descriptors from...
(xcoff_build_ldsyms): ...here. Use XCOFF_WAS_UNDEFINED to
check for symbols that were implicitly defined.
(xcoff_mark): Don't count any dynamic relocations against
function symbols.
(bfd_xcoff_size_dynamic_sections): Save the rtld parameter
in the xcoff link info.
(xcoff_link_input_bfd): Remove handling of undefined and
unexported symbols.
ld/
* emultempl/aix.em (gld${EMULATION_NAME}_handle_option): Make
-berok and -bernotok control link_info.unresolved_syms_in_objects
and link_info.unresolved_syms_in_shared_libs instead of
force_make_executable.
ld/testsuite/
* ld-powerpc/aix-glink-1.ex, ld-powerpc/aix-glink-1.s,
ld-powerpc/aix-glink-1-32.dd, ld-powerpc/aix-glink-1-64.dd,
ld-powerpc/aix-glink-1-32.d, ld-powerpc/aix-glink-1-64.d: New tests.
* ld-powerpc/aix52.exp: Run them.
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2009-03-12 Dave Korn <dave.korn.cygwin@gmail.com>
* coff/internal.h (struct internal_extra_pe_aouthdr): Correct type
of DllCharacteristics flags field to unsigned.
* coff/pe.h (IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
IMAGE_DLL_CHARACTERISTICS_NX_COMPAT,
IMAGE_DLLCHARACTERISTICS_NO_ISOLATION,
IMAGE_DLLCHARACTERISTICS_NO_SEH,
IMAGE_DLLCHARACTERISTICS_NO_BIND,
IMAGE_DLLCHARACTERISTICS_WDM_DRIVER,
IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE): New macros to
define flag bit values for DllCharacteristics field of PEAOUTHDR,
PEPAOUTHDR.
ld/ChangeLog
2009-03-12 Dave Korn <dave.korn.cygwin@gmail.com>
Danny Smith <dannysmith@users.sourceforge.net>
* emultmpl/pe.em (pe_dll_characteristics): New variable.
(OPTION_DYNAMIC_BASE, OPTION_FORCE_INTEGRITY, OPTION_NX_COMPAT,
OPTION_NO_ISOLATION. OPTION_NO_SEH, OPTION_NO_BIND,
OPTION_WDM_DRIVER, OPTION_TERMINAL_SERVER_AWARE):
New macros for options to set DllCharacteristics flag bits.
(gld${EMULATION_NAME}_add_options): Add dynamicbase, forceinteg,
nxcompat, no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
(init): Add DllCharacteristics field.
(gld_${EMULATION_NAME}_list_options): List new options.
(gld${EMULATION_NAME}_handle_option): Handle new options.
* emultmpl/pep.em (pe_dll_characteristics): New variable.
(OPTION_DYNAMIC_BASE, OPTION_FORCE_INTEGRITY, OPTION_NX_COMPAT,
OPTION_NO_ISOLATION. OPTION_NO_SEH, OPTION_NO_BIND,
OPTION_WDM_DRIVER, OPTION_TERMINAL_SERVER_AWARE):
New macros for options to set DllCharacteristics flags.
(gld${EMULATION_NAME}_add_options): Add dynamicbase, forceinteg,
nxcompat,no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
(init): Add DllCharacteristics field.
(gld_${EMULATION_NAME}_list_options): List new options.
(gld${EMULATION_NAME}_handle_option): Handle new options.
* ldtexinfo : Document dynamicbase, forceinteg, nxcompat,
no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
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* ppc.h (ppc_parse_cpu): Declare.
opcodes/
* ppc-dis.c: Include "opintl.h".
(struct ppc_mopt, ppc_opts): New.
(ppc_parse_cpu): New function.
(powerpc_init_dialect): Use it.
(print_ppc_disassembler_options): Dump options from ppc_opts.
Internationalize message.
gas/
* config/tc-ppc.c (parse_cpu): Delete.
(md_parse_option, ppc_machine): Use ppc_parse_cpu.
gas/testsuite/
* gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec.
* gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
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* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs.
* ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs.
bfd/
* reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New.
* section.c (struct bfd_section): Add has_tls_get_addr_call.
(BFD_FAKE_SECTION): Init new flag.
* ecoff.c (bfd_debug_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD.
(ppc_elf_reloc_type_lookup): Handle new relocs.
(ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls.
(ppc_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such
without marker relocs.
(ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
if section has no old-style calls. Set toc_ref for new relocs as
appropriate.
(ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too.
Don't try to optimize new-style __tls_get_addr call when handling
arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
relocs.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs
have non-zero addend.
(md_assemble): Parse args of __tls_get_addr calls.
(md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD.
ld/testsuite/
* ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test.
* ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test.
* ld-powerpc/powerpc.exp: Run them.
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* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
gas/testsuite/
* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
* gas/ppc/e500mc.s: Likewise.
* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
* gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
* gas/ppc/power7.s: Likewise.
* gas/ppc/vsx.d: New test.
* gas/ppc/vsx.s: Likewise.
* gas/ppc/ppc.exp: Run it.
include/opcode/
* ppc.h (PPC_OPCODE_POWER7): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
the power7 and the isel instructions.
* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
(insert_dm, extract_dm): Likewise.
(XB6): Update comment to include XX2 form.
(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
(RemoveXX3DM): Delete.
(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
"mftgpr">: Deprecate for POWER7.
<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
"frsqrte.">: Deprecate the three operand form and enable the two
operand form for POWER7 and later.
<"wait">: Extend to accept optional parameter. Enable for POWER7.
<"waitsrv", "waitimpl">: Add extended opcodes.
<"ldbrx", "stdbrx">: Enable for POWER7.
<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
"xxspltw", "xxswapd">: Add VSX opcodes.
|
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* common.h (STB_LOPROC): Replace Application-specific with
Processor-specific in comments.
(STB_HIPROC): Likewise.
(STT_LOPROC): Likewise.
(STT_HIPROC): Likewise.
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2009-02-03 Sandip Matte <sandip@rmicorp.com>
* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
* archures.c (bfd_mach_mips_xlr): Define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_xlr): Define.
(arch_info_struct): Add XLR entry.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
(mips_set_isa_flags): Handle bfd_mach_mips_xlr
(mips_mach_extensions): Add XLR entry.
binutils:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
gas:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
M_MSGWAIT and M_MSGWAIT_T.
(mips_cpu_info_table): Add XLR entry.
* doc/c-mips.texi (-march): Document xlr.
gas/testsuite:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* gas/mips/mips.exp (xlr): New architecture.
(xlr-ext): Run test.
* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
include/elf:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (E_MIPS_MACH_XLR): Define.
include/opcode:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
opcodes:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
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|
ld/testsuite/
* ld-m68k/got-multigot-12-13-14-34-35-ok.d: Update.
* ld-m68k/got-multigot-14-ok.d: Update.
* ld-m68k/m68k-got.exp: Update.
* ld-m68k/got-negative-12-13-14-34-ok.d: Update.
* ld-m68k/got-negative-14-ok.d: Update.
* ld-m68k/tls-gd-1.d, ld-m68k/tls-gd-2.d: New tests.
* ld-m68k/tls-gd-ie-1.d, ld-m68k/tls-ie-1.d: New tests.
* ld-m68k/tls-ld-1.d, ld-m68k/tls-ld-2.d: New tests.
* ld-m68k/tls-ld-1.s, ld-m68k/tls-ld-2.s, ld-m68k/tls-le-1.s:
New test sources.
* ld-m68k/tls-no-1.s, ld-m68k/tls-gd-ie-1.s, ld-m68k/tls-gd-1.s:
New test sources.
* ld-m68k/tls-gd-2.s, ld-m68k/tls-ie-1.s: New test sources.
* ld-m68k/m68k.exp: Run new tests.
(merge isa-a isa-a:nodiv): Fix.
gas/testsuite/
* gas/m68k/tls-gd-3.d, gas/m68k/tls-gd-3.s: New test.
* gas/m68k/all.exp: Run it.
gas/
* config/m68k-parse.h (enum pic_relocation): Add values for TLS
relocations.
* config/m68k-parse.y (yylex): Parse TLS relocations.
* config/tc-m68k.c (m68k_elf_cons): New static function.
(md_pseudo_table): Use it.
(get_reloc_code, tc_m68k_fix_adjustable, tc_gen_reloc): Handle TLS
relocations.
(md_apply_fix): Fix to set thread local flag.
(m68k_elf_suffix): New static function; helper for m68k_elf_cons.
include/elf/
* m68k.h: Map TLS relocations to numbers.
bfd/
* bfd-in2.h: Regenerate.
* elf32-m68k.c: Handle 2-slot GOT entries. Rename variables and
fields from n_entries to n_slots where appropriate, update comments.
(HOWTO): Add TLS relocations.
(reloc_map): Map BFD_RELOC_68K_TLS_* to R_68K_TLS_*.
(enum elf_m68k_got_offset_size): New enum.
(struct elf_m68k_got_entry.type): Move field to ...
(struct elf_m68k_got_entry_key): ... here. Update all uses.
(elf_m68k_reloc_got_type, elf_m68k_reloc_got_offset_size): New static
functions.
(elf_m68k_reloc_got_n_entries, elf_m68k_reloc_tls_p): New static
functions.
(struct elf_m68k_got): merge rel_8o_n_entries and rel_8o_16o_n_entries
fields into n_entries array. Update comments.
(elf_m68k_init_got): Simplify, update all uses.
(elf_m68k_init_got_entry_key): Handle R_68K_TLS_LDM32 reloc, update.
(ELF_M68K_REL_8O_MAX_N_ENTRIES_IN_GOT): Adjust to handle 2-slot
GOT entries; update name, update all uses.
(ELF_M68K_REL_8O_16O_MAX_N_ENTRIES_IN_GOT): Ditto.
(elf_m68k_get_got_entry): Update.
(elf_m68k_update_got_entry_type): Rewrite to handle TLS GOT entries,
simplify.
(elf_m68k_remove_got_entry_type): Simplify.
(elf_m68k_add_entry_to_got, elf_m68k_can_merge_gots_1): Update.
(elf_m68k_can_merge_gots): Update.
(elf_m68k_merge_gots_1, elf_m68k_merge_gots): Update.
(struct elf_m68k_finalize_got_offsets_arg): Rewrite to handle 2-slot
GOT entries, simplify.
(elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets): Same.
(struct elf_m68k_partition_multi_got_arg): Add slots_relas_diff
field, remove obsoleted local_n_entries field.
(elf_m68k_partition_multi_got_2): New static function.
(elf_m68k_partition_multi_got_1, elf_m68k_partition_multi_got): Use it;
update.
(elf_m68k_remove_got_entry_type): Update.
(elf_m68k_install_rela, dtpoff_base, tpoff): New static functions.
(elf_m68k_check_relocs): Handle TLS relocations. Remove unnecessary
update of sgot->size and srelgot->size.
(elf_m68k_gc_sweep_hook): Update.
(elf_m68k_install_rela, dtpoff_base, tpoff): New static functions.
(elf_m68k_relocate_section, elf_m68k_finish_dynamic_symbol): Handle
TLS relocations.
* reloc.c (BFD_RELOC_68K_TLS_*): Declare TLS relocations.
* libbfd.h (bfd_reloc_code_real_names): Add BFD_RELOC_68K_TLS_*.
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(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
(EDI_REG_NUM): New macros.
(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
(SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
(REG_PREFIX_P): New macro.
* amd64-tdep.h (amd64_displaced_step_copy_insn): Declare.
(amd64_displaced_step_fixup): Declare.
* amd64-tdep.c: #include opcode/i386.h, dis-asm.h.
(amd64_arch_regmap): Move out of amd64_analyze_stack_align
and make static global.
(amd64_arch_regmap_len): New static global.
(amd64_arch_reg_to_regnum): New function.
(struct amd64_insn): New struct.
(struct displaced_step_closure): New struct.
(onebyte_has_modrm,twobyte_has_modrm): New static globals.
(rex_prefix_p,skip_prefixes)
(amd64_insn_length_fprintf,amd64_insn_length_init_dis)
(amd64_insn_length,amd64_get_unused_input_int_reg)
(amd64_get_insn_details,fixup_riprel,fixup_displaced_copy)
(amd64_displaced_step_copy_insn)
(amd64_absolute_jmp_p,amd64_absolute_call_p,amd64_ret_p)
(amd64_call_p,amd64_breakpoint_p,amd64_syscall_p)
(amd64_displaced_step_fixup): New functions.
* amd64-linux-tdep.c: #include arch-utils.h.
(amd64_linux_init_abi): Install displaced stepping support.
* gdb.arch/amd64-disp-step.S: New file.
* gdb.arch/amd64-disp-step.exp: New file.
* gdb.arch/i386-disp-step.S: New file.
* gdb.arch/i386-disp-step.exp: New file.
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Julian Brown <julian@codesourcery.com>
bfd/
* elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 71 to include all known
ARM attributes in ABI 2.07.
* elf32-arm.c (get_secondary_compatible_arch): New function.
(set_secondary_compatible_arch): New function.
(tag_cpu_arch_combine): New function.
(elf32_arm_copy_one_eabi_other_attribute): Delete function.
(elf32_arm_copy_eabi_other_attribute_list): Delete function.
(elf32_arm_merge_eabi_attributes): Rename order_312 to order_021 to
make it fit with order_01243.
Add support for Tag_also_compatible_with,
Tag_CPU_unaligned_access, Tag_T2EE_use, Tag_Virtualization_use,
Tag_MPextension_use, Tag_nodefaults and Tag_conformance.
Improve/tidy up support for Tag_CPU_raw_name, Tag_CPU_name,
Tag_CPU_arch, Tag_ABI_HardFP_use, Tag_VFP_HP_extension,
Tag_ABI_FP_denormal, Tag_ABI_PCS_GOT_use, Tag_ABI_align8_needed,
Tag_VFP_arch and Tag_ABI_FP_16bit_format.
Rework the way unknown attributes are handled.
Defer errors until all attributes have been processed.
gas/
* config/tc-arm.c (cpu_arch): Change ARM_ARCH_V6M to 11.
include/elf/
* arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
(MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
(Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
version 2.07.
(Tag_undefined39, Tag_nodefaults): New enum values.
(Tag_also_compatible_with, Tag_T2EE_use): Likewise.
(Tag_conformance, Tag_Virtualization_use): Likewise.
(Tag_undefined69, Tag_MPextension_use): Likewise.
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EF_IA_64_ARCHVER_1): New macros. Minor reformatting.
* bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
(BFD32_BACKENDS_CFILES): Add new file vmsutil.c
(vmsutil.lo): Add dependency rule
* bfd/Makefile.in: Regenerate
* bfd/config.bfd (ia64*-*-*vms*): Add case.
* bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
* bfd/configure: Regenerate
* bfd/vmsutil.[ch]: New files
* bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
attr to bfd_vma.
* bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
elfNN_vms_section_processing, elfNN_vms_final_write_processing,
elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
elfNN_vms_object_p): New functions
* bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.
* gas/configure.tgt(ia64-*-*vms*): New target.
* gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
* gas/tc.h (md_number_to_chars): Declare iff undefined.
* gas/config/obj-elf.c (obj_elf_change_section): Change type of
arg attr to bfd_vma.
(obj_elf_parse_section_letters): Return a bfd_vma. Change type of
variables attr, md_attr to bfd_vma.
(obj_elf_section_word): Likewise.
(obj_elf_section): Change type of variable attr to bfd_vma
* gas/config/obj-elf.h (obj_elf_change_section): Change type of
arg attr to bfd_vma
* gas/config/tc-ia64.c (bfdver.h,time.h): Include.
(ia64_elf_section_letter): Now returns a bfd_vma.
Handle VMS specific attributes.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(ia64_init): Don't turn on dependency checking for VMS.
(ia64_target_format): Check for VMS flag bit.
(do_alias): Hande decc$ functions.
(get_vms_time): New function.
(ia64_vms_note): New function.
* gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
(ia64_elf_section_flags): Arg attr now a bfd_vma.
(tc_init_after_args): Define for VMS.
* gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
(alpha_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-alpha.h: Likewise.
* gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
(x86_64_section_word): Return a bfd_vma.
* gas/config/tc-i386.h: Likewise.
* gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
attr to bfd_vma.
* gas/config/tc-ip2k.h: Likewise.
* gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
(mep_elf_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-mep.h: Likewise.
* gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma.
(ppc_section_word): Return a bfd_vma.
(ppc_section_flags): Change type of arg attr to bfd_vma.
* gas/config/tc-ppc.h: Likewise.
* gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
New file with new macros
* gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
macros.
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(ld_plugin_get_input_file): New typedef.
(ld_plugin_release_input_file): New typedef.
(LDPT_GET_INPUT_FILE, LDPT_RELEASE_INPUT_FILE): New constants.
(struct ld_plugin_tv): Add two new fields.
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in the previous copyright update.
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* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test.
Test the new "deprecated" opcode field.
include/opcode/
* ppc.h (struct powerpc_opcode): New field "deprecated".
(PPC_OPCODE_NOPOWER4): Delete.
opcodes/
* ppc-opc.c (PPCNONE): Define.
(NOPOWER4): Delete.
(powerpc_opcodes): Initialize the new "deprecated" field.
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pointing to a noreturn function.
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section.s_page.
* ti.h (COFF_ADJUST_SCNHDR_OUT_PRE): Define.
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* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
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* plugin.cc (ld_plugin_message): Change format parameter to const.
Fix mismatch between new[] and delete.
include/ChangeLog:
* plugin-api.h (ld_plugin_message): Change format parameter to const.
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bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
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R_CR16_GLOB_DAT): New relocations.
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PR 7047
* bfdlink.h (struct bfd_elf_version_expr): Delete "symbol".
Add "literal".
bfd/
PR 7047
* configure.in: Bump version.
* configure: Regenerate.
* elflink.c (_bfd_elf_link_assign_sym_version): Continue matching
against version nodes when a global match is a wildcard. Similarly
continue matching on local wildcard matches, rather than only
continuing for "*". Have any global wildcard match override a
local wildcard match. Correct logic hiding unversioned symbol.
(bfd_elf_size_dynamic_sections): Update for changes to struct
bfd_elf_version_expr.
ld/
PR 7047
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_new_vers_pattern): Update
for changes to struct bfd_elf_version_expr.
* ldlang.c (lang_vers_match, version_expr_head_hash): Likewise.
(version_expr_head_eq, lang_finalize_version_expr_head): Likewise.
(lang_register_vers_node): Likewise.
(lang_new_vers_pattern): Likewise. Ensure "literal" is set when
no glob chars found in "pattern".
(realsymbol): Correct backslash quote logic.
* ld.texinfo (VERSION): Warn about global wildcards.
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(R_CRIS_DTPMOD): Open up for use elsewhere than the fourth GOT entry.
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* xtensa-isa.c (xtensa_state_is_shared_or): New function.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
* xtensa-isa.h (xtensa_state_is_shared_or): New prototype.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
xtensa_state_is_shared_or to allow multiple opcodes within a
single FLIX bundle to write to these special states.
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* xtensa-config.h (XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_DIV32)
(XCHAL_HAVE_MINMAX, XCHAL_HAVE_SEXT, XCHAL_HAVE_THREADPTR)
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): Change to 1.
(XCHAL_NUM_AREGS): Change to 32.
(XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE): Change to 16K.
(XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE): Change to 32.
(XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH): Change to 5.
(XCHAL_DCACHE_IS_WRITEBACK): Change to 1.
(XCHAL_DEBUGLEVEL): Change to 6.
bfd/
* xtensa-modules.c (sysregs): Add MMID, VECBASE, EPC5, EPC6, EPC7,
EXCSAVE5, EXCSAVE6, EXCSAVE7, EPS5, EPS6, EPS7, CPENABLE,
SCOMPARE1, and THREADPTR registers.
(NUM_SYSREGS, MAX_USER_REG): Update.
(states): Change width of INTERRUPT, WindowBase, WindowStart, and
INTENABLE. Add VECBASE, EPC5, EPC6, EPC7, EXCSAVE5, EXCSAVE6,
EXCSAVE7, EPS6, EPS6, EPS7, THREADPTR, CPENABLE, and SCOMPARE1 states.
(NUM_STATES): Update.
(enum xtensa_state_id): Add entries for new states.
(enum xtensa_field_id): Add entries for xt_wbr15_imm and xt_wbr18_imm
fields, along with functions to extract and set them.
(regfiles): Change number of AR registers to 32.
(Operand_ar0_encode, Operand_ar4_encode, Operand_ar8_encode,
Operand_ar12_encode, Operand_ars_entry_encode): Update register mask.
(operands): Add entries for tp7, xt_wbr15_label, xt_wbr18_label,
xt_wbr15_imm, and xt_wbr18_imm operands, along with functions to
encode and decode them.
(enum xtensa_operand_id): Add entries for new operands.
(Iclass_xt_iclass_rfi_stateArgs): Add EPC5, EPC6, EPC7, EPS5, EPS6, and
EPC7 states.
(Iclass_xt_iclass_rfdo_stateArgs): Replace EPC4 and EPS4 by EPC6 and
EPS6, respectively.
(iclasses): Add entries for rur_threadptr, wur_threadptr,
xt_iclass_wsr_176, xt_iclass_rsr_epc5, xt_iclass_wsr_epc5,
xt_iclass_xsr_epc5, xt_iclass_rsr_excsave5, xt_iclass_wsr_excsave5,
xt_iclass_xsr_excsave5, xt_iclass_rsr_epc6, xt_iclass_wsr_epc6,
xt_iclass_xsr_epc6, xt_iclass_rsr_excsave6, xt_iclass_wsr_excsave6,
xt_iclass_xsr_excsave6, xt_iclass_rsr_epc7, xt_iclass_wsr_epc7,
xt_iclass_xsr_epc7, xt_iclass_rsr_excsave7, xt_iclass_wsr_excsave7,
xt_iclass_xsr_excsave7, xt_iclass_rsr_eps5, xt_iclass_wsr_eps5,
xt_iclass_xsr_eps5, xt_iclass_rsr_eps6, xt_iclass_wsr_eps6,
xt_iclass_xsr_eps6, xt_iclass_rsr_eps7, xt_iclass_wsr_eps7,
xt_iclass_xsr_eps7, xt_iclass_rsr_vecbase, xt_iclass_wsr_vecbase,
xt_iclass_xsr_vecbase, xt_iclass_mul16, xt_iclass_wsr_mmid,
xt_iclass_icache_lock, xt_iclass_dcache_lock, xt_iclass_rsr_cpenable,
xt_iclass_wsr_cpenable, xt_iclass_xsr_cpenable, xt_iclass_clamp,
xt_iclass_minmax, xt_iclass_sx, xt_iclass_l32ai, xt_iclass_s32ri,
xt_iclass_s32c1i, xt_iclass_rsr_scompare1, xt_iclass_wsr_scompare1,
xt_iclass_xsr_scompare1, xt_iclass_div, and xt_iclass_mul32, along
with corresponding argument and state argument arrays. Change
number of state arguments for xt_iclass_rfi. Add arguments for
xt_iclass_rfdo.
(enum xtensa_iclass_id): Add entries for new iclasses.
(opcodes): Add entries for RUR_THREADPTR, WUR_THREADPTR, WSR_176,
RSR_EPC5, WSR_EPC5, XSR_EPC5, RSR_EXCSAVE5, WSR_EXCSAVE5, XSR_EXCSAVE5,
RSR_EPC6, WSR_EPC6, XSR_EPC6, RSR_EXCSAVE6, WSR_EXCSAVE6, XSR_EXCSAVE6,
RSR_EPC7, WSR_EPC7, XSR_EPC7, RSR_EXCSAVE7, WSR_EXCSAVE7, XSR_EXCSAVE7,
RSR_EPS5, WSR_EPS5, XSR_EPS5, RSR_EPS6, WSR_EPS6, XSR_EPS6, RSR_EPS7,
WSR_EPS7, XSR_EPS7, RSR_VECBASE, WSR_VECBASE, XSR_VECBASE, MUL16U,
MUL16S, WSR_MMID, IPFL, IHU, IIU, DPFL, DHU, DIU, RSR_CPENABLE,
WSR_CPENABLE, XSR_CPENABLE, CLAMPS, MIN, MAX, MINU, MAXU, SEXT, L32AI,
S32RI, S32C1I, RSR_SCOMPARE1, WSR_SCOMPARE1, XSR_SCOMPARE1, QUOU, QUOS,
REMU, REMS, and MULL opcodes, along with the corresponding functions
to encode them.
(enum xtensa_opcode_id): Add entries for new opcodes.
(Slot_inst_decode): Handle new opcodes.
(Slot_inst_get_field_fns, Slot_inst_set_field_fns): Add entries for
xt_wbr15_imm and xt_wbr18_imm fields.
(Slot_inst16a_get_field_fns, Slot_inst16a_set_field_fns): Likewise.
(Slot_inst16b_get_field_fns, Slot_inst16b_set_field_fns): Likewise.
(xtensa_modules): Update number of fields, operands, iclasses and
opcodes.
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* elf.c (assign_file_positions_for_load_sections): Use header_size
to avoid moving the load address of file headers.
(assign_file_positions_for_load_sections): Set header_size for
segments containing the file header.
include/elf/
* internal.h (struct elf_segment_map): Add header_size field.
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2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Handle bfd_default_target_size, BFD_HOST_LONG_LONG,
BFD_HOST_64BIT_LONG_LONG, BFD_HOSTPTR_T, bfd_file_ptr.
Generate bfdver.h.
* vms-hdr.c (_bfd_vms_write_hdr): Use strdup/free instead of alloca.
* hosts/alphavms.h: Defines macros to bypass i18n.
* makefile.vms (OBJS): Update file list.
(DEFS): Remove VMS_DEBUG, const, add DEBUGDIR.
(CFLAGS): Update flags.
* bfdio.c (real_fopen): Add code specific to VMS: extract attributes
from modes.
binutils/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Get version from configure.in of bfd.
* makefile.vms-in (DEBUG_OBJS): Add dwarf.obj.
(CFLAGS): Update flags.
include/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* fopen-vms.h (FOPEN_RB): Use a single string to match the
standard prototype.
(FOPEN_WB): Ditto.
(FOPEN_AB): Ditto.
(FOPEN_RUB): Ditto.
(FOPEN_WUB): Ditto.
(FOPEN_AUB): Ditto.
libiberty/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update objects list.
(CFLAGS): Update.
(libiberty.olb): Remove alloca-conf.h dependency.
* config.h-vms: Use new macro sets, use builtin alloca.
opcodes/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update list of objects.
(DEFS): Update
(CFLAGS): Update.
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* auxv.c (fprint_target_auxv): Handle AT_BASE_PLATFORM and
AT_EXECFN. Re-sort AT_SECURE.
include/elf/ChangeLog:
* common.h (AT_BASE_PLATFORM, AT_EXECFN): Define.
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