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2003-05-242003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-3/+32
gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
2003-05-21Fix typo "ink" instead of "link"Nick Clifton2-1/+5
2003-05-212003-05-20 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-3/+8
opcode/i860.h (flush): Set lower 3 bits properly and use 'L' for the immediate operand type instead of 'i'.
2003-05-212003-05-20 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-10/+17
opcode/i860.h (fzchks): Both S and R bits must be set. (pfzchks): Likewise. (faddp): Likewise. (pfaddp): Likewise. (fix.ss): Remove (invalid instruction). (pfix.ss): Likewise. (ftrunc.ss): Likewise. (pftrunc.ss): Likewise.
2003-05-21.Roland McGrath1-2/+8
2003-05-212003-05-15 Roland McGrath <roland@redhat.com>Roland McGrath3-2/+56
* common.h (NT_AUXV, AT_*): New macros. * external.h (Elf32_External_Auxv, Elf64_External_Auxv): New types. * internal.h (Elf_Internal_Auxv): New type.
2003-05-182003-05-18 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-2/+6
gas: * config/tc-i860.c (i860_process_insn): Initialize fc after each opcode mismatch. include/opcode: * i860.h (form, pform): Add missing .dd suffix. opcodes: * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit, print it. bfd: * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-162003-05-14 Michael Snyder <msnyder@redhat.com>Michael Snyder2-0/+5
From Bernd Schmidt <bernds@redhat.com> * h8.h (E_H8_MACH_H8300SX): New.
2003-05-15libiberty/ChangeLog:Jim Blandy2-2/+9
2003-05-14 Jim Blandy <jimb@redhat.com> * hex.c (_hex_value): Make this unsigned. (hex_value): Update documentation for new return type. hex_value now expands to an unsigned int expression, to avoid unexpected sign extension when we store it in a bfd_vma, which is larger than int on some platforms. * functions.texi: Regenerated. include/ChangeLog: 2003-05-14 Jim Blandy <jimb@redhat.com> * libiberty.h (hex_value): Make the value an unsigned int, to avoid unexpected sign-extension when cast to unsigned types larger than int --- like bfd_vma, on some platforms. (_hex_value): Update declaration.
2003-05-13 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000Stephane Carrez2-1/+5
2003-05-09 * xtensa-isa-internal.h (xtensa_isa_module_struct): Remove const onAlan Modra2-1/+6
gen_num_opcodes_fn return type.
2003-05-07s/burtle/iterativeJason Merrill2-4/+4
2003-05-07Index: gdb/ChangeLogAndrew Cagney2-4/+13
2003-05-07 Andrew Cagney <cagney@redhat.com> * d10v-tdep.c (remote_d10v_translate_xfer_address): Add "regcache". (d10v_print_registers_info): Update. (d10v_dmap_register, d10v_imap_register): Delete functions. (struct gdbarch_tdep): Add "regcache" parameter to "dmap_register" and "imap_register". (d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache". (d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache". * arch-utils.c (generic_remote_translate_xfer_address): Add "regcache" and "gdbarch" parameters. * gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache" parameter. Change class to multi-arch. * gdbarch.h, gdbarch.c: Re-generate. * remote.c (remote_xfer_memory): Use gdbarch_remote_translate_xfer_address. Index: include/gdb/ChangeLog 2003-05-07 Andrew Cagney <cagney@redhat.com> * sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter. (sim_d10v_translate_imap_addr): Add regcache parameter. (sim_d10v_translate_dmap_addr): Ditto. Index: sim/d10v/ChangeLog 2003-05-07 Andrew Cagney <cagney@redhat.com> * interp.c (sim_d10v_translate_addr): Add "regcache" parameter. (sim_d10v_translate_imap_addr): Ditto. (sim_d10v_translate_dmap_addr): Ditto. (xfer_mem): Pass NULL regcache to sim_d10v_translate_addr. (dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr. (dmap_register, imap_register): Add "regcache" parameter. (imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr. (sim_fetch_register): Pass NULL regcache to imap_register and dmap_register.
2003-05-07libiberty/Jason Merrill2-0/+10
* hashtab.c (burtle_hash): New fn. * configure.in: Add AC_C_BIGENDIAN_CROSS. * aclocal.m4: Include accross.m4. * configure, config.in: Regenerate. include/ * hashtab.h (burtle_hash): Prototype. (burtle_hash_object): New macro.
2003-04-29bfd/H.J. Lu2-0/+7
2003-04-28 H.J. Lu <hjl@gnu.org> * elfxx-ia64.c (elfNN_ia64_relax_section): Relax ldxmov during the relax finalize pass. * section.c (struct sec): Add need_finalize_relax and remove flag11. (STD_SECTION): Update struct sec initializer. * bfd-in2.h: Regenerated. include/ 2003-04-28 H.J. Lu <hjl@gnu.org> * bfdlink.h (bfd_link_info): Add relax_finalizing. ld/ 2003-04-28 H.J. Lu <hjl@gnu.org> * ldlang.c (lang_process): Add the relax finalize pass. * ldmain.c (main): Initialize link_info.relax_finalizing to FALSE.
2003-04-24Add support for h8300hn and h8300snNick Clifton4-5/+20
2003-04-24include/H.J. Lu2-0/+9
* bfdlink.h (bfd_link_callbacks): Add error_handler. ld/ * ldmain.c (link_callbacks): Initialize error_handler. * ldmisc.c (error_handler): New function. * ldmisc.h (error_handler): New prototype.
2003-04-23bfd:Joern Rennecke2-1/+5
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH. * cpu-sh.c: Likewise. * elf32-sh.c: Likewise. * reloc.c (bfd_reloc_code_real): Likewise. * elf32-sh64-com.c: Change comment to refer to SuperH. * elf32-sh64.c: Likewise. * elf64-sh64.c: Likewise. * bfd-in2.h (enum bfd_architecture): Regenerate. binutils: * readelf.c (get_machine_name) <EM_SH>: Amend return value to refer to SuperH. gas: * config/tc-sh.c: Amend comment to refer to SuperH. * config/tc-sh.h: Likewise. (LISTING_HEADER): Amend to refer to SuperH. * config/tc-sh64.c: Change comment to refer to SuperH. * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH. * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH. * doc/c-sh.texi: Amend to refer to SuperH. Add SuperH architecture documentation references. * doc/c-sh64.texi: Change to refer to SuperH. include/elf: * common.h (EM_SH): Amend comment to refer to SuperH. ld/testsuite: * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH. * ld-sh/sh64/crange3-media.rd (Machine): Likewise.
2003-04-22Replace references to Mitsubishi M32R with references to Renesas M32R.Nick Clifton2-1/+6
2003-04-15Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton6-25/+35
2003-04-132003-04-07 Michael Snyder <msnyder@redhat.com>Michael Snyder2-4/+8
* h8300.h (ldc/stc): Fix up src/dst swaps.
2003-04-09 * mips.h: Correct comment typo.Alan Modra2-1/+5
2003-04-04Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal3-32/+39
s/c3x/tic3x/. 2003 copyright update
2003-04-02 * xtensa-config.h: Remove comment indicating that this is aBob Wilson2-17/+16
generated file.
2003-04-01Add Xtensa portNick Clifton8-0/+518
2003-04-01Fixes for iWMMXt contribution.Nick Clifton2-1/+5
2003-03-27Add iWMMXt support to ARM simulatorNick Clifton2-1/+37
2003-03-25Add iWMMXt supportNick Clifton4-1/+20
2003-03-21 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.Martin Schwidefsky2-4/+20
(S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH. (s390_opcode): Remove architecture. Add modes and min_cpu.
2003-03-20Add Cirrus Maverick support to arm simulatorNick Clifton2-2/+24
2003-03-17merge from gccDJ Delorie2-1/+37
2003-03-17merge from gccDJ Delorie2-0/+5
2003-03-17(O_SYS_CMDLINE): New pseudo opcode for command line processing.Nick Clifton2-0/+7
2003-03-06Remove redundant defintions of BYTES_IN_WORD and add conditional defintion inNick Clifton2-128/+135
aout64.h.
2003-03-03Fix sh-elf linker relaxation:Joern Rennecke2-1/+7
gcc: * config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and subtarget_asm_isa_spec. (SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define. (ASM_SPEC): Define as SH_ASM_SPEC. (SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h. Use subtarget_asm_relax_spec and subtarget_asm_isa_spec. * config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC. (SUBTARGET_ASM_ISA_SPEC): Undef / define. gcc/testsuite: gcc.dg/sh-relax.c: New test. include/elf: * sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E, and SH2E & SH4 merge to SH4, not SH2E. gas: * config/tc-sh.c (sh_dsp): Replace with preset_target_arch. (md_begin): Use preset_target_arch. (md_longopts): Make isa option unconditional. (md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any set preset_target_arch. (md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups by -S_GET_VALUE (fixP->fx_subsy). (tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy, and the addend is 0. Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. bfd: elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary relocation (no special function), and make it non-partial_inplace. (sh_elf_relax_section): When creating a bsr, use a consistent value no matter if the symbol is extern or not; set addend to -4. Don't swap load / non-load instructions for SH4. (sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset rather than if the symbol is external to determine if adjusting the offset makes sense. Adjust the addend too if appropriate. (sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the relocation.
2003-02-272003-02-27 Andrew Cagney <cagney@redhat.com>Andrew Cagney2-4/+9
* remote-sim.h (sim_open, sim_load, sim_create_inferior): Rename _bfd to bfd.
2003-02-27merge from gccDJ Delorie2-1/+5
2003-02-21Add SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG and SHT_IA_64_PRIORITY_INIT.Nick Clifton2-31/+38
Add code to display these values in readelf.
2003-02-21(ldmac, stmac): Replace MACREG with MS32 and MD32.Nick Clifton2-44/+50
2003-02-21merge from gccDJ Delorie2-0/+8
2003-02-20 * libiberty.h (lrealpath): Add declaration.Daniel Jacobowitz2-0/+8
2003-02-20Index: include/gdb/ChangeLogAndrew Cagney2-17/+10
2003-02-20 Andrew Cagney <ac131313@redhat.com> * remote-sim.c (gdbsim_insert_breakpoint) (gdbsim_remove_breakpoint): Delete #ifdef SIM_HAS_BREAKPOINTS code. Index: include/gdb/ChangeLog 2003-02-20 Andrew Cagney <ac131313@redhat.com> * remote-sim.h (SIM_RC): Delete unused SIM_RC_UNKNOWN_BREAKPOINT, SIM_RC_INSUFFICIENT_RESOURCES and SIM_RC_DUPLICATE_BREAKPOINT. (sim_set_breakpoint, sim_clear_breakpoint): Delete declarations. (sim_clear_all_breakpoints, sim_enable_breakpoint): Ditto. (sim_enable_all_breakpoints, sim_disable_breakpoint): Ditto. (sim_disable_all_breakpoints): Ditto. Index: sim/common/ChangeLog 2003-02-20 Andrew Cagney <ac131313@redhat.com> * Make-common.in (SIM_NEW_COMMON_OBJS): Remove sim-break.o (sim-break_h): Delete macro. (sim-break.o): Delete rule. * sim-break.c: Delete file. * sim-break.h: Delete file. * sim-base.h [SIM_HAVE_BREAKPOINTS]: Don't include "sim-break.h". (STATE_BREAKPOINTS): Delete macro. (sim_state_base): Delete field breakpoints. * sim-module.c (modules) [SIM_HAVE_BREAKPOINTS]: Don't add sim_break_install to array.
2003-02-18 * ppc64.h (IS_PPC64_TLS_RELOC): Rename from IS_TLS_RELOC.Alan Modra2-1/+3
2003-02-18 * ppc.h: Replace DTPMOD64, TPREL64, DTPREL64 with DTPMOD32 etc.Alan Modra2-3/+10
(IS_PPC_TLS_RELOC): Define.
2003-02-10Add support for marking ARM ELF binaries as support the Cirrus EP9312 MaverickNick Clifton2-0/+5
floating point co-processor.
2003-02-04 * ppc.h: Add TLS relocs. Format.Alan Modra3-125/+205
* ppc64.h: Likewise.
2003-01-31 * hppa.h (ldwa, ldda): Add ordered opcodes.Dave Anglin2-0/+6
2003-01-28* mips.h (EF_MIPS_XGOT): Define.Alexandre Oliva2-0/+7
2003-01-26include/Daniel Jacobowitz2-2/+30
* hashtab.h (htab_alloc_with_arg, htab_free_with_arg): Add new types. (struct htab): Add alloc_arg, alloc_with_arg_f, free_with_arg_f. (htab_create_alloc_ex): New prototype. (htab_set_functions_ex): New prototype. libiberty/ * hashtab.c (htab_create_alloc_ex): New function. (hatab_set_functions_ex): New function. (htab_delete, htab_expand): Support alternate allocation functions.
2003-01-24bfd/Jakub Jelinek2-4/+31
* elf32-sparc.c (_bfd_sparc_elf_howto_table): Add TLS relocs. (elf32_sparc_rev32_howto): New variable. (sparc_reloc_map): Add TLS relocs. (elf32_sparc_reloc_type_lookup, elf32_sparc_info_to_howto): Handle REV32. (sparc_elf_hix22_reloc, sparc_elf_lox10_reloc, elf32_sparc_mkobject): New functions. (struct elf32_sparc_dyn_relocs, struct elf32_sparc_link_hash_entry, struct elf32_sparc_link_hash_table): New structures. (elf32_sparc_tdata, elf32_sparc_local_got_tls_type, elf32_sparc_hash_table): Define. (link_hash_newfunc, elf32_sparc_link_hash_table_create, create_got_section, elf32_sparc_create_dynamic_sections, elf32_sparc_copy_indirect_symbol, elf32_sparc_tls_transition): New functions. (elf32_sparc_check_relocs): Handle TLS relocs. Add dynamic reloc reference counting. (elf32_sparc_gc_sweep_hook): Likewise. (elf32_sparc_adjust_dynamic_symbol): Likewise. (elf32_sparc_size_dynamic_sections): Likewise. (elf32_sparc_relocate_section): Likewise. (allocate_dynrelocs, readonly_dynrelocs, dtpoff_base, tpoff): New functions. (elf32_sparc_object_p): Allocate backend private object data. (bfd_elf32_bfd_link_hash_table_create, elf_backend_copy_indirect_symbol, bfd_elf32_mkobject, elf_backend_can_refcount): Define. (elf_backend_create_dynamic_sections): Define to elf32_sparc_create_dynamic_sections. * reloc.c: Add SPARC TLS relocs. * bfd-in2.h, libbfd.h: Rebuilt. * elf64-sparc.c (sparc64_elf_howto_table): Add TLS relocs. (sparc_reloc_map): Likewise. gas/ * config/tc-sparc.c (sparc_ip): Handle TLS % operators. (tc_gen_reloc): Handle TLS relocs. (sparc_cons, cons_fix_new_sparc): Handle %r_tls_dtpoff. * config/tc-sparc.h (tc_fix_adjustable): Don't adjust TLS relocs. * config/obj-elf.c (obj_elf_section_word): Handle tls. (obj_elf_type): Handle tls_object. include/ * elf/sparc.h: Add TLS relocs. Move R_SPARC_REV32 to 252. ld/testsuite/ * ld-sparc/sparc.exp: New. * ld-sparc/tlsg32.s: New test. * ld-sparc/tlsg32.sd: Likewise. * ld-sparc/tlsg64.s: Likewise. * ld-sparc/tlsg64.sd: Likewise. * ld-sparc/tlslib.s: Likewise. * ld-sparc/tlsnopic.s: Likewise. * ld-sparc/tlspic.s: Likewise. * ld-sparc/tlssunbin32.dd: Likewise. * ld-sparc/tlssunbin32.rd: Likewise. * ld-sparc/tlssunbin32.s: Likewise. * ld-sparc/tlssunbin32.sd: Likewise. * ld-sparc/tlssunbin32.td: Likewise. * ld-sparc/tlssunbin64.dd: Likewise. * ld-sparc/tlssunbin64.rd: Likewise. * ld-sparc/tlssunbin64.s: Likewise. * ld-sparc/tlssunbin64.sd: Likewise. * ld-sparc/tlssunbin64.td: Likewise. * ld-sparc/tlssunbinpic32.s: Likewise. * ld-sparc/tlssunbinpic64.s: Likewise. * ld-sparc/tlssunnopic32.dd: Likewise. * ld-sparc/tlssunnopic32.rd: Likewise. * ld-sparc/tlssunnopic32.s: Likewise. * ld-sparc/tlssunnopic32.sd: Likewise. * ld-sparc/tlssunnopic64.dd: Likewise. * ld-sparc/tlssunnopic64.rd: Likewise. * ld-sparc/tlssunnopic64.s: Likewise. * ld-sparc/tlssunnopic64.sd: Likewise. * ld-sparc/tlssunpic32.dd: Likewise. * ld-sparc/tlssunpic32.rd: Likewise. * ld-sparc/tlssunpic32.s: Likewise. * ld-sparc/tlssunpic32.sd: Likewise. * ld-sparc/tlssunpic32.td: Likewise. * ld-sparc/tlssunpic64.dd: Likewise. * ld-sparc/tlssunpic64.rd: Likewise. * ld-sparc/tlssunpic64.s: Likewise. * ld-sparc/tlssunpic64.sd: Likewise. * ld-sparc/tlssunpic64.td: Likewise.
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