Age | Commit message (Collapse) | Author | Files | Lines |
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* demangle.h (DEMANGLE_COMPONENT_HIDDEN_ALIAS): New.
libiberty/
* cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_HIDDEN_ALIAS.
(d_make_comp, d_print_comp): Likewise.
(d_special_name): Generate one.
* testsuite/demangle-expected: Add a hidden alias test.
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(pa_opcodes): Update load and store entries to allow both PA 1.X and
PA 2.0 mneumonics when equivalent. Entries with cache control
completers now require PA 1.1. Adjust whitespace.
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* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
value of DW_ATE_GNU_decimal_float.
include/elf/ChangeLog
* dwarf2.h (enum dwarf_type): Assign DW_ATE_GNU_decimal_float from
the user-defined encoding space pending inclusion in the standard.
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unconditional.
* include/elf/arm.h: Make all #ifndef OLD_ARM_ABI blocks
unconditional, delete all #ifdef OLD_ARM_ABI blocks.
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* arm.h: Import complete list of official relocation names
and numbers from AAELF. Define FAKE_RELOCs for old names.
Remove a few old names no longer used anywhere.
bfd:
* elf32-arm.c: Wherever possible, use official reloc names
from AAELF.
(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
Add many new relocations from AAELF.
(elf32_arm_howto_from_type): Update to match.
(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
(elf32_arm_final_link_relocate): Add support for
R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
case entries redundant with default.
* reloc.c: Reorganize ARM relocations. Add Thumb
assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
* bfd-in2.h, libbfd.h: Regenerate.
opcodes:
* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
instructions. Adjust disassembly of some opcodes to match
unified syntax.
(thumb32_opcodes): New table.
(print_insn_thumb): Rename print_insn_thumb16; don't handle
two-halfword branches here.
(print_insn_thumb32): New function.
(print_insn): Choose among print_insn_arm, print_insn_thumb16,
and print_insn_thumb32. Be consistent about order of
halfwords when printing 32-bit instructions.
gas:
* hash.c (hash_lookup): Add len parameter. All callers changed.
(hash_find_n): New interface.
* hash.h: Prototype hash_find_n.
* sb.c: Include as.h.
(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
(sb_scrub_and_add_sb): New interface.
* sb.h: Prototype sb_scrub_and_add_sb.
* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
reference to BFD_RELOC_ARM_GOT12 which is never generated.
* config/tc-arm.c: Rewrite, adding Thumb-2 support.
gas/testsuite:
* gas/arm/arm.exp: Convert all existing "gas_test" tests to
"run_dump_test" tests. Run more tests unconditionally. Run new tests.
* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
Adjust to work as a dump test.
* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
New files.
* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
diagnostics that don't happen in the first pass anymore.
* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
* gas/arm/vfp-bad.l:
Update expected diagnostics.
* gas/arm/pic.d: Update expected reloc name.
* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
* gas/arm/r15-bad.s: Avoid two-argument mul.
* gas/arm/req.s: Adjust comments.
* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
use of PC.
* gas/arm/macro-1.d, gas/arm/macro1.s
* gas/arm/t16-bad.l, gas/arm/t16-bad.s
* gas/arm/tcompat.d, gas/arm/tcompat.s
* gas/arm/tcompat2.d, gas/arm/tcompat2.s
* gas/arm/thumb32.d, gas/arm/thumb32.s
New test pair.
ld/testsuite:
* ld-arm/mixed-app.d: Adjust expected disassembly a little.
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* ppc.h (DT_PPC_GOT): Rename from DT_PPC_GLINK.
bfd/
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Set DT_PPC_GOT,
not DT_PPC_GLINK.
(ppc_elf_finish_dynamic_sections): Likewise.
binutils/
* readelf.c (get_ppc_dynamic_type): Display DT_PPC_GOT, not
DT_PPC_GLINK.
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R_PPC_RELAX32PC_PLT) Adjust.
(R_PPC_REL16, R_PPC_REL16_LO, R_PPC_REL16_HI, R_PPC_REL16_HA): Define.
(DT_PPC_GLINK): Define.
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2005-05-09 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_insn): Disallow use of prefix separator
and comma in Intel mode.
include/opcode/
2005-05-09 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add ht and hnt.
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* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr. Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
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* opcode/m88k.h: Rename psr macros to avoid conflicts.
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* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
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2005-04-01 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add rdtscp.
opcodes/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
easier future additions.
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2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
x86-64-segment and x86-64-inval-seg for x86-64.
* gas/i386/intel.d: Expect movw for moving between memory and
segment register.
* gas/i386/naked.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/opcode.s: Use movw for moving between memory and
segment register.
* gas/i386/x86-64-opcode.s: Likewise.
* : Likewise.
* gas/i386/inval-seg.l: New.
* gas/i386/inval-seg.s: New.
* gas/i386/segment.l: New.
* gas/i386/segment.s: New.
* gas/i386/x86-64-inval-seg.l: New.
* gas/i386/x86-64-inval-seg.s: New.
* gas/i386/x86-64-segment.l: New.
* gas/i386/x86-64-segment.s: New.
include/opcode/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Don't allow the `l' suffix for moving
moving between memory and segment register. Allow movq for
moving between general-purpose register and segment register.
opcodes/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (SEG_Fixup): New.
(Sv): New.
(dis386): Use "Sv" for 0x8c and 0x8e.
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* bfd-in2.h, libbfd.h: Regenerated.
* reloc.c: Add ARM TLS relocations.
* elf32-arm.c (elf32_arm_howto_table): Add dynamic TLS
relocations.
(elf32_arm_tls_gd32_howto, elf32_arm_tls_ldo32_howto)
(elf32_arm_tls_ldm32_howto, elf32_arm_tls_le32_howto)
(elf32_arm_tls_ie32_howto): New.
(elf32_arm_howto_from_type): Support TLS relocations.
(elf32_arm_reloc_map): Likewise.
(elf32_arm_reloc_type_lookup): Likewise.
(TCB_SIZE): Define.
(struct elf32_arm_obj_tdata): New.
(elf32_arm_tdata, elf32_arm_local_got_tls_type): Define.
(elf32_arm_mkobject): New function.
(struct elf32_arm_relocs_copied): Add pc_count.
(elf32_arm_hash_entry, GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD)
(GOT_TLS_IE): Define.
(struct elf32_arm_link_hash_table): Add tls_ldm_got.
(elf32_arm_link_hash_newfunc): Initialize tls_type.
(elf32_arm_copy_indirect_symbol): Copy pc_count and tls_type.
(elf32_arm_link_hash_table_create): Initialize tls_ldm_got.
(dtpoff_base, tpoff): New functions.
(elf32_arm_final_link_relocate): Handle TLS relocations.
(IS_ARM_TLS_RELOC): Define.
(elf32_arm_relocate_section): Warn about TLS mismatches.
(elf32_arm_gc_sweep_hook): Handle TLS relocations and pc_count.
(elf32_arm_check_relocs): Detect invalid symbol indexes. Handle
TLS relocations and pc_count.
(elf32_arm_adjust_dynamic_symbol): Check non_got_ref.
(allocate_dynrelocs): Handle TLS. Bind REL32 relocs to local
calls.
(elf32_arm_size_dynamic_sections): Handle TLS.
(elf32_arm_finish_dynamic_symbol): Likewise.
(bfd_elf32_mkobject): Define.
gas/
* config/tc-arm.c (arm_parse_reloc): Add TLS relocations.
(md_apply_fix3): Mark TLS symbols.
(tc_gen_reloc): Handle TLS relocations.
(arm_fix_adjustable): Ignore TLS relocations.
(s_arm_elf_cons): Support expressions after decorated symbols.
gas/testuite/
* gas/arm/tls.s, gas/arm/tls.d: New files.
* gas/arm/arm.exp: Run TLS test.
include/elf/
* arm.h: Add TLS relocations.
ld/testsuite/
* ld-arm/tls-lib.s, ld-arm/tls-lib.d, ld-arm/tls-lib.r,
ld-arm/tls-app.s, ld-arm/tls-app.d, ld-arm/tls-app.r: New files.
* ld-arm/arm-lib.ld, ld-arm/arm-dyn.ld: Increase data segment
alignment.
* ld-arm/arm-elf.exp: Run TLS tests.
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* pex-common.c: New file.
* pex-one.c: New file.
* pexecute.c: New file.
* pex-common.h: Include <stdio.h>.
(struct pex_obj): Define.
(struct pex_funcs): Define.
(pex_init_common): Declare.
* pex-unix.c: Rewrite.
* pex-win32.c: Rewrite.
* pex-djgpp.c: Rewrite.
* pex-msdos.c: Rewrite.
* testsuite/text-pexecute.c: New file.
* pexecute.txh: Rewrite.
* configure.ac: Check for wait3 and wait4. Set CHECK to
really-check rather than check-cplus-dem.
* functions.texi: Rebuild.
* Makefile.in: Rebuild dependencies.
(CFILES): Add pexecute.c, pex-common.c, pex-one.c.
(REQUIRED_OFILES): Add pexecute.o, pex-common.o, pex-one.o.
* testsuite/Makefile.in (really-check): New target.
(check-pexecute, test-pexecute): New targets.
* configure: Rebuild.
include:
* libiberty.h: Include <stdio.h>.
(PEX_RECORD_TIMES, PEX_USE_PIPES, PEX_SAVE_TEMPS): Define.
(PEX_LAST, PEX_SEARCH, PEX_SUFFIX, PEX_STDERR_TO_STDOUT): Define.
(PEX_BINARY_INPUT, PEX_BINARY_OUTPUT): Define.
(pex_init, pex_run, pex_read_output): Declare.
(pex_get_status, pex_get_times, pex_free, pex_one): Declare.
(struct pex_time): Define.
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* xtensa-isa.h: Update a comment and whitespace.
bfd ChangeLog
* xtensa-isa.c (xtensa_opcode_lookup, xtensa_state_lookup,
xtensa_sysreg_lookup_name, xtensa_interface_lookup,
xtensa_funcUnit_lookup): Skip bsearch call if count is zero.
(xtensa_opcode_decode): Rearrange code.
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(elf32_arm_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Define.
(elf_backend_additional_program_headers): Likewise.
(elf32_arm_symbian_modify_segment_map): Use
elf32_arm_modify_segment_map.
* binutils/readelf.c (get_arm_segment_type): New function.
(get_segment_type): Use it.
* arm.h (PT_ARM_EXIDX): Define.
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2005-03-16 H.J. Lu <hongjiu.lu@intel.com>
* elflink.c (elf_mark_used_section): New.
(bfd_elf_gc_sections): Call elf_gc_mark_section for
non-relocatable link if we don't do GC.
include/
2005-03-16 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (bfd_link_info): Add gc_sections.
ld/
2005-03-16 H.J. Lu <hongjiu.lu@intel.com>
* emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove
unused empty output sections for non-relocatable link.
* ld.h (args_type): Remove gc_sections.
* ldlang.c (lang_mark_used_section): New.
(lang_gc_sections): Use link_info.gc_sections instead of
command_line.gc_sections.
* ldmain.c (main): Likewise.
* lexsup.c (parse_args): Likewise.
* ldlang.c (lang_process): Call lang_mark_used_section.
* ldmain.c (main): Initialize link_info.gc_sections to FALSE.
ld/testsuite/
2005-03-16 H.J. Lu <hongjiu.lu@intel.com>
* ld-alpha/tlsbin.rd: Updated for empty section removal.
* ld-alpha/tlsbinr.rd: Likewise.
* ld-alpha/tlspic.rd: Likewise.
* ld-arm/mixed-lib.sym: Likewise.
* ld-i386/tlsbin.rd: Likewise.
* ld-i386/tlsnopic.rd: Likewise.
* ld-i386/tlspic.rd: Likewise.
* ld-ia64/tlsbin.rd: Likewise.
* ld-ia64/tlspic.rd: Likewise.
* ld-powerpc/apuinfo.rd: Likewise.
* ld-powerpc/powerpc.exp: Likewise.
* ld-powerpc/tlsexe32.r: Likewise.
* ld-s390/tlsbin.rd: Likewise.
* ld-s390/tlsbin_64.rd: Likewise.
* ld-s390/tlspic.rd: Likewise.
* ld-s390/tlspic_64.rd: Likewise.
* ld-sh/tlsbin-2.d: Likewise.
* ld-sh/tlspic-2.d: Likewise.
* ld-sparc/tlssunbin32.rd: Likewise.
* ld-sparc/tlssunnopic32.rd: Likewise.
* ld-sparc/tlssunpic32.rd: Likewise.
* ld-x86-64/tlsbin.rd: Likewise.
* ld-x86-64/tlspic.rd: Likewise.
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* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
and ARM_ARCH_V6ZKT2.
opcodes:
* arm-dis.c (arm_opcodes): Document %E and %V.
Add entries for v6T2 ARM instructions:
bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
(print_insn_arm): Add support for %E and %V.
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