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2004-11-08Add support fpr MAXQ processorNick Clifton6-1/+1201
2004-11-08Fix support for PECOFF weak symbolsNick Clifton2-1/+12
2004-11-052004-11-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+7
2004-11-052004-11-05 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-0/+4
2004-11-052004-11-05 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-5/+4
2004-11-04 * cris.h (enum cris_insn_version_usage): Tweak formatting andHans-Peter Nilsson2-10/+84
2004-11-04 * cris.h (EF_CRIS_VARIANT_MASK, EF_CRIS_VARIANT_ANY_V0_V10)Hans-Peter Nilsson2-0/+18
2004-11-04gas/Jan Beulich2-403/+415
2004-10-272004-10-27 Richard Earnshaw <rearnsha@arm.com>Paul Brook2-1/+7
2004-10-272004-10-27 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-0/+14
2004-10-27(enum reg): Rearrange registers, remove 'ccfg' and 'pc'.Tomer Levi1-50/+77
2004-10-26bfd/Paul Brook2-0/+7
2004-10-252004-10-21 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi2-3/+15
2004-10-21bfd/H.J. Lu2-6/+14
2004-10-122004-10-12 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+5
2004-10-08bfd/Daniel Jacobowitz3-0/+10
2004-10-08Separate entries for common file changes so the automerge can find them.DJ Delorie1-0/+1
2004-10-08bfd ChangeLogBob Wilson5-199/+1084
2004-10-07Add linker option: --warn-shared-textrel to produce warnings when adding aNick Clifton2-0/+7
2004-10-07Add support for CRX co-processor opcodesNick Clifton2-3/+9
2004-10-062004-10-06 Eric Christopher <echristo@redhat.com>Eric Christopher2-2/+7
2004-10-01The patch below adds binutils support for the SHT_ARM_EXIDX, as defined byNick Clifton2-1/+17
2004-09-30Apply Paul Brook's patch to implement armv6k instructionsNick Clifton2-0/+10
2004-09-17bfd/Paul Brook2-3/+14
2004-09-17include/Alan Modra2-22/+30
2004-09-14merge from gccDJ Delorie2-1/+5
2004-09-13bfd/Paul Brook2-1/+5
2004-09-11 * gas/config/tc-avr.c: Add support forMarek Michalkiewicz2-5/+15
2004-09-09opcodes/Alan Modra2-1/+5
2004-09-08 * sim-sh.h: Add new sh2a banked registers.Corinna Vinschen2-3/+17
2004-09-05merge from gccDJ Delorie3-5/+20
2004-08-25Apply Dmitry Diky's patches to add relaxation to msp430.Nick Clifton4-2/+119
2004-08-23Add missing ChangeLog entry.Jim Blandy1-0/+4
2004-08-17trim off entries that came in with a merge, rev 1.245, now in ChangeLog-9103Alan Modra1-2122/+1
2004-08-13* symconst.h (langMax): Fix typo in comment.Mark Kettenis2-1/+5
2004-08-13O_JSR): Do not allow VECIND addressing for non-SX processors.Nick Clifton2-1/+7
2004-08-13bfd/Alan Modra2-8/+5
2004-08-122004-08-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-0/+7
2004-08-06bfd/Paul Brook1-4/+9
2004-08-06merge from gccDJ Delorie2-3/+8
2004-08-042004-08-04 Andrew Cagney <cagney@gnu.org>Andrew Cagney2-6/+524
2004-08-04gdb/ChangeLog:Jim Blandy1-0/+4
2004-08-04gdb/ChangeLog:Jim Blandy1-0/+254
2004-07-30Added new instructions for next version of VIA PadLock core.Michal Ludvig2-0/+7
2004-07-29include/elf/ChangeLog:Alexandre Oliva2-2/+13
2004-07-27Add CRX insns: pushx, popxNick Clifton2-0/+8
2004-07-24merge from gccDJ Delorie3-0/+43
2004-07-232004-07-23 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+6
2004-07-222004-07-22 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+6
2004-07-21For DefaultSize instructions, don't guess a 'q' suffix if the instructionNick Clifton2-103/+122
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