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2020-12-01RISC-V: Support to add implicit extensions for G.Nelson Chu2-0/+6
2020-12-01RISC-V: Improve the version parsing for arch string.Nelson Chu2-2/+7
2020-11-25libctf, include: support foreign-endianness symtabs with CTFNick Alcock2-13/+24
2020-11-20libctf, include: add ctf_getsymsect and ctf_getstrsectNick Alcock2-0/+7
2020-11-20libctf, include: CTF-archive-wide symbol lookupNick Alcock3-3/+18
2020-11-20libctf: symbol type linking supportNick Alcock3-15/+40
2020-11-20bfd, include, ld, binutils, libctf: CTF should use the dynstr/symNick Alcock4-13/+43
2020-11-20libctf, include, binutils, gdb: rename CTF-opening functionsNick Alcock2-6/+19
2020-11-20libctf, include, binutils, gdb, ld: rename ctf_file_t to ctf_dict_tNick Alcock3-124/+146
2020-11-18Support SHF_GNU_RETAIN ELF section flagJozef Lawrynowicz2-0/+5
2020-11-16aarch64: Extract Condition flag manipulation feature from Armv8.4-APrzemyslaw Wirkus2-1/+9
2020-11-09Add support for the LMBD (left-most bit detect) instruction to the PRU assemb...Spencer E. Olson2-16/+22
2020-11-09aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus2-0/+5
2020-11-06aarch64: Extract Pointer Authentication feature from Armv8.3-APrzemyslaw Wirkus2-0/+7
2020-11-04aarch64: Update feature RAS system registersPrzemyslaw Wirkus2-2/+7
2020-11-03[PATCH][GAS] aarch64: Add atomic 64-byte load/store instructions for Armv8.7Przemyslaw Wirkus2-1/+8
2020-11-03[PATCH] aarch64: Update missing ChangeLog for AArch64 commitsPrzemyslaw Wirkus1-0/+16
2020-10-30x86: Support GNU_PROPERTY_X86_ISA_1_BASELINE markerH.J. Lu2-8/+17
2020-10-28aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus1-0/+2
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+2
2020-10-28aarch64: Add basic support for armv8.7-a architecturePrzemyslaw Wirkus1-0/+3
2020-10-26CSKY: Add version flag in eflag and fix bug in disassembling register.Cooper Qu2-0/+11
2020-10-21Remove libctf/mkerrors.sedTom Tromey2-58/+73
2020-10-16RISC-V: Support GNU indirect functions.Nelson Chu2-0/+5
2020-10-09x86: Support GNU_PROPERTY_X86_ISA_1_V[234] markerH.J. Lu2-28/+64
2020-09-24Sync libiberty and include with GCC for get_DW_UT_name.Mark Wielaard3-13/+31
2020-09-12elf: Add -z unique-symbol to avoid duplicated local symbol namesH.J. Lu2-0/+8
2020-09-11Sync include, libiberty with GCC.Felix Willgerodt2-0/+11
2020-09-12CSKY: Change ISA flag's type to bfd_uint64_t and fix build error.Cooper Qu2-31/+72
2020-09-11x86: Add NT_X86_CET noteH.J. Lu2-0/+6
2020-09-10CSKY: Add new arches while refine the cpu option process.Cooper Qu1-0/+6
2020-09-10Fix compile time warnings when building for the CSKY target on a 32-bit host.Nick Clifton2-1/+6
2020-09-09CSKY: Change mvtc and mulsw's ISA flag.Cooper Qu2-0/+5
2020-09-09CSKY: Add FPUV3 instructions, which supported by ck860f.Cooper Qu2-0/+6
2020-09-08MSP430: Support relocations for subtract expressions in .uleb128 directivesJozef Lawrynowicz2-0/+11
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan2-2/+11
2020-09-08aarch64: Add base support for Armv8-RAlex Coplan2-1/+14
2020-09-02ubsan: v850-opc.c:412 left shift cannot be representedAlan Modra2-1/+6
2020-09-02CSKY: Add CPU CK803r3.Cooper Qu2-0/+5
2020-08-31PR26493 UBSAN: elfnn-riscv.c left shift of negative valueAlan Modra2-4/+10
2020-08-31PR26457 UBSAN: som.c:1794 left shift cannot be representedAlan Modra2-14/+26
2020-08-28CSKY: Support attribute section.Cooper Qu3-27/+157
2020-08-27libctf, binutils, include, ld: gettextize and improve error handlingNick Alcock2-1/+5
2020-08-26Add support to readelf for the OpenBSD segment types.Nick Clifton2-0/+12
2020-08-26PR26458 UBSAN: elf32-i386.c:3615 left shift of negative valueAlan Modra2-1/+6
2020-08-24CSKY: Add new arch CK860.Cooper Qu2-0/+7
2020-08-24CSKY: Add ck803r2 series cpu.Cooper Qu2-0/+5
2020-08-23ada-lex.l: Ignore register diagnostic also for g++ defaulting to ISO C++17Mark Wielaard2-0/+10
2020-08-10aarch64: Don't assert on long sysreg namesAlex Coplan2-0/+6
2020-08-10[aarch64] GAS doesn't validate the architecture version for any tlbi register...Przemyslaw Wirkus2-5/+10
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