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2016-05-23[ARC] Update instruction type and delay slot info.Claudiu Zissulescu2-1/+10
2016-05-23[ARC] Rename "class" named attributes.Claudiu Zissulescu2-2/+8
2016-05-23tic54x: rename typedef of struct symbol_Trevor Saunders2-4/+9
2016-05-17Add DW_LANG_RustTom Tromey2-1/+10
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune3-1/+9
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme2-3/+34
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme2-0/+5
2016-05-10Allow extension availability to depend on several architecture bitsThomas Preud'homme2-0/+10
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme2-1/+11
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu2-2/+18
2016-04-28Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton2-0/+8
2016-04-27Cache result of scan for __start_* and __stop_* sectionsAlan Modra2-6/+20
2016-04-21Add support for non-ELF targets to check their relocs.Nick Clifton2-0/+9
2016-04-20Check ELF relocs after opening all input filesH.J. Lu2-0/+8
2016-04-20arc: Fix relocation formula for ARC_NPS_CMEM16 relocationAndrew Burgess2-1/+5
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess2-1/+5
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess2-0/+6
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess3-0/+15
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu2-3/+32
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu2-24/+90
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu2-3/+16
2016-04-05[ARC] 24 bit reloc and overflow detection fix.Claudiu Zissulescu2-1/+21
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu2-0/+89
2016-03-22make more variables constTrevor Saunders3-2/+7
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess2-0/+5
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess2-9/+14
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess3-0/+7
2016-03-21arc: Remove EF_ARC_CPU_GENERIC constant.Andrew Burgess2-4/+6
2016-03-21arc: Remove duplicated constant in include/elf/arc.hAndrew Burgess2-5/+5
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess2-5/+4
2016-03-15Add -z noreloc-overflow option to x86-64 ldH.J. Lu2-0/+8
2016-03-08[ARC] Allow non-instruction relocations within .text sectionsClaudiu Zissulescu3-41/+77
2016-03-07Add const qualifiers at various places.Trevor Saunders9-17/+31
2016-03-04Fix datestamps on ChangeLog entries to read 2015 instead of 2016.Cary Coutant1-1/+1
2016-03-04Add missing ChangeLog entries for commit 82838H.J. Lu1-0/+11
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab2-1/+7
2016-03-03Add new plugin hooks to support querying section alignment and size.Cary Coutant1-1/+25
2016-03-03get_symbols() plugin API tweak to support --start-lib/--end-lib.Evgenii Stepanov2-1/+6
2016-02-26Add ChangeLog entries for PR ld/19645H.J. Lu1-0/+6
2016-02-26Properly implement STT_COMMONH.J. Lu1-0/+12
2016-02-26[x86] Resolve non-PIC undefweak symbols in executableH.J. Lu2-0/+11
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang2-1/+7
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu2-0/+14
2016-02-09Fix compile time warnings building the binutils with a gcc6 compiler.Nick Clifton4-7/+16
2016-02-09Fix macro redefinition error on SolarisAlan Modra2-0/+6
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton2-5/+16
2016-01-19Add support to readelf for reading FreeBSD ELF core notes.John Baldwin2-0/+27
2016-01-19Add PIC and TLS support to the ARC target.Miranda Cupertino3-10/+37
2016-01-18Use a 32-bit value to hold the section number in the internal COFF symbol str...Nick Clifton2-6/+17
2016-01-11Import changes made to files shared with the FSF GCC project.Nick Clifton2-2/+12
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