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2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab2-1/+7
2016-03-03Add new plugin hooks to support querying section alignment and size.Cary Coutant1-1/+25
2016-03-03get_symbols() plugin API tweak to support --start-lib/--end-lib.Evgenii Stepanov2-1/+6
2016-02-26Add ChangeLog entries for PR ld/19645H.J. Lu1-0/+6
2016-02-26Properly implement STT_COMMONH.J. Lu1-0/+12
2016-02-26[x86] Resolve non-PIC undefweak symbols in executableH.J. Lu2-0/+11
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang2-1/+7
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu2-0/+14
2016-02-09Fix compile time warnings building the binutils with a gcc6 compiler.Nick Clifton4-7/+16
2016-02-09Fix macro redefinition error on SolarisAlan Modra2-0/+6
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton2-5/+16
2016-01-19Add support to readelf for reading FreeBSD ELF core notes.John Baldwin2-0/+27
2016-01-19Add PIC and TLS support to the ARC target.Miranda Cupertino3-10/+37
2016-01-18Use a 32-bit value to hold the section number in the internal COFF symbol str...Nick Clifton2-6/+17
2016-01-11Import changes made to files shared with the FSF GCC project.Nick Clifton2-2/+12
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2-2/+9
2016-01-06MIPS/include: opcode/mips.h: Add a summary of MIPS16 operand codesMaciej W. Rozycki2-0/+10
2016-01-05libiberty: {count,dup,write}argv: constify argv input slightlyMike Frysinger2-3/+8
2016-01-01Copyright update for binutilsAlan Modra295-295/+298
2016-01-01New 2016 binutils ChangeLog filesAlan Modra1-0/+17
2016-01-01binutils ChangeLog rotationAlan Modra10-0/+0
2016-01-01GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker22-22/+22
2015-12-30Fix assorted ChangeLog errorsAlan Modra5-244/+261
2015-12-24Add assembler support for ARMv8-M BaselineThomas Preud'homme4-21/+62
2015-12-24Add assembler support for ARMv8-M MainlineThomas Preud'homme4-18/+54
2015-12-24Consolidate Thumb-1/Thumb-2 ISA detectionThomas Preud'homme2-3/+8
2015-12-22Add support for ARM's NOREAD section flag.Mickael Guene3-4/+9
2015-12-17[Patch ARM] Fix build attributes for armv8-a in case of assembler files that ...Ramana Radhakrishnan1-2/+3
2015-12-17Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:Christophe Lyon1-0/+4
2015-12-16[ARM] Add support for thumb1 pcrop relocations.Mickael Guene1-0/+5
2015-12-15[ARM] Enable CRC by default for ARMv8.1 and later.Matthew Wahab2-3/+11
2015-12-15Add support for RX V2 Instruction SetYoshinori Sato4-1/+28
2015-12-14[AArch64][PATCH 11/14] Add support for the 2H vector type.Matthew Wahab2-0/+6
2015-12-11[AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab2-0/+14
2015-12-11[AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab2-0/+7
2015-12-11[AArch64][Patch 1/5] Support the ARMv8.2 Statistical Profiling Extension.Matthew Wahab2-0/+5
2015-12-10[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.Matthew Wahab2-0/+7
2015-12-10[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.Matthew Wahab2-1/+8
2015-12-10[AArch64][PATCH 1/2] Add support for RAS instruction ESB.Matthew Wahab2-0/+7
2015-12-10[AArch64] Fix ARMv8.1 and ARMv8.2 feature settings.Matthew Wahab2-2/+13
2015-12-07R_PPC64_ENTRYAlan Modra2-0/+5
2015-12-04Fix failures in the GAS testsuite for the ARC architecture.Claudiu Zissulescu2-1/+5
2015-12-03Darwin: add new mach-o header flags.Tristan Gingold2-1/+7
2015-12-01Invoke aout N_* macros with pointer to struct internal_execAlan Modra11-53/+70
2015-11-28Port libvtv to SolarisRainer Orth2-0/+9
2015-11-28SH FDPIC backend supportRich Felker2-0/+36
2015-11-28PR other/61321 - demangler crash on casts in template parametersPedro Alves1-0/+4
2015-11-28Fix PR63758 by using the _NSGetEnviron() API on DarwinIain Sandoe2-0/+38
2015-11-28Implement N4514, C++ Extensions for Transactional Memory.Jason Merrill1-0/+2
2015-11-27[AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab2-0/+5
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