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* opcode/tic6x-control-registers.h (tscl): Now read_write.
gas/testsuite/
* gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
* gas/tic6x/insns-bad-1.l: Likewise.
* gas/tic6x/insns-c674x.d: Add test for writeable tscl.
* gas/tic6x/insns-c674x.s: Likewise.
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* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
(main): Recognize the new CPU string.
* s390-opc.c: Add new instruction formats and masks.
* s390-opc.txt: Add new z196 instructions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c: (md_parse_option): New option -march=z196.
* doc/c-s390.texi: Document new option.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run the zarch-z196 test.
* gas/s390/zarch-z196.d: Add new instructions.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
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* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
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(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
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(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
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(arm_ext_sec): New variable.
(do_t_smc): In Thumb state SMC requires v7-A.
(insns): Make SMC depend on Security Extensions.
(arm_cpus): All -mcpu=cortex-a* options have the Security Extensions.
(arm_extensions): Add 'sec' extension.
(cpu_arch_ver): Reorder.
(aeabi_set_public_attributes): Emit Tag_Virtualization_use as
appropriate.
* gas/doc/c-arm.texi: Document Security Extensions.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions..
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* gas/testsuite/gas/arm/thumb32.s: Likewise.
* include/opcode/arm.h (ARM_EXT_V6Z): Remove.
(ARM_EXT_SEC): New define.
(ARM_AEXT_V6Z): Use Security Extensions.
(ARM_AEXT_V6ZK): Likeiwse.
(ARM_AEXT_V6ZT2): Likewise.
(ARM_AEXT_V6ZKT2): Likewise.
(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
(ARM_ARCH_V7A_SEC): New define.
(ARM_ARCH_V7A_MP): Rename...
(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions.
(thumb32_opcodes): Likewise.
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(do_pld): Update comment.
(insns): Add support for pldw.
(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
MP extension.
(arm_extensions): Add 'mp' extension.
(aeabi_set_public_attributes): Emit correct build attribute when
MP extension is enabled.
* gas/doc/c-arm.texi: Update for MP extensions.
* gas/testsuite/gas/arm/arch7a-mp.d: Add.
* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* include/opcode/arm.h (ARM_EXT_MP): Add.
(ARM_ARCH_V7A_MP): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
(thumb32_opcodes): Likewise.
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The disassembler has partial (but incomplete/broken) support already for
the pseudo debug insn OUTC, so let's fix it up and finish it. And now
that the disassembler can handle it, make sure our assembler can output
it too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* dwarf.c (decode_location_expression): Add offset_size and
dwarf_version arguments. Prefix DIE offset with 0x for
DW_OP_call{2,4,_ref}. Fix up DW_OP_call_ref operand size,
complain if in frame info section. Handle
DW_OP_GNU_implicit_pointer.
(read_and_display_attr_value, display_debug_loc,
display_debug_frames): Adjust decode_location_expression callers.
(process_debug_info): Save offset_size and dwarf_version values
into debug_information array.
* dwarf2.h (DW_OP_GNU_implicit_pointer): New.
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* common/signals.c (ANY): Remove.
(SET): No longer use ANY.
include/gdb/
* signals.def: Replace all ANY uses by SET with specific numbers.
* signals.h (ANY): Remove.
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* common/signals.c (signals): Move the content to signals.def.
Include it. Remove the INDENT comments.
gdb/gdbserver/
* Makefile.in (signals_def): New.
(server_h): Append include/gdb/signals.h and signals_def.
(server.o): Append signals_def.
include/gdb/
* signals.h (enum target_signal): Move the content to signals.def.
Include it.
* signals.def: New file.
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* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
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* README.txt: New.
* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
New. Default to enabled.
* configure: Regenerate.
* cpu.h (regs_type): Add cycle tracking info.
(reset_pipeline_stats): Declare.
(halt_pipeline_stats): Declare.
(pipeline_stats): Declare.
* main.c (done): Call pipeline_stats().
* mem.h (rx_mem_ptr): Moved to here ...
* mem.c (mem_ptr): ... from here. Rename throughout.
(mem_put_byte): Move LEDs to Port A. Add Port B to control cycle
statistics. Move UART to SCI4.
(mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles.
* reg.c (init_regs): Set Rt reg to -1 (no reg).
* rx.c: Add cycle counting and statistics throughout.
(rx_get_byte): Optimize for speed.
(decode_opcode): Likewise.
(reset_pipeline_stats): New.
(halt_pipeline_stats): New.
(pipeline_stats): New.
* trace.c (sim_disasm_one): Print cycle count.
[include/opcode]
* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
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* internal.h (ELF_TBSS_SPECIAL): New macro, extracted from..
(ELF_SECTION_SIZE): ..here.
(ELF_SECTION_IN_SEGMENT_1): Add "strict" arg.
(ELF_SECTION_IN_SEGMENT_STRICT): New macro.
bfd/
* elf.c (assign_file_positions_for_load_sections): Check that
zero size sections are allocated in segments too.
(assign_file_positions_for_non_load_sections): Warn if zero
size alloc sections are found here.
(copy_elf_program_header): Don't drop zero size sections from
segment map.
(copy_private_bfd_data): Check for changes in zero size sections.
binutils/
* readelf.c (process_program_headers): Don't ignore all zero size
sections.
ld/testsuite/
* ld-powerpc/tlsexe.r: Update.
* ld-powerpc/tlsexetoc.r: Update.
* ld-powerpc/tlsso.r: Update.
* ld-powerpc/tlstocso.r: Update.
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2010-07-06 Ken Werner <ken.werner@de.ibm.com>
* floatformat.h (floatformat_ieee_half_big): Add declaration.
(floatformat_ieee_half_little): Likewise.
libiberty/ChangeLog:
2010-07-06 Ken Werner <ken.werner@de.ibm.com>
* floatformat.c (floatformat_ieee_half_big): New variable.
(floatformat_ieee_half_little): Likewise.
gdb/ChangeLog:
2010-07-06 Ken Werner <ken.werner@de.ibm.com>
* gdbtypes.h (floatformats_ieee_half): Add declaration.
* gdbtypes.c (floatformats_ieee_half): New variable.
* doublest.c (floatformat_from_length): Set format to
gdbarch_half_format if length matches.
* gdbarch.sh (half_bit): New architecture method.
(half_format): Likewise.
* gdbarch.h: Regenerate.
* gdbarch.c: Likewise.
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* config/tc-mips.c (nops_for_insn_or_target): Replace
MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and
MIPS16_INSN_COND_BRANCH.
include/opcode/
* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
(MIPS16_INSN_BRANCH): Rename to...
(MIPS16_INSN_COND_BRANCH): ... this.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove branch instruction
type and delay slot determination.
(print_insn_mips16): Extend branch instruction type and delay
slot determination to cover all instructions.
* mips16-opc.c (BR): Remove macro.
(UBR, CBR): New macros.
(mips16_opcodes): Update branch annotation for "b", "beqz",
"bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
and "jrc".
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* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
Renumber other PPC_OPCODE defines.
gas/
* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
(ppc_setup_opcodes): Likewise. Simplify opcode selection.
opcodes/
* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
(PPC64, MFDEC2): Update.
(NON32, NO371): Define.
(powerpc_opcode): Update to not use old opcode flags, and avoid
-m601 duplicates.
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* ppc64.h (R_PPC64_LO_DS_OPT): Define.
bfd/
* elf64-ppc.c (toc_skip_enum): Define.
(ppc64_elf_edit_toc): Use two low bits of skip array as markers.
Optimize largetoc sequences.
(adjust_toc_syms): Update for skip array change.
(ppc64_elf_relocate_section): Handle R_PPC64_LO_DS_OPT.
ld/
* emultempl/ppc64elf.em (prelim_size_sections): New function.
(ppc_before_allocation): Use it. Size sections before toc edit too.
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* fileread.cc (Input_file::find_fie): New
(Input_file::open): Use Input_file::find_fie.
* fileread.h (Input_file::find_fie): New
* plugin.cc (set_extra_library_path): New.
(Plugin::load): Add set_extra_library_path to the transfer vector.
(Plugin_manager::set_extra_library_path): New.
(Plugin_manager::add_input_file): Use the extra search path if set.
(set_extra_library_path(): New.
* plugin.h (Plugin_manager): Add set_extra_library_path and
extra_search_path_.
2010-06-21 Rafael Espindola <espindola@google.com>
* plugin-api.h (ld_plugin_set_extra_library_path): New.
(ld_plugin_tag): Add LDPT_SET_EXTRA_LIBRARY_PATH.
(ld_plugin_tv): Add tv_set_extra_library_path.
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* plugin.h (ld_plugin_add_input_file, ld_plugin_add_input_library):
Make argument const.
2010-06-18 Rafael Espindola <espindola@google.com>
* plugin.cc (add_input_file,add_input_library)
(Plugin_manager::add_input_file): Make filename arguments const.
* plugin.h (Plugin_manager::add_input_file): Make filename arguments
const.
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* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2.
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type,
elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes,
elf32_tic6x_merge_private_bfd_data): New.
(bfd_elf32_bfd_merge_private_bfd_data,
elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section,
elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor):
Define.
* elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare.
binutils:
* readelf.c (display_tic6x_attribute, process_tic6x_specific):
New.
(process_arch_specific): Call process_tic6x_specific for
EM_TI_C6000.
gas:
* config/tc-tic6x.c: Include elf/tic6x.h.
(tic6x_arch_attribute, tic6x_seen_insns): New.
(tic6x_arch_table, tic6x_arches): Add attribute values.
(tic6x_use_arch): Handle attribute settings.
(tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute,
tic6x_attribute_table, tic6x_attributes,
tic6x_convert_symbolic_attribute): New.
(md_pseudo_table): Add c6xabi_attribute.
(md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute.
(tic6x_set_attribute_int, tic6x_set_attributes): New.
(tic6x_end): Call tic6x_set_attributes.
* config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define.
(tic6x_convert_symbolic_attribute): Declare.
gas/testsuite:
* gas/elf/elf.exp: Set target_machine for tic6x-*-*.
* gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d,
gas/tic6x/attr-arch-directive-1.s,
gas/tic6x/attr-arch-directive-2.d,
gas/tic6x/attr-arch-directive-2.s,
gas/tic6x/attr-arch-directive-3.d,
gas/tic6x/attr-arch-directive-3.s,
gas/tic6x/attr-arch-directive-4.d,
gas/tic6x/attr-arch-directive-4.s,
gas/tic6x/attr-arch-directive-5.d,
gas/tic6x/attr-arch-directive-5.s,
gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
gas/tic6x/attr-arch-opts-none-1.d,
gas/tic6x/attr-arch-opts-none-2.d,
gas/tic6x/attr-arch-opts-override-1.d,
gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New.
include/elf:
* tic6x-attrs.h: New.
* tic6x.h: Include elf/tic6x-attrs.h for attribute table.
(C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X,
C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP,
C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP,
C6XABI_Tag_CPU_arch_C674X): Define.
ld:
* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define.
ld/testsuite:
* ld-elf/orphan3.d: Allow section names starting '_'.
* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d,
ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d,
ld-tic6x/attr-arch-c64x+-c674x.d,
ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d,
ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d,
ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d,
ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s,
ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d,
ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d,
ld-tic6x/attr-arch-c67x+-c674x.d,
ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d,
ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d,
ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d,
ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New.
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* config/tc-ppc.c (md_assemble): Emit APUinfo section for
PPC_OPCODE_E500.
gas/testsuite/
* gas/ppc/e500.s: Add eieio, mbar and lwsync
* gas/ppc/e500.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_E500): Define.
opcodes/
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
touch floating point regs and are enabled by COM, PPC or PPCCOM.
Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
Treat lwsync as msync on e500.
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2010-06-11 Tristan Gingold <gingold@adacore.com>
* ia64.h (EF_IA_64_VMS_COMCOD, EF_IA_64_VMS_COMCOD_SUCCESS)
(EF_IA_64_VMS_COMCOD_WARNING, EF_IA_64_VMS_COMCOD_ERROR)
(EF_IA_64_VMS_COMCOD_ABORT, EF_IA_64_VMS_LINKAGES): Define.
(VMS_LF_CALL_DEBUG, VMS_LF_NOP0BUFS, VMS_LF_P0IMAGE)
(VMS_LF_MKTHREADS, VMS_LF_UPCALLS, VMS_LF_IMGSTA)
(VMS_LF_INITIALIZE, VMS_LF_MAIN, VMS_LF_EXE_INIT)
(VMS_LF_TBK_IN_IMG, VMS_LF_DBG_IN_IMG, VMS_LF_TBK_IN_DSF)
(VMS_LF_DBG_IN_DSF, VMS_LF_SIGNATURES, VMS_LF_REL_SEG_OFF): Define.
(VMS_STO_VISIBILITY, VMS_ST_VISIBILITY, VMS_STO_FUNC_TYPE)
(VMS_ST_FUNC_TYPE, VMS_SFT_CODE_ADDR, VMS_SFT_SYMV_IDX)
(VMS_SFT_FD, VMS_SFT_RESERVE, VMS_STO_LINKAGE, VMS_ST_LINKAGE)
(VMS_STL_IGNORE, VMS_STL_RESERVE, VMS_STL_STD, VMS_STL_LNK): Define.
(Elf64_External_VMS_IMAGE_FIXUP): New declaration.
(Elf64_External_VMS_IMAGE_RELA): Ditto.
(R_IA64_VMS_DIR8, R_IA64_VMS_DIR16LSB, R_IA64_VMS_CALL_SIGNATURE)
(R_IA64_VMS_EXECLET_FUNC, R_IA64_VMS_EXECLET_DATA, R_IA64_VMS_FIX8)
(R_IA64_VMS_FIX16, R_IA64_VMS_FIX32, R_IA64_VMS_FIX64)
(R_IA64_VMS_FIXFD, R_IA64_VMS_ACC_LOAD, R_IA64_VMS_ACC_ADD)
(R_IA64_VMS_ACC_SUB, R_IA64_VMS_ACC_MUL, R_IA64_VMS_ACC_DIV)
(R_IA64_VMS_ACC_AND, R_IA64_VMS_ACC_IOR, R_IA64_VMS_ACC_EOR)
(R_IA64_VMS_ACC_ASH, R_IA64_VMS_ACC_STO8, R_IA64_VMS_ACC_STO16LSH)
(R_IA64_VMS_ACC_STO32LSH, R_IA64_VMS_ACC_STO64LSH): New.
binutils/
2010-06-11 Tristan Gingold <gingold@adacore.com>
Doug Rupp <rupp@gnat.com>
* readelf.c (is_ia64_vms): New function.
(dump_relocations): Use it.
(get_machine_flags): Display IA-64 OpenVMS flags.
(process_program_headers): No error on OpenVMS if no .dynamic section.
(struct ia64_vms_dynfixup, struct ia64_vms_dynimgrela): New
declarations.
(dump_ia64_vms_dynamic_fixups): New function.
(dump_ia64_vms_dynamic_relocs): Ditto.
(process_ia64_vms_dynamic_relocs): Ditto.
(process_relocs): Handle IA-64 OpenVMS relocs.
(VMS_EPOCH_OFFSET, VMS_GRANULARITY_FACTOR): New macros.
(print_vms_time): New function.
(dynamic_section_ia64_val): Handle DT_IA_64_VMS_LINKTIME and
DT_IA_64_VMS_LNKFLAGS.
(get_ia64_symbol_other): New function.
(get_symbol_other): Handle EM_IA_64.
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2010-06-10 Tristan Gingold <gingold@adacore.com>
* aout.h: New file.
* clock.h: Likewise.
* lst.h: Likewise.
* reloc.h: Likewise.
* internal.h: Likewise.
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* dwarf2.h (enum dwarf_tag): Add DW_TAG_HP_Bliss_field and
DW_TAG_HP_Bliss_field_set.
(enum dwarf_attribute): Add DW_AT_HP_prologue, DW_AT_HP_epilogue,
DW_AT_HP_unit_name, DW_AT_HP_unit_size, DW_AT_HP_widened_byte_size,
DW_AT_HP_definition_points, DW_AT_HP_default_location and
DW_AT_HP_is_result_param.
(enum dwarf_type): Add DW_ATE_HP_VAX_float, DW_ATE_HP_VAX_float_d,
DW_ATE_HP_packed_decimal, DW_ATE_HP_zoned_decimal, DW_ATE_HP_edited,
DW_ATE_HP_signed_fixed, DW_ATE_HP_unsigned_fixed,
DW_ATE_HP_VAX_complex_float and DW_ATE_HP_VAX_complex_float_d.
(enum dwarf_line_number_x_ops): Add
DW_LNE_HP_source_file_correlation.
(enum dwarf_source_language): Add DW_LANG_HP_Bliss,
DW_LANG_HP_Basic91, DW_LANG_HP_Pascal91, DW_LANG_HP_IMacro,
DW_LANG_HP_Assembler.
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* plugin-api.h (ld_plugin_tag): Add LDPT_OUTPUT_NAME.
2010-06-01 Rafael Espindola <espindola@google.com>
* plugin.cc (Plugin::load): Pass the output name to the plugin.
|
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* lbr.h: Improve comments.
|
|
|
|
* config/tc-mips.c (is_opcode_valid): Remove expansionp.
(macro_build): Change invocation of is_opcode_valid.
(mips_ip): Likewise.
gas/testsuite/
* gas/mips/mips-no-jalx.l: Delete.
* gas/mips/mips-no-jalx.s: Delete.
* gas/mips/mips-jalx-2.d: New.
* gas/mips/mips-jalx-2.s: New.
* gas/mips/mips.exp (mips-jalx-2): Run new test.
(mips-no-jalx): Remove deleted test.
include/
* opcode/mips.h (INSN_MIPS16): Remove.
opcodes/
* mips-dis.c (mips_arch): Remove INSN_MIPS16.
* mips-opc.c (I16): Remove.
(mips_builtin_op): Reclassify jalx.
|
|
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
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bfd/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE
(elf_fake_sections): Likewise.
* elf32-i370.c (i370_elf_section_from_shdr): Don't handle
SHF_EXCLUDE here.
* elf32-ppc.c (ppc_elf_fake_sections): Likewise.
binutils/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a
generic flag.
binutils/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for
ELF targets.
* binutils-all/exclude-1.s: New.
* binutils-all/exclude-1a.d: Likewise.
* binutils-all/exclude-1b.d: Likewise.
gas/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE.
(obj_elf_parse_section_letters): Likewise.
(obj_elf_section_word): Likewise.
* config/tc-ppc.c (ppc_section_letter): Removed.
(ppc_section_word): Likewise.
* config/tc-ppc.h (ppc_section_letter): Likewise.
(ppc_section_word): Likewise.
(md_elf_section_letter): Likewise.
(md_elf_section_word): Likewise.
* doc/as.texinfo: Document `e' and `#exclude'.
gas/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* gas/elf/elf.exp: Run section8.
* gas/elf/section8.d: New.
* gas/elf/section8.s: Likewise.
include/elf/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* common.h (SHF_EXCLUDE): New.
* i370.h (SHF_EXCLUDE): Removed.
* or32.h (SHF_EXCLUDE): Likewise.
* ppc.h (SHF_EXCLUDE): Likewise.
* sparc.h (SHF_EXCLUDE): Likewise.
ld/testsuite/
2010-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11600
* ld-elf/exclude3.s: New.
* ld-elf/exclude3a.d: Likewise.
* ld-elf/exclude3b.d: Likewise.
* ld-elf/exclude3c.d: Likewise.
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2010-05-17 Tristan Gingold <gingold@adacore.com>
* vms-alpha.c: Include esgps.h and eidc.h.
(_bfd_vms_slurp_egsd): Ignore SPSC and IDC sub-records.
(evax_bfd_print_egsd_flags): New function, extracted from ...
(evax_bfd_print_egsd): ..., calls evax_bfd_print_egsd_flags. Handles
EGSD__C_SPSC and EGSD__C_IDC.
include/vms:
2010-05-17 Tristan Gingold <gingold@adacore.com>
* eidc.h: New file.
* esgps.h: New file.
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2010-05-03 Tristan Gingold <gingold@adacore.com>
* vms-alpha.c: Add comments.
(struct vms_private_data_struct): Remove image_autoextend field.
(dst_check_allocation): Removed.
(image_write): Remove call to dst_check_allocation.
(vms_slurp_debug): Do not set image_autoextend. Adjust section
size.
(_bfd_vms_slurp_object_records): Remove useless new_type variable.
(alpha_vms_write_exec): Use dst_section to get the dst section.
Write the dmt section.
(evax_bfd_print_image): Also print the dst size in hexa. Fix typo.
(alpha_vms_read_sections_content): Do not set image_autoextend.
include/vms/
2010-05-03 Tristan Gingold <gingold@adacore.com>
* dmt.h: Improve comments.
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2010-04-30 Tristan Gingold <gingold@adacore.com>
* vms-lib.c (vms_read_block): New function.
(vms_traverse_index): Use vms_read_block. Handle long key names.
include/vms/
2010-04-30 Tristan Gingold <gingold@adacore.com>
* lbr.h (struct vms_kbn): New structure.
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2010-04-30 Tristan Gingold <gingold@adacore.com>
* vms-lib.c (struct lib_tdata): Field artdata added, fields nbr_syms
and syms removed.
(struct carsym_mem): New structure.
(vms_add_index): New function.
(vms_add_indexes_from_list): New function.
(vms_traverse_index): Parameter carsym changed to carsym_mem.
Code adjusted to handle elfidx.
(vms_lib_read_index): Adjusted for vms_traverse_index changes.
Parameter NBREL is now a pointer.
(_bfd_vms_lib_archive_p): Adjust for above change. Handle ia64
archives.
(_bfd_vms_lib_mkarchive): Adjusted for changes in struct lib_tdata.
(_bfd_vms_lib_find_symbol): Ditto.
(vms_lib_bopen): Fix two typos: return FALSE in case of error,
check MHD id.
* vms-alpha.c (alpha_vms_link_add_archive_symbols): Adjust for
changes of _bfd_vms_lib_find_symbol.
include/vms
2010-04-30 Tristan Gingold <gingold@adacore.com>
* lbr.h (LBR__C_TYP_ISHSTB): Added.
(LHD_SANEID4): Renamed to ...
(LHD_SANEID6): ... this.
(LBR_MAJORID, LBR_ELFMAJORID): New macros.
(struct vms_rfa): New structure.
(struct vms_idxdef): Renamed to ...
(struct vms_idx): ... this.
(struct vms_idxdef2): Renamed to ...
(struct vms_elfidx): ... this.
(ELFIDX__WEAK, ELFIDX__GROUP, ELFIDX__LISTRFA, ELFIDX__SYMESC): New
macros.
(struct vms_lhs, struct vms_lns): New structures.
(struct vms_mhd): Add missing fields.
(MHD__C_MHDLEN): New macro.
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* internal.h (ELF_SECTION_SIZE): Protect macro args with parentheses.
Invert logic to clarify test for .tbss.
(ELF_IS_SECTION_IN_SEGMENT): Rename to..
(ELF_SECTION_IN_SEGMENT_1): ..this. Add check_vma param. Protect
macro args with parentheses.
(ELF_SECTION_IN_SEGMENT): Define.
(ELF_IS_SECTION_IN_SEGMENT_FILE): Delete.
(ELF_IS_SECTION_IN_SEGMENT_MEMORY): Delete.
bfd/
* elf.c: Replace use of ELF_IS_SECTION_IN_SEGMENT and
ELF_IS_SECTION_IN_SEGMENT_FILE with ELF_SECTION_IN_SEGMENT
throughout file.
(assign_file_positions_for_load_sections): Modify section in
segment warning to ignore overlay vmas.
* elf32-spu.c (spu_elf_object_p): Replace use of
ELF_IS_SECTION_IN_SEGMENT_MEMORY with ELF_SECTION_IN_SEGMENT.
binutils/
* readelf.c (process_program_headers): Replace use of
ELF_IS_SECTION_IN_SEGMENT_MEMORY with ELF_SECTION_IN_SEGMENT.
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* gas/tic6x/insns-c674x.s, gas/tic6x/insns-c674x.d: Also test
"b .S2 b3".
include/opcode:
* tic6x-insn-formats.h (s_branch): Correct typo in bitmask.
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output.
* ld/testsuite/ld-arm/attr-merge-3.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likeiwse.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* binutils/readelf.c (arm_attr_tag_FP_arch): Rename from arm_attr_tag_VFP_arch.
(arm_attr_tag_ABI_align8_needed): Remove.
(arm_attr_tag_ABI_align8_preserved): Remove.
(arm_attr_tag_ABI_HardFP_use): Update text strings.
(arm_attr_public_tags): Add strings for ABI v2.08 attribute tags.
(display_arm_attribute): Add decoding of ABI v2.08 attributes.
* include/elf/arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension): Add new ABI attribute tags.
* gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add support for
new tag names in v2.08 of ARM ABI.
* gas/doc/c-arm.texi: Document new tag names in ABI.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for new attribute tag names.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-names.d: Add test to make sure all attribute names
are recognised.
* gas/testsuite/gas/arm/attr-names.s: Likewise.
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The PARAMS macro is no longer useful, so drop it from the sim includes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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