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2001-03-18Fix a typo.H.J. Lu1-1/+1
2001-03-14merge from gccDJ Delorie1-0/+12
2001-03-14Fix minor formatting bugs.DJ Delorie1-10/+10
2001-03-14Synchronise with copyright dates on FSF GCC versions of these filesNick Clifton8-7/+14
2001-03-14formatting fixNick Clifton1-23/+24
2001-03-14Fix typos in ChangeLogs; add coff/external.h; fix copyright datesNick Clifton144-4497/+2357
2001-03-10merge from gccDJ Delorie2-0/+9
2001-03-06merge from gccDJ Delorie2-0/+19
2001-03-02merge from gccDJ Delorie2-2/+7
2001-02-28new defines for Coldfire V4.Nick Clifton2-2/+9
2001-02-282001-02-27 Philip Blundell <pb@futuretv.com>Phil Blundell2-19/+35
* arm.h: Add new definitions from ARM document SWS ESPC 0003 B-01. (EF_PIC, et al.): Rename to EF_ARM_xx.
2001-02-18Add PDP-11 supportNick Clifton4-4/+91
2001-02-13* include/coff/pe.h: Rename PEP64AOUTHDR to PEPAOUTHDR. RenameDJ Delorie2-2/+7
PEP64AOUTSZ to PEPAOUTSZ.
2001-02-12 * i386.h (i386_optab): SSE integer converison instructions haveJan Hubicka2-6/+11
64bit versions on x86-64. * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison instructions. (putop): Handle 'Y'
2001-02-10Remove annoying entry....:-)Nick Clifton1-5/+0
2001-02-10Remove extraneous whitespaceNick Clifton2-12/+18
2001-02-10Add s390 supportNick Clifton7-0/+221
2001-02-062001-01-23 H.J. Lu <hjl@gnu.org>H.J. Lu2-0/+44
* include/coff/pe.h (struct external_PEI_DOS_hdr): New. (struct external_PEI_IMAGE_hdr): New.
2001-02-02 Binutils portion of fix for syntax array elements when maxPatrick Macdonald2-9/+11
operands is greater than 127. 2001-02-02 Patrick Macdonald <patrickm@redhat.com> * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short. (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES. (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS. * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS. * m32r-desc.h: Regenerate.
2001-02-02merge from gccDJ Delorie1-1/+4
2001-01-24Fix swapgs instruction.Alan Modra2-3/+7
2001-01-14Adds assembly and dis-assembly support for the HPPA wideAlan Modra2-21/+35
mode, 16 bit forms of ldi, ldo, ldw and stw instructions.
2001-01-13 * i386.c (md_assemble): Check cpu_flags even for nullary instructions.Jan Hubicka2-3/+9
* i386.h (i386_optab): Fix pusha and ret templates. * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates.
2001-01-11Updated ARC assembler from arccores.comNick Clifton7-117/+180
2001-01-10 * i386.h (pinsrw): Add.Jan Hubicka2-4/+12
(pshufw): Remove. (cvttpd2dq): Fix operands. (cvttps2dq): Likewise. (movq2q): Rename to movdq2q.
2001-01-10Fix "movnti"Alan Modra2-6/+10
2001-01-09Update address for bug reports.Phil Blundell2-1/+5
2001-01-092001-01-09 Jeff Johnston <jjohnstn@redhat.com>Jeff Johnston2-3/+15
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number of operands (unsigned char or unsigned short). (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE. (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
2001-01-05 * tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.Jan Hubicka2-5/+9
* i386.h (i386_optab): Make [sml]fence template to use immext field.
2001-01-03 * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,Jan Hubicka2-4/+173
CpuUnknown): Renumber (CpuP4, CpuSSE2): New. (CpuUnknownFlags): Add CpuP4 and CpuSSE2 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions introduced by Pentium4
2000-12-30 * configure.in: Add support for x86_64 and x86_64-*-linux-gnu*Jan Hubicka2-272/+452
* NEWS: Add x86_64. * i386.h (i386_optab): Add "rex*" instructions; add swapgs; disable jmp/call far direct instructions for 64bit mode; add syscall and sysret; disable registers for 0xc6 template. Add 'q' suffixes to extendable instructions, disable obsoletted instructions, add new sign/zero extension ones. (i386_regtab): Add extended registers. (*Suf): Add No_qSuf. (q_Suf, wlq_Suf, bwlq_Suf): New.
2000-12-20 * tc-i386.h (i386_target_format): Define even for ELFs.Jan Hubicka2-107/+112
(QWORD_MNEM_SUFFIX): New macro. (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): New macros (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, ImmExt): Renumber. (Size64, No_qSuf, NoRex64, Rex64): New macros. (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber. (Reg, WordReg): Add Reg64. (Imm): Add Imm32S and Imm64. (EncImm): New. (Disp): Add Disp64 and Disp32S. (AnyMem): Add Disp32S. (RegRex, RegRex64): New macros. (rex_byte): New type. * tc-i386.c (set_16bit_code_flag): Kill. (fits_in_unsigned_long, fits_in_signed_long): New functions. (reloc): New parameter "signed"; support x86_64. (set_code_flag): New. (DEFAULT_ARCH): New macro; default to "i386". (default_arch): New static variable. (struct _i386_insn): New fields Operand_PCrel; rex. (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT"; (flag_code): New enum and static variable. (use_rela_relocations): New static variable. (flag_code_names): New static variable. (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to K6 and Athlon. (i386_align_code): Return plain "nop" for x86_64. (mode_from_disp_size): Support Disp32S. (smallest_imm_type): Support Imm32S and Imm64. (offset_in_range): Support size of 8. (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. (md_pseudo_table): Add "code64"; use set_code_flat. (md_begin): Emit sane error message on hash failure. (tc_i386_fix_adjustable): Support x86_64 relocations. (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, instructions supported on particular arch just partially, output of 64bit immediates, handling of Imm32S and Disp32S type. (i386_immedaite): Support x86_64 relocations; support 64bit constants. (i386_displacement): Likewise. (i386_index_check): Cleanup; support 64bit addresses. (md_apply_fix3): Support x86_64 relocation and rela. (md_longopts): Add "32" and "64". (md_parse_option): Add OPTION_32 and OPTION_64. (i386_target_format): Call even for ELFs; choose between elf64-x86-64 and elf32-i386. (i386_validate_fix): Refuse GOTOFF in 64bit mode. (tc_gen_reloc): Support rela relocations and x86_64. (intel_e09_1): Support QWORD. * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field.
2000-12-19* COPYING: Update to currentDJ Delorie2-3/+9
ftp://ftp.gnu.org/pub/gnu/Licenses/COPYING-2.0 (fixes references to 19yy as example year in copyright notice).
2000-12-18 * dis-asm.h (struct disassemble_info): New member "section".Hans-Peter Nilsson2-0/+13
(INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize private_data member. Initialize section member.
2000-12-17fix formattingDJ Delorie1-4/+4
2000-12-17* safe-ctype.h: Make code work on all targets and not just onDJ Delorie2-8/+8
targets where a char is 8 bits.
2000-12-12Add link option to allow undefiedn symbols in shared librariesNick Clifton2-0/+20
2000-12-12Fix Formatting.Nick Clifton4-7/+14
2000-12-11 * hppa.h (DT_HP_*): Define relative to OLD_DT_LOOS for hpuxJeff Law2-13/+21
compatibility.
2000-12-11 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka1-76/+60
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
2000-12-11Replace #warning with #errorAlan Modra2-2/+6
2000-12-08Actually add safe-ctype.hChristopher Faylor1-0/+105
2000-12-08* safe-ctype.h: New file.Christopher Faylor1-0/+4
2000-12-07#warn -> #warningAlan Modra2-1/+5
2000-12-07* getopt.h obstack.h: Standarize copyright statement.DJ Delorie3-2/+8
2000-12-05* demangle.h: Change "new_abi" to "v3" everywhere.DJ Delorie2-7/+11
2000-12-02Add MIPS SB1 machineNick Clifton4-2/+8
2000-12-02Add MIPS V and MIPS 64 machine numbersNick Clifton4-0/+16
2000-12-01Add MIPS32 as a seperate MIPS architectureNick Clifton4-253/+278
2000-12-01Improve MIPS32 supportNick Clifton2-20/+35
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