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2000-12-12Add link option to allow undefiedn symbols in shared librariesNick Clifton2-0/+20
2000-12-12Fix Formatting.Nick Clifton4-7/+14
2000-12-11 * hppa.h (DT_HP_*): Define relative to OLD_DT_LOOS for hpuxJeff Law2-13/+21
compatibility.
2000-12-11 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intelJan Hubicka1-76/+60
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX references. (intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse otherwise. * tc-i386.h (DWORD_MNEM_SUFFIX): Kill. (No_dSuf): Kill. * i386.h (*_Suf): Remove No_dSuf. (d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP) Remove. (i386_optab): Remove 'd' in the suffixes.
2000-12-11Replace #warning with #errorAlan Modra2-2/+6
2000-12-08Actually add safe-ctype.hChristopher Faylor1-0/+105
2000-12-08* safe-ctype.h: New file.Christopher Faylor1-0/+4
2000-12-07#warn -> #warningAlan Modra2-1/+5
2000-12-07* getopt.h obstack.h: Standarize copyright statement.DJ Delorie3-2/+8
2000-12-05* demangle.h: Change "new_abi" to "v3" everywhere.DJ Delorie2-7/+11
2000-12-02Add MIPS SB1 machineNick Clifton4-2/+8
2000-12-02Add MIPS V and MIPS 64 machine numbersNick Clifton4-0/+16
2000-12-01Add MIPS32 as a seperate MIPS architectureNick Clifton4-253/+278
2000-12-01Improve MIPS32 supportNick Clifton2-20/+35
2000-11-30Add x86-64 support files.Nick Clifton3-0/+52
2000-11-29* libiberty.h: Move #includes to top. Prototype xmalloc_failed.DJ Delorie2-6/+14
2000-11-27 * common.h (e_machine numbers): Clarify comments to describe howHans-Peter Nilsson2-6/+20
EM_* constants are assigned. Move EM_PJ from official section to ad-hoc section. (EM_CRIS): Correct comment to match official description. (EM_MMIX): Ditto.
2000-11-22Add new ELF ABI definesNick Clifton2-31/+61
2000-11-202000-11-20 H.J. Lu <hjl@gnu.org>H.J. Lu2-1/+6
* common.h (ELFOSABI_MONTEREY): Renamed to ... (ELFOSABI_AIX): This.
2000-11-16 Update relocations per August psABI docs.Richard Henderson2-60/+81
* ia64.h (R_IA64_SEGBASE): Remove. (R_IA64_LTV*): Renumber to 0x74 to 0x77. (R_IA64_EPLTMSB, R_IA64_EPLTLSB): Remove. (R_IA64_TPREL14, R_IA64_TPREL64I): New. (R_IA64_DTPMOD*): New. (R_IA64_DTPREL*): New.
2000-11-15Correct date and style of last entryHans-Peter Nilsson1-1/+1
2000-11-15 * demangle.h: Add gnat and java demangle styles.Hans-Peter Nilsson2-2/+13
2000-11-04 * hashtab.h (struct htab): Add member return_allocation_failure.Hans-Peter Nilsson2-0/+16
(htab_try_create): New prototype. Mention which functions may return NULL when this is used.
2000-11-03 * hashtab.h: Change void * to PTR where necessary.Hans-Peter Nilsson2-5/+9
2000-10-20gas/Jakub Jelinek2-2/+9
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p instructions to loose any special insn->architecture mask. * config/tc-sparc.c (v9a_asr_table): Add v9b ASRs. (sparc_md_end, sparc_arch_types, sparc_arch, sparc_elf_final_processing): Handle v8plusb and v9b architectures. (sparc_ip): Handle siam mode operands. Support v9b ASRs (and request v9b architecture if they are used). bfd/ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data, elf32_sparc_object_p, elf32_sparc_final_write_processing): Support v8plusb. * elf64-sparc.c (sparc64_elf_merge_private_bfd_data, sparc64_elf_object_p): Support v9b. * archures.c: Declare v8plusb and v9b machines. * bfd-in2.h: Ditto. * cpu-sparc.c: Ditto. include/opcode/ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. Note that '3' is used for siam operand. opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. (compute_arch_mask): Add v8plusb and v9b machines. (print_insn_sparc): siam mode decoding, accept ASRs up to 25. * opcodes/sparc-opc.c: Support for Cheetah instruction set. (prefetch_table): Add #invalidate.
2000-10-12merge from gcc repositoryDJ Delorie2-1/+11
2000-09-29Correct date of checkinHans-Peter Nilsson1-1/+1
2000-09-29 * dis-asm.h: Declare cris_get_disassembler, not print_insn_cris.Hans-Peter Nilsson2-2/+7
Fix typo in comment.
2000-09-29 * cris.h (EF_CRIS_UNDERSCORE): New.Hans-Peter Nilsson2-0/+7
2000-09-28Add alloca-conf.h from libiberty.Alan Modra2-0/+28
2000-09-27.plt stub for lazy linking, --stub-group-size=N ld switch,Alan Modra2-0/+7
import stub fix, extra DIR14F reloc to fix abort in tc_gen_reloc
2000-09-22Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.Jim Wilson2-1/+7
gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-09-14* sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2-9/+20
R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change numbers to the range from 160 to 167. (R_SH_FIRST_INVALID_RELOC): Adjust. (R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2): New relocs to fill in the gap.
2000-09-14Add support for the MIPS32Nick Clifton4-18/+65
2000-09-08* dyn-string.h: Adjust formatting.Christopher Faylor2-4/+9
(dyn_string_insert_char): New macro. New declaration.
2000-09-08* md5.h (md5_uint32): Choose via INT_MAX instead of UINT_MAX.Christopher Faylor2-0/+150
* md5.h: New file.
2000-09-05doco addition.Alan Modra2-1/+7
2000-09-05Add some reloc types.Alan Modra2-1/+14
2000-09-03Add ARRAY_SIZE macro from egcs versionNick Clifton2-0/+6
2000-09-03Fix formatting, add copyright noticeNick Clifton2-46/+66
2000-09-02* sh.h (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT,Alexandre Oliva2-1/+15
R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): New relocs. (R_SH_FIRST_INVALID_RELOC): Adjust.
2000-08-16Fix 3 DV bugs, and a few minor cleanups.Jim Wilson2-1/+6
gas/ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle postincrement modified registers. Handle IA64_OPND_R3_2 addl source registers. (note_register_values): Handle IA64_OPND_R3_2 operands. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc. * gas/ia64/dv-raw-err.l: Likewise. * gas/ia64/dv-waw-err.l: Update sed pattern. * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. include/opcode/ * ia64.h (IA64_OPCODE_POSTINC): New. opcodes/ * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete break, mov-immediate, nop. * ia64-opc-f.c: Delete fpsub instructions. * ia64-opc-m.c: Add POSTINC to all instructions with postincrement address operand. Rewrite using macros to avoid long lines. * ia64-opc.h (POSTINC): Define. * ia64-asmtab.c: Regenerate.
2000-08-162000-08-15 H.J. Lu <hjl@gnu.org>H.J. Lu2-2/+7
* i386.h: Swap the Intel syntax "movsx"/"movzx" due to the IgnoreSize change.
2000-08-14Add support for IA-64 specific elf header flags.Jim Wilson2-1/+13
bfd/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP. (elf64_ia64_print_private_bfd_data): Likewise. Also handle EF_IA_64_ABSOLUTE. gas/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic. (md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC. (md_begin): Change assignment to md.flag to OR in the new bit. include/elf/ 2000-08-14 Jim Wilson <wilson@cygnus.com> * elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
2000-08-09gas:Jason Eckhardt2-29/+33
2000-08-08 Jason Eckhardt <jle@cygnus.com> * config/tc-i860.h: Rework completely for BFD_ASSEMBLER. (i860_fix_info): New enum. (MD_APPLY_FIX3): Define. (WORKING_DOT_WORD): Define. (TC_HANDLES_FX_DONE): Define. (DIFF_EXPR_OK): Define. (LISTING_HEADER): Define. (TARGET_FORMAT): Select target format based on endian flag. (TARGET_BYTES_BIG_ENDIAN): Default to little endian. (target_big_endian): Add external declaration. * config/tc-i860.c: All existing code reworked completely. Other new code shown below. (SYNTAX_SVR4): Define. (target_warn_expand): New variable. (md_shortopts): Declare and define (-Qy, -Qn, and -V options). (md_longopts): Declare and define with new options (-EL, -EB, and -mwarn-expand). (md_show_usage): New function. (md_operand): New function. (obtain_reloc_for_imm16): New function. (md_apply_fix3): New function. (tc_gen_reloc): New function. include: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * opcode/i860.h: Small formatting adjustments. opcode: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * i860-dis.c (print_br_address): Change third argument from int to long. bfd: 2000-08-08 Jason Eckhardt <jle@cygnus.com> * elf32-i860.c (elf32_i860_howto_table): Updated some fields.
2000-08-07Remove spurious CYGNUS LOCAL commentsNick Clifton3-8/+10
2000-08-06 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.Denis Chertykov2-24/+79
Move related opcodes closer to each other. Minor changes in comments, list undefined opcodes.
2000-07-29Fix formattingNick Clifton2-73/+90
Add copyright notice
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+28
* opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * dis-asm.h (print_insn_i860): Add prototype.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt3-300/+373
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
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