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* i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
with Size16|IgnoreSize or Size32|IgnoreSize.
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* i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
(REPE): Rename to REPE_PREFIX_OPCODE.
(i386_regtab_end): Remove.
(i386_prefixtab, i386_prefixtab_end): Remove.
(i386_optab): Use NULL as sentinel rather than "" to suit rewrite
of md_begin.
(MAX_OPCODE_SIZE): Define.
(i386_optab_end): Remove.
(sl_Suf): Define.
(sl_FP): Use sl_Suf.
* i386.h (i386_optab): Allow 16 bit displacement for `mov
mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
data32, dword, and adword prefixes.
(i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
regs.
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* i386.h (i386_regtab): Remove BaseIndex modifier from esp.
* i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
register operands, because this is a common idiom. Flag them with
a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
fdivrp because gcc erroneously generates them. Also flag with a
warning.
* i386.h: Add suffix modifiers to most insns, and tighter operand
checks in some cases. Fix a number of UnixWare compatibility
issues with float insns. Merge some floating point opcodes, using
new FloatMF modifier.
(WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
consistency.
* i386.h: Change occurence of ShortformW to W|ShortForm. Add
IgnoreDataSize where appropriate.
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* i386.h: (one_byte_segment_defaults): Remove.
(two_byte_segment_defaults): Remove.
(i386_regtab): Add BaseIndex to 32 bit regs reg_type.
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Rename from 64 bit versions, update members to be 32 bits.
(bfd_dvp_elf32_swap_overlay_in,bfd_dvp_elf32_swap_overlay_out):
Rename from 64 bit versions.
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(SHNAME_DVP_OVERLAY_{TABLE,STRTAB,PREFIX}): Section names.
(Elf64_Dvp_Internal_Overlay,Elf64_Dvp_External_Overlay): New types.
(bfd_dvp_elf64_swap_overlay_in,bfd_dvp_elf64_swap_overlay_out):
Declare.
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(cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
(cgen_asm_record_register,cgen_asm_finish_insn): Delete.
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(cgen_asm_finish_insn): Update prototype.
(cgen_insn): New members num, data.
(CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
dis_hash, dis_hash_table_size moved to ...
(CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
All uses updated. New members asm_hash_p, dis_hash_p.
(CGEN_MINSN_EXPANSION): New struct.
(cgen_expand_macro_insn): Declare.
(cgen_macro_insn_count): Declare.
(get_insn_operands): Update prototype.
(lookup_get_insn_operands): Declare.
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* i386.h (i386_optab): Change iclrKludge and imulKludge to
regKludge. Add operands types for string instructions.
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for `gettext'.
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(vif_macros,vif_macro_count): Declare.
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* i386.h: Remove NoModrm flag from all insns: it's never checked.
Add IsString flag to string instructions.
(IS_STRING): Don't define.
(LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
(ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
(SS_PREFIX_OPCODE): Define.
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* i386.h (i386_optab): Change second operand constraint of `mov
sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
allow legal instructions such as `movl %gs,%esi'
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(vif_unpack_len_value): Update prototype.
(vif_get_var_data,vif_get_wl_cl): Add prototypes.
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* i386.h: Set LinearAddress for lidt and lgdt.
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(DVP_OPERAND_VU_ADDRESS): New macro.
(DVP_OPERAND_*): Renumber.
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(vif_insn_len): Update prototype.
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(cgen_insn): Record syntax and format entries here, rather than
separately.
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(gif_type): New type.
(gif_nloop,gif_nregs,gif_operand_nloop): Declare.
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(DVP_OPERAND_AUTOCOUNT): New modifier.
(dma_operand_{count,addr}): Declare.
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DVP_OPERAND_DMA_PTR_AUTOCOUNT into two.
(dma_operand_{count,addr}): Declare.
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(cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
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return actual size of register, 0 if not applicable, -1 of legacy
implementation.
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* dvp.h (VU_FLAG_[IEMDT]): New macros.
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* d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.
* d10v-dis.c (print_operand): Likewise.
include/opcode:
* d10v.h (OPERAND_ACC): Split into:
(OPERAND_ACC0, OPERAND_ACC1) .
(OPERAND_GPR): Define.
gas/config:
* tc-d10v.c (parallel_ok, find_opcode):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.
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(CGEN_HW_ENTRY): New member `type'.
(hw_list): Delete decl.
(enum cgen_mode): Declare.
(CGEN_OPERAND): New member `hw'.
(enum cgen_operand_instance_type): Declare.
(CGEN_OPERAND_INSTANCE): New type.
(CGEN_INSN): New member `operands'.
(CGEN_OPCODE_DATA): Make hw_list const.
(get_insn_operands,lookup_insn): Add prototypes for.
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(CGEN_HW_ENTRY): Move `next' entry to end of struct.
(CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
(CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
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