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2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang2-0/+5
2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11[AArch64][4/8] Add R_AARCH64_P32_TLSLD_ADD_LO12_NC in elf headerJiong Wang2-0/+5
2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define.
2015-08-11[AArch64][1/8] Add R_AARCH64_P32_TLSLD_ADR_PAGE21 in elf headerJiong Wang2-0/+5
2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define.
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu4-49/+49
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab2-4/+11
2015-07-20 Matthew Wahab <matthew.wahab@arm.com> gas/ * NEWS: Mention corrected spelling of armv6kz. * config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with ARM_ARCH_V6KZ. (arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2". * doc/c-arm.texi: Replace "armv6zk" with "armv6kz". gas/testsuite * gas/arm/attr-march-armv6kz.d: New. * gas/arm/attr-march-armv6kzt2.d: New. include/opcode * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ. (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2. (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ. (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
2015-07-16[AArch64][1/3] Add R_AARCH64_P32_TLSLD_ADR_PREL21 in elf headerJiong Wang2-0/+5
2015-07-14Sync longlong.h with GCCH.J. Lu2-0/+11
Sync with GCC 2014-10-28 Richard Henderson <rth@redhat.com> * longlong.h [__alpha] (umul_ppmm): Disable for c++.
2015-07-14Sync hashtab.h, splay-tree.h with GCCH.J. Lu3-19/+18
Sync with GCC 2014-12-09 Trevor Saunders <tsaunders@mozilla.com> * hashtab.h, splay-tree.h: Remove GTY markers.
2015-07-14Remove trailing spaces in demangle.hH.J. Lu1-3/+3
2015-07-14Sync ansidecl.h with GCCH.J. Lu2-0/+17
Sync with GCC 2015-03-02 Markus Trippelsdorf <markus@trippelsdorf.de> PR target/65261 * ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro.
2015-07-092015-07-09 Catherine Moore <clm@codesourcery.com>Catherine Moore2-0/+8
include/ * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. gas/ * config/tc-mips.c (check_fpabi): Handle VAL_GNU_MIPS_ABI_FP_NAN2008. binutils/ * readelf.c (print_mips_fp_abi_value): Handle Val_GNU_MIPS_ABI_FP_NAN2008. ld/testsuite/ * ld-mips-elf/attr-gnu-4-08.d: Update expected output. * ld-mips-elf/attr-gnu-4-09.d: New. * ld-mips-elf/attr-gnu-4-19.d: New. * ld-mips-elf/attr-gnu-4-29.d: New. * ld-mips-elf/attr-gnu-4-39.d: New. * ld-mips-elf/attr-gnu-4-49.d: New. * ld-mips-elf/attr-gnu-4-59.d: New. * ld-mips-elf/attr-gnu-4-69.d: New. * ld-mips-elf/attr-gnu-4-79.d: New. * ld-mips-elf/attr-gnu-4-89.d: New. * ld-mips-elf/attr-gnu-4-9.s: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov2-0/+5
When generating relocation (tc_gen_reloc) 32 bit relocation fixup is changed to new 32 bit PC relative relocation if the fixup has pc-relative flag set. bfd/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf32-avr.c: Add 32 bit PC relative relocation for AVR target. gas/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to 32 bit PC relative and update offset if the fixup is pc-relative. * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff relocs. gas/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc. * gas/avr/per-function-debugline.s: New test source. include/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf/avr.h: Add new 32 bit PC relative relocation. ld/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * ld-avr/gc-section-debugline.d: New test. * ld-avr/per-function-debugline.s: Source for new test.
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra2-0/+13
Back in the day support for these processors was added, we probably didn't want to waste PPC_OPCODE bits on minor variations. I've had a complaint that disassembly of mfspr/mtspr was wrong for power8. This patch fixes that problem. Note that since -m860/-m850/-m821 are new gas options enabling the mpc8xx specific mfspr/mtspr variants it is possible that this change will break some mpc8xx assembly code. ie. you might need to modify makefiles to pass -m860 to gas. include/opcode/ * ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. opcodes/ * ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*. * ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries. Add PPC_OPCODE_7450 to 7450 entry. Add PPC_OPCODE_750 to 750cl entry. gas/ * config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860. * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-01Opcodes and assembler support for Nios II R2Sandra Loosemore3-4/+1174
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> gas/ * config/tc-nios2.c (nios2_min_align): New. (nop): Replace with.... (nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New. (nios2_align): Handle alignment on 2-byte boundaries when CDX instructions may be present. (s_nios2_align): Adjust reference to nop. (CDXBRANCH, IS_CDXBRANCH): New. (CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New. (nios2_relax_subtype_size): Handle 2-byte CDX branches. (nios2_relax_frag): Likewise. (md_convert_frag): Handle R2 encodings. (nios2_check_overflow): Check that low-order bits are zero before applying rightshift from howto. (nios2_check_overflow): Correct negative overflow calculation. (nios2_diagnose_overflow): Handle signed_immed12_overflow. Issue generic overflow messages for miscellaneous instruction formats. (md_apply_fix): Recognize new R2 relocations. For pc_relative relocations, store fixup in *valP. (nios2_reglist_mask, nios2_reglist_dir): New. (nios2_parse_reglist): New. (nios2_parse_base_register): New. (nios2_assemble_expression): Handle constant expressions designated by BFD_RELOC_NONE. (nios2_assemble_reg3): New. (nios2_assemble_arg_c): Handle R2 instruction formats. (nios2_assemble_arg_d): Likewise. (nios2_assemble_arg_s): Likewise. (nios2_assemble_arg_t): Likewise. (nios2_assemble_arg_D): New. (nios2_assemble_arg_S): New. (nios2_assemble_arg_T): New. (nios2_assemble_arg_i): Handle R2 instruction formats. (nios2_assemble_arg_I): New. (nios2_assemble_arg_u): Handle R2 instruction formats. (nios2_assemble_arg_U): New. (nios2_assemble_arg_V): New. (nios2_assemble_arg_W): New. (nios2_assemble_arg_X): New. (nios2_assemble_arg_Y): New. (nios2_assemble_arg_o): Handle R2 instruction formats. (nios2_assemble_arg_O): New. (nios2_assemble_arg_P): New. (nios2_assemble_arg_j): Handle R2 instruction formats. (nios2_assemble_arg_k): New. (nios2_assemble_arg_l): Handle R2 instruction formats. (nios2_assemble_arg_m): Likewise. (nios2_assemble_arg_M): New. (nios2_assemble_arg_N): New. (nios2_assemble_arg_e): New. (nios2_assemble_arg_f): New. (nios2_assemble_arg_g): New. (nios2_assemble_arg_h): New. (nios2_assemble_arg_R): New. (nios2_assemble_arg_B): New. (nios2_assemble_args): Handle new argument letters. (nios2_consume_arg): Likewise. (nios2_translate_pseudo_insn): Avoid dereferencing null pointer in error message. (nios2_ps_insn_info_structs): Add nop.n. (output_ubranch): Handle CDX branches. (output_cbranch): Likewise. (output_call): Handle R2 encodings. (output_movia): Likewise. (md_begin): Initialize nios2_min_align. (md_assemble): Align to nios2_min_align. Adjust nios2_min_align if a 16-bit instruction is seen. (nios2_cons_align): Use appropriate nop pattern. include/opcode/ * nios2.h (enum iw_format_type): Add R2 formats. (enum overflow_type): Add signed_immed12_overflow and enumeration_overflow for R2. (struct nios2_opcode): Document new argument letters for R2. (REG_3BIT, REG_LDWM, REG_POP): Define. (includes): Include nios2r2.h. (nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): Declare. * nios2r2.h: New file. opcodes/ * nios2-dis.c (nios2_extract_opcode): New. (nios2_disassembler_state): New. (nios2_find_opcode_hash): Use mach parameter to select correct disassembler state. (nios2_print_insn_arg): Extend to support new R2 argument letters and formats. (print_insn_nios2): Check for 16-bit instruction at end of memory. * nios2-opc.c (nios2_builtin_regs): Add R2 register attributes. (NIOS2_NUM_OPCODES): Rename to... (NIOS2_NUM_R1_OPCODES): This. (nios2_r2_opcodes): New. (NIOS2_NUM_R2_OPCODES): New. (nios2_num_r2_opcodes): New. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): New.
2015-07-01Relocations for Nios II R2Sandra Loosemore2-1/+38
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> bfd/ * bfd-in2.h: Regenerated. * elf32-nios2.c (elf_nios2_howto_table_rel): Rename to... (elf_nios2_r1_howto_table_rel): This. (elf_nios2_r2_howto_table_rel): New. (BFD_IS_R2): New. (lookup_howto): Add ABFD parameter. Adjust to look up in either the R1 or R2 relocation table, as determined by ABFD. (nios2_reloc_map): Add R2 relocations. (nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto. Pass it the ABFD parameter. (nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to return an R1 or R2 relocation. (nios2_elf32_info_to_howto): Do lookup using lookup_howto. Pass it the ABFD parameter. (nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte boundary. (nios2_elf32_relocate_section): Adjust call to lookup_howto. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_NIOS2_R2_S12): New. (BFD_RELOC_NIOS2_R2_I10_1_PCREL): New. (BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New. (BFD_RELOC_NIOS2_R2_T1I7_2): New. (BFD_RELOC_NIOS2_R2_T2I4): New. (BFD_RELOC_NIOS2_R2_T2I4_1): New. (BFD_RELOC_NIOS2_R2_T2I4_2): New. (BFD_RELOC_NIOS2_R2_X1I7_2): New. (BFD_RELOC_NIOS2_R2_X2L5): New. (BFD_RELOC_NIOS2_R2_F1I5_2): New. (BFD_RELOC_NIOS2_R2_L5I4X1): New. (BFD_RELOC_NIOS2_R2_T1X1I6): New. (BFD_RELOC_NIOS2_R2_T1X1I6_2): New. include/elf/ * nios2.h (R_NIOS2_R2_S12): New. (R_NIOS2_R2_I10_1_PCREL): New. (R_NIOS2_R2_T1I7_1_PCREL): New. (R_NIOS2_R2_T1I7_2): New. (R_NIOS2_R2_T2I4): New. (R_NIOS2_R2_T2I4_1): New. (R_NIOS2_R2_T2I4_2): New. (R_NIOS2_R2_X1I7_2): New. (R_NIOS2_R2_X2L5): New. (R_NIOS2_R2_F1I5_2): New. (R_NIOS2_R2_L5I4X1): New. (R_NIOS2_R2_T1X1I6): New. (R_NIOS2_R2_T1X1I6_2): New. (R_NIOS2_ILLEGAL): Renumber.
2015-07-01Add Nios II arch flags and compatibility testsSandra Loosemore2-0/+10
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> bfd/ * archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New. * bfd-in2.h: Regenerated. * cpu-nios2.c (nios2_compatible): New. (N): Use nios2_compatible instead of bfd_default_compatible. (NIOS2R1_NEXT, NIOS2R2_NEXT): Define. (arch_info_struct): New. (bfd_nios2_arch): Chain to NIOS2R1_NEXT. * elf32-nios2.c (is_nios2_elf): New. (nios2_elf32_merge_private_bfd_data): New. (nios2_elf32_object_p): New. (bfd_elf32_bfd_merge_private_bfd_data): Define. (elf_backend_object_p): Define. gas/ * config/tc-nios2.c: Adjust includes. (OPTION_MARCH): Define. (md_longopts): Add -march option. (nios2_architecture): New. (nios2_use_arch): New. (md_parse_option): Handle OPTION_MARCH. (md_show_usage): Document -march. (md_begin): Set arch in BFD. (nios2_elf_final_processing): New. * config/tc-nios2.h (elf_tc_final_processing): Define. (nios2_elf_final_processing): New. * doc/c-nios2.texi (-march): Add documentation. include/elf/ * nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. ld/testsuite/ * ld-nios2/mixed1a.d: New. * ld-nios2/mixed1a.s: New. * ld-nios2/mixed1b.d: New. * ld-nios2/mixed1b.s: New. * ld-nios2/nios2.exp: Build the new compatibility tests.
2015-06-26Add support for DT_MIPS_RLD_MAP_REL.Matthew Fortune2-0/+7
This tag makes it possible to access the debug map when debugging position independent executables. bfd/ * elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Use executable instead of !shared to indicate an application vs shared library. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP_REL. (_bfd_mips_elf_get_target_dtag): Likewise. binutils/ * readelf.c (get_mips_dynamic_type): Handle DT_MIPS_RLD_MAP_REL. include/ * elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro. ld/testsuite/ * ld-mips-elf/pic-and-nonpic-3b.ad: Adjust for extra dynamic tag. * ld-mips-elf/pic-and-nonpic-4b.ad: Likewise. * ld-mips-elf/pic-and-nonpic-5b.ad: Likewise. * ld-mips-elf/pic-and-nonpic-6-n32.ad: Likewise. * ld-mips-elf/pic-and-nonpic-6-n64.ad: Likewise. * ld-mips-elf/pic-and-nonpic-6-o32.ad: Likewise. * ld-mips-elf/tlsdyn-o32-1.d: Likewise. * ld-mips-elf/tlsdyn-o32-1.got: Likewise. * ld-mips-elf/tlsdyn-o32-2.d: Likewise. * ld-mips-elf/tlsdyn-o32-2.got: Likewise. * ld-mips-elf/tlsdyn-o32-3.d: Likewise. * ld-mips-elf/tlsdyn-o32-3.got: Likewise. * ld-mips-elf/tlsdyn-o32.d: Likewise. * ld-mips-elf/tlsdyn-o32.got: Likewise. * ld-mips-elf/pie-n32.d: New file. * ld-mips-elf/pie-n64.d: Likewise. * ld-mips-elf/pie-o32.d: Likewise. * ld-mips-elf/pie.s: Likewise. * ld-mips-elf/mips-elf.exp: Add new tests.
2015-06-24Sync libiberty from GCC, replaying updates to configure scriptsIain Buclaw2-1/+6
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton2-0/+12
include * dis-asm.h (struct disassemble_info): Add stop_vma field. binuti * objdump.c (disassemble_bytes): Set the stop_vma field in the disassemble_info structure when disassembling code sections with -d. * doc/binutils.texi (objdump): Document the discrepancy between -d and -D. opcodes * dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the requested region lies beyond it. * bfin-dis.c (print_insn_bfin): Ignore sysop instructions when looking for 32-bit insns. * mcore-dis.c (print_insn_mcore): Disable stop_vma when reading data. * sh-dis.c (print_insn_sh): Likewise. * tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading blocks of instructions. * vax-dis.c (print_insn_vax): Check that the requested address does not clash with the stop_vma. tests * gas/arm/backslash-at.s: Add extra .byte directives so that the foo symbol does not appear to point half way through an instruction. * gas/arm/backslash-at.d: Update expected disassembly. * gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/ilp32/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner2-0/+18
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand with the value of either a 0 or 1. It also defines an extended mnemonic with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1". I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the problem is, optional operands that are ommitted always default to the value 0, which is wrong in this case. I have added support for allowing non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE that specifies that the default operand value to be used is stored in the SHIFT field of the operand field immediately following this one. This fixes the rfebb issue. I also fixed the mftb and mfcr instructions so they use the same mechanism. This allows us to flag invalid uses of mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd]. include/opcode/ * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. opcodes/ * ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value. * ppc-opc.c (FXM4): Add non-zero optional value. (TBR): Likewise. (SXL): Likewise. (insert_fxm): Handle new default operand value. (extract_fxm): Likewise. (insert_tbr): Likewise. (extract_tbr): Likewise. gas/ * config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value. Allow for optional operands without insert functions. gas/testsuite/ * gas/ppc/power8.d: Fixup rfebb test results. * gas/ppc/a2.s: Fix invalid mfcr test. * gas/ppc/a2.d: Likewise.
2015-06-17sim: callback: add human readable strings for debugging to mapsMike Frysinger2-0/+16
When tracing, we often want to display the human readable name for the various syscall/errno values. Rather than make each target duplicate the lookup, extend the existing maps to include the string directly, and add helper functions to look up the constants. While most targets are autogenerated (from libgloss), the bfin/cris targets have custom maps for the Linux ABI which need to be updated by hand.
2015-06-04[AArch64] Add support for ARMv8.1 command line optionMatthew Wahab2-0/+13
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab2-0/+25
2015-06-03 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-arm.c (arm_archs): Add "armv8.1-a". * doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a". * NEWS: Mention ARMv8.1 support. include/opcode/ * arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. (ARM_ARCH_V8_1A): New. (ARM_ARCH_V8_1A_FP): New. (ARM_ARCH_V8_1A_SIMD): New. (ARM_ARCH_V8_1A_CRYPTOV1): New. (ARM_FEATURE_CORE): New.
2015-06-02[ARM] Support for ARMv8.1 Adv.SIMD extensionMatthew Wahab1-0/+6
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab2-0/+8
2015-06-02[ARM] Rework CPU feature selection in the disassemblerMatthew Wahab2-0/+5
include/opcode/ * arm.h (ARM_FEATURE_ALL): New. opcodes/ * arm-dis.c (select_arm_features): Rework to avoid used of redefined macros.
2015-06-02[AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab2-0/+5
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-aarch64.c (aarch64_features): Add "rdma". * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma". gas/testsuite/ * rdma-directive.d: New. * rdma.d: New. * rdma.s: New. include/opcode/ * aarch64.h (AARCH64_FEATURE_RDMA): New. opcode/ * aarch64-tbl.h (aarch64_feature_rdma): New. (RDMA): New. (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate.
2015-06-02[AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab2-0/+5
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> include/ * aarch64.h (AARCH64_FEATURE_LOR): New. opcodes/ * aarch64-tbl.h (aarch64_feature_lor): New. (LOR): New. (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr", "stllrb", "stllrh". * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. gas/ * config/tc-aarch64.c (aarch64_features): Add "lor". * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of architecture extensions. gas/testsuite/ * lor-directive.d: New. * lor.d: New. * lor.s: New.
2015-06-01[AArch64][libopcode] Add support for PAN architecture extensionMatthew Wahab2-0/+11
The ARMv8.1 architecture introduced the Privileged Access Never extension. This adds a processor state field PSTATE.PAN which can be accessed using the MRS/MSR instructions. This patch adds support for the PAN architecture feature and processor state field to libopcode. include/opcode 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_PAN): New. (aarch64_sys_reg_supported_p): Declare. (aarch64_pstatefield_supported_p): Declare. opcodes/ 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * aarch64-opc.c (F_ARCHEXT): New. (aarch64_sys_regs): Add "pan". (aarch64_sys_reg_supported_p): New. (aarch64_pstatefields): Add "pan". (aarch64_pstatefield_supported_p): New.
2015-05-29Recognize GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL.Roland McGrath2-0/+7
binutils/ * readelf.c (print_gnu_note: NT_GNU_ABI_TAG): Recognize GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL. include/elf/ * common.h (GNU_ABI_TAG_SYLLABLE): New macro. (GNU_ABI_TAG_NACL): New macro.
2015-05-28Compact EH SupportCatherine Moore2-3/+8
The specification for the Compact EH format is available at: https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf 2015-05-28 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> Paul Brook <paul@codesourcery.com> bfd/ * bfd-in2.h: Regenerated. * elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define. (COMPACT_EH_CANT_UNWIND_OPCODE): Define. (dwarf_eh_frame_hdr_info): Move dwarf-specific fields from eh_frame_hdr_info. (compact_eh_frame_hdr_info): Declare. (eh_frame_hdr_info): Redeclare with union for dwarf-specific fields and compact-eh fields. (elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding. (bfd_elf_section_data): Add eh_frame_entry_field. (elf_section_eh_frame_entry): Define. (bfd_elf_parse_eh_frame_entries): Declare. (_bfd_elf_parse_eh_frame_entry): Declare. (_bfd_elf_end_eh_frame_parsing): Declare. (_bfd_elf_write_section_eh_frame_entry): Declare. (_bfd_elf_eh_frame_entry_present): Declare. (_bfd_elf_section_for_symbol): Declare. * elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function. (bfd_elf_record_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame): Update hdr_info field references. (cmp_eh_frame_hdr): New function. (add_eh_frame_hdr_terminator): New function. (_bfd_elf_end_eh_frame_parsing): New function. (find_merged_cie): Update hdr_info field references. (_bfd_elf_discard_section_eh_frame): Likewise. (_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support. (_bfd_elf_eh_frame_entry_present): New function. (_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support. (_bfd_elf_write_section_eh_frame_entry): New function. (_bfd_elf_write_section_eh_frame): Update hdr_info field references. (_bfd_elf_fixup_eh_frame_hdr): New function. (write_compact_eh_frame_hdr): New function. (write_dwarf_eh_frame_hdr): New function. (_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support. * elflink.c (_bfd_elf_section_for_symbol): New function. (elf_section_ignore_discarded_relocs): Add Compact EH support. (elf_link_input_bfd): Likewise. (bfd_elf_final_link): Likewise. (_bfd_elf_gc_mark): Likewise. (bfd_elf_parse_eh_frame_entries): New function. (bfd_elf_gc_sections): Add Compact EH support. (bfd_elf_discard_info): Likewise. * elfxx-mips.c: Include dwarf2.h. (_bfd_mips_elf_compact_eh_encoding): New function. (_bfd_mips_elf_cant_unwind_opcode): New function. * elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare. (_bfd_mips_elf_cant_unwind_opcode): Declare. (elf_backend_compact_eh_encoding): Define. (elf_backend_cant_unwind_opcode): Define. * elfxx-target.h (elf_backend_compact_eh_encoding): Provide default. (elf_backend_cant_unwind_opcode): Provide default. (elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and elf_backend_cant_unwind_opcode. * section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition. gas/ * config/tc-alpha.c (all_cfi_sections): Declare. (s_alpha_ent): Initialize all_cfi_sections. (alpha_elf_md_end): Invoke cfi_set_sections. * config/tc-mips.c (md_apply_fix): Handle BFD_RELOC_NONE. (s_ehword): Use BFD_RELOC_32_PCREL. (mips_fix_adjustable): Handle BFD_RELOC_32_PCREL. (mips_cfi_reloc_for_encoding): New function. * tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine. (DWARF2_FDE_RELOC_ENCODING): Define. (tc_cfi_reloc_for_encoding): Define. (mips_cfi_reloc_for_encoding): Define. (tc_compact_eh_opcode_stop): Define. (tc_compact_eh_opcode_pad): Define. * doc/as.texinfo: Document Compact EH extensions. * doc/internals.texi: Likewise. * dw2gencfi.c (EH_FRAME_LINKONCE): Redefine. (tc_cfi_reloc_for_encoding): Provide default. (compact_eh): Declare. (emit_expr_encoded): New function. (get_debugseg_name): Add Compact EH support. (alloc_debugseg_item): Likewise. (cfi_set_sections): New function. (dot_cfi_fde_data): New function. (dot_cfi_personality_id): New function. (dot_cfi_inline_lsda): New function. (cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id, and cfi_inline_lsda. (dot_cfi_personality): Add Compact EH support. (dot_cfi_lsda): Likewise. (dot_cfi_sections): Likewise. (dot_cfi_startproc): Likewise. (get_cfi_seg): Likewise. (output_compact_unwind_data): New function. (output_cfi_insn): Add Compact EH support. (output_cie): Likewise. (output_fde): Likewise. (cfi_finish): Likewise. (cfi_emit_eh_header): New function. (output_eh_header): New function. * dw2gencfi.h (cfi_set_sections): Declare. (SUPPORT_COMPACT_EH): Define. (MULTIPLE_FRAME_SECTIONS): Define. New enumeration to describe the Compact EH header format. (fde_entry): Add new fields personality_id, eh_header_type, eh_data_size, eh_data, eh_loc and sections. (CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target, CFI_EMIT_eh_frame_compact): Define. 2015-05-22 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> gas/testsuite/ * gas/mips/mips.exp: Run new tests. * gas/mips/compact-eh-1.s: New file. * gas/mips/compact-eh-2.s: New file. * gas/mips/compact-eh-3.s: New file. * gas/mips/compact-eh-4.s: New file. * gas/mips/compact-eh-5.s: New file. * gas/mips/compact-eh-6.s: New file. * gas/mips/compact-eh-7.s: New file. * gas/mips/compact-eh-eb-1.d: New file. * gas/mips/compact-eh-eb-2.d: New file. * gas/mips/compact-eh-eb-3.d: New file. * gas/mips/compact-eh-eb-4.d: New file. * gas/mips/compact-eh-eb-5.d: New file. * gas/mips/compact-eh-eb-6.d: New file. * gas/mips/compact-eh-eb-7.d: New file. * gas/mips/compact-eh-el-1.d: New file. * gas/mips/compact-eh-el-2.d: New file. * gas/mips/compact-eh-el-3.d: New file. * gas/mips/compact-eh-el-4.d: New file. * gas/mips/compact-eh-el-5.d: New file. * gas/mips/compact-eh-el-6.d: New file. * gas/mips/compact-eh-el-7.d: New file. * gas/mips/compact-eh-err1.l: New file. * gas/mips/compact-eh-err1.s: New file. * gas/mips/compact-eh-err2.l: New file. * gas/mips/compact-eh-err2.s: New file. 2015-05-22 Catherine Moore <clm@codesourcery.com> include/ * bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. 2015-05-22 Catherine Moore <clm@codesourcery.com> Paul Brook <paul@codesourcery.com> ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Add Compact EH support. * scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab sections. 2015-05-22 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-mips-elf/compact-eh.ld: New linker script. * ld-mips-elf/compact-eh1.d: New. * ld-mips-elf/compact-eh1.s: New. * ld-mips-elf/compact-eh1a.s: New. * ld-mips-elf/compact-eh1b.s: New. * ld-mips-elf/compact-eh2.d: New. * ld-mips-elf/compact-eh2.s: New. * ld-mips-elf/compact-eh3.d: New. * ld-mips-elf/compact-eh3.s: New. * ld-mips-elf/compact-eh3a.s: New. * ld-mips-elf/compact-eh4.d: New. * ld-mips-elf/compact-eh5.d: New. * ld-mips-elf/compact-eh6.d: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-05-12[AArch64] Add R_AARCH64_P32_LD32_GOTPAGE_LO14 to elf headerJiong Wang2-0/+5
2015-05-12 Jiong. Wang <jiong.wang@arm.com> include/ * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
2015-05-11Rename EM_486 to EM_IAMCUH.J. Lu2-1/+6
bfd/ * elfcode.h (elf_object_p): Replace EM_486 with EM_IAMCU. binutils/ * dwarf.c (init_dwarf_regnames): Replace EM_486 with EM_IAMCU. * readelf.c (guess_is_rela): Likewise. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_elf_section_flags): Likewise. (process_section_headers): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. include/elf/ * common.h (EM_486): Renamed to ... (EM_IAMCU): This.
2015-05-01Sync filenames.h with gccH.J. Lu2-0/+11
Merge with gcc: 2014-11-11 Anthony Brandon <anthony.brandon@gmail.com> Manuel López-Ibáñez <manu@gcc.gnu.org> PR driver/36312 * filenames.h: Add prototype for canonical_filename_eq.
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie4-1/+24
[gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA.
2015-04-27S/390: z13 use GNU attribute to indicate vector ABIAndreas Krebbel2-2/+17
bfd/ * elf-s390-common.c (elf_s390_merge_obj_attributes): New function. * elf32-s390.c (elf32_s390_merge_private_bfd_data): Call elf_s390_merge_obj_attributes. * elf64-s390.c (elf64_s390_merge_private_bfd_data): New function. binutils/ * readelf.c (display_s390_gnu_attribute): New function. (process_s390_specific): New function. (process_arch_specific): Call process_s390_specific. gas/ * doc/as.texinfo: Document Tag_GNU_S390_ABI_Vector. include/elf/ * s390.h: Define Tag_GNU_S390_ABI_Vector.
2015-04-25Non-alloc sections don't belong in PT_LOAD segmentsAlan Modra2-0/+12
Taking them out showed a bug in the powerpc64 backend with .branch_lt being removed from output_bfd but not from previously set up segment section maps. Removing the bfd sections meant their sh_flags (and practically everything else) remaining zero, ie. not SHF_ALLOC, triggering complaints about "`.branch_lt' can't be allocated in segment". include/elf/ * internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and similar segments only contain alloc sections. ld/ * emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out. ld/testsuite/ * ld-powerpc/tocnovar.d: Revert last change.
2015-04-24Define SEC_MEP_VLIW in bfd/section.cH.J. Lu2-4/+5
Bits in section flags should only be defined in bfd/section.c. This patch moves SEC_MEP_VLIW to bfd/section.c. bfd/ PR binutils/18316 * section.c (SEC_MEP_VLIW): New. * bfd-in2.h: Regenerated. include/elf/ PR binutils/18316 * mep.h (SEC_MEP_VLIW): Removed.
2015-04-17Merge include/partition.h from GCC.Richard Earnshaw2-4/+12
2015-03-19 Richard Biener <rguenther@suse.de> * partition.h (struct partition_elem): Re-order elements to avoid padding.
2015-04-14Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]H.J. Lu2-0/+7
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] to ld for ELF targets to support generating compressed DWARF debug sections. We always generate .zdebug_* section since section names have been finalized and they can't be changed easily when compression is being performed. bfd/ * bfd-in.h (compressed_debug_section_type): New. * compress.c (bfd_compress_section_contents): Add an argument for linker write compression and always generate .zdebug_* section when linking. (bfd_init_section_compress_status): Pass FALSE to bfd_compress_section_contents. (bfd_compress_section): New function. * elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS on DWARF debug sections if COMPRESS_DEBUG is set and rename section if COMPRESS_DEBUG_GABI_ZLIB isn't set. (assign_file_positions_for_non_load_sections): Set sh_offset to -1 if SEC_ELF_COMPRESS is set. (assign_file_positions_except_relocs): Likwise. (_bfd_elf_assign_file_positions_for_relocs): Renamed to ... (_bfd_elf_assign_file_positions_for_non_load): This. Change return time to bfd_boolean. Compress the section if SEC_ELF_COMPRESS is set. (_bfd_elf_write_object_contents): Updated. (_bfd_elf_set_section_contents): Write section contents to the buffer if SEC_ELF_COMPRESS is set. * merge.c: Include "elf-bfd.h". (sec_merge_emit): Add arguments for contents and offset. Write to contents with offset if contents isn't NULL. (_bfd_write_merged_section): Write section contents to the buffer if SEC_ELF_COMPRESS is set. Pass contents and output_offset to sec_merge_emit. * elflink.c (bfd_elf_final_link): Allocate the buffer for output section contents if SEC_ELF_COMPRESS is set. * section.c (SEC_ELF_COMPRESS): New. * bfd-in2.h: Regenerated. gas/ * as.h (compressed_debug_section_type): Removed. include/ * bfdlink.h (bfd_link_info): Add compress_debug. ld/ * ld.texinfo: Document --compress-debug-sections=. * ldmain.c (main): Set BFD_COMPRESS on output_bfd if COMPRESS_DEBUG is set. Set BFD_COMPRESS_GABI on output_bfd for COMPRESS_DEBUG_GABI_ZLIB. * lexsup.c (elf_static_list_options): Add --compress-debug-sections=. * emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New. (xtra_long): Add "compress-debug-sections". (gld${EMULATION_NAME}_handle_option): Handle OPTION_COMPRESS_DEBUG. ld/testsuite/ * ld-elf/compress.exp (build_tests): Add tests for --compress-debug-sections=. (run_tests): Likewise. Add additonal tests for --compress-debug-sections=. * ld-elf/gabiend.rt: New file. * ld-elf/gabinormal.rt: Likewise. * ld-elf/gnubegin.rS: Likewise. * ld-elf/gnunormal.rS: Likewise. * ld-elf/zlibbegin.rS: Likewise. * ld-elf/zlibnormal.rS: Likewise.
2015-04-14Add -z noextern-protected-data to ld for ELF/x86H.J. Lu2-0/+10
Address of protected data defined in the shared library may be external, i.e., due to copy relocation. By default, linker backend checks if relocations against protected data symbols are valid for building shared library and issues an error if relocation isn't allowed. The new option override linker backend default. When -z noextern-protected-data is used, updates on protected data symbols by another module won't be visibile to the resulting shared library. This option is specific to ELF/i386 and ELF/x86-64. bfd/ PR ld/pr17709 * elflink.c (_bfd_elf_adjust_dynamic_copy): Check info->extern_protected_data when warning copy relocs against protected symbols. (_bfd_elf_symbol_refs_local_p): Check info->extern_protected_data when checking protected non-function symbols. include/ PR ld/pr17709 * bfdlink.h (bfd_link_info): Add extern_protected_data. ld/ PR ld/pr17709 * ld.texinfo: Document "-z noextern-protected-data". * ldmain.c (main): Initialize link_info.extern_protected_data to -1. * lexsup.c (elf_shlib_list_options): Add "-z [no]extern-protected-data". * emulparams/elf32_x86_64.sh: Source extern_protected_data.sh. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_i386_be.sh: Likewise. * emulparams/elf_i386_chaos.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_x86_64.sh: Source extern_protected_data.sh. (PARSE_AND_LIST_OPTIONS): Renamed to ... (PARSE_AND_LIST_OPTIONS_BNDPLT): This. (PARSE_AND_LIST_ARGS_CASE_Z): Renamed to ... (PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT): This. (PARSE_AND_LIST_OPTIONS): Append $PARSE_AND_LIST_OPTIONS_BNDPLT. (PARSE_AND_LIST_ARGS_CASE_Z): Append $PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT. * emulparams/extern_protected_data.sh: New file. ld/testsuite/ PR ld/pr17709 * ld-i386/i386.exp: Run protected6b. * ld-i386/protected6b.d: New file. * ld-x86-64/protected6b.d: Likewise. * ld-x86-64/x86-64.exp: Run protected6b.
2015-04-09Add support to the RX toolchain to restrict the use of string instructions.Nick Clifton2-0/+11
bfd * elf32-rx.c (describe_flags): Report the settings of the string insn using bits. (rx_elf_merge_private_bfd_data): Handle merging of the string insn using bits. bin * readelf.c (get_machine_flags): Report the setting of the string insn using bits. gas * config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS. (md_longopts): Add -mno-allow-string-insns. (md_parse_option): Handle -mno-allow-string-insns. (md_show_usage): Mention -mno-allow-string-insns. (rx_note_string_insn_use): New function. Produces an error message if a string insn is used when it is not allowed. * config/rx-parse.y (SCMPU): Call rx_note_string_insn_use. (SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise. * config/rx-defs.h (rx_note_string_insn_use): Prototype. * doc/c-rx.texi: Document -mno-allow-string-insns. elf * rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field. (E_FLAG_RX_SINSNS_YES): Likewise. (E_FLAG_RX_SINSNS_MASK): New define.
2015-04-03Add Elf_Internal_Chdr and ElfXX_External_ChdrH.J. Lu3-0/+28
* external.h (Elf32_External_Chdr): New. (Elf64_External_Chdr): Likewise. * internal.h (Elf_Internal_Chdr): Likewise.
2015-03-28sim: ft32: new portJames Bowman2-0/+39
FT32 is a new high performance 32-bit RISC core developed by FTDI for embedded applications.
2015-03-26Add ELFOSABI_CLOUDABI and SHF_COMPRESSEDH.J. Lu2-0/+19
Update from gABI DRAFT - 10 June 2013. * common.h (ELFOSABI_CLOUDABI): New. (SHF_COMPRESSED): Likewise. (ELFCOMPRESS_ZLIB): Likewise. (ELFCOMPRESS_LOOS): Likewise. (ELFCOMPRESS_HIOS): Likewise. (ELFCOMPRESS_LOPROC): Likewise. (ELFCOMPRESS_HIPROC): Likewise.
2015-03-24Extend arm_feature_set struct to provide more bitsTerry Guo2-85/+134
gas/ChangeLog: 2015-03-24 Terry Guo <terry.guo@arm.com> * config/tc-arm.c (no_cpu_selected): Use new macro to compare features. (parse_psr): Likewise. (do_t_mrs): Likewise. (do_t_msr): Likewise. (static const arm_feature_set arm_ext_*): Defined with new macros. (static const arm_feature_set arm_cext_*): Likewise. (static const arm_feature_set fpu_fpa_ext_*): Likewise. (static const arm_feature_set fpu_vfp_ext_*): Likewise. (deprecated_coproc_regs): Likewise. (UL_BARRIER): Likewise. (barrier_opt_names): Likewise. (arm_cpus): Likewise. (arm_extensions): Likewise. include/opcode/ChangeLog: 2015-03-24 Terry Guo <terry.guo@arm.com> * arm.h (arm_feature_set): Extended to provide more available * bits. (ARM_ANY): Updated to follow above new definition. (ARM_CPU_HAS_FEATURE): Likewise. (ARM_CPU_IS_ANY): Likewise. (ARM_MERGE_FEATURE_SETS): Likewise. (ARM_CLEAR_FEATURE): Likewise. (ARM_FEATURE): Likewise. (ARM_FEATURE_COPY): New macro. (ARM_FEATURE_EQUAL): Likewise. (ARM_FEATURE_ZERO): Likewise. (ARM_FEATURE_CORE_EQUAL): Likewise. (ARM_FEATURE_LOW): Likewise. (ARM_FEATURE_CORE_LOW): Likewise. (ARM_FEATURE_CORE_COPROC): Likewise. opcodes/ChangeLog: 2015-03-24 Terry Guo <terry.guo@arm.com> * arm-dis.c (opcode32): Updated to use new arm feature struct. (opcode16): Likewise. (coprocessor_opcodes): Replace bit with feature struct. (neon_opcodes): Likewise. (arm_opcodes): Likewise. (thumb_opcodes): Likewise. (thumb32_opcodes): Likewise. (print_insn_coprocessor): Likewise. (print_insn_arm): Likewise. (select_arm_features): Follow new feature struct.
2015-03-19Add support for G13 and G14 flag bits in RL78 ELF binaries.Nick Clifton2-1/+11
inc * rl78.h (E_FLAG_RL78_G10): Redefine. (E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13 E_FLAG_RL78_G14): New flags. bin * readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags. gas * config/tc-rl78.c (enum options): Add G13 and G14. (md_longopts): Add -mg13 and -mg14. (md_parse_option): Handle -mg13 and -mg14. (md_show_usage): List -mg13 and -mg14. * doc/c-rl78.texi: Add description of -mg13 and -mg14 options. bfd * elf32-rl78.c (rl78_cpu_name): New function. Prints the name of the RL78 core based upon the flags. (rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14 flags. (rl78_elf_print_private_bfd_data): Use rl78_cpu_name. (elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-15sim: dv-sockser: push module init prototype downMike Frysinger2-1/+6
Pull out the duplicated dv_sockser_install prototype from the tconfig.in files and put it in the one place it gets used -- sim-module.c. This is still arguably incorrect, but it's better than the status quo where the tconfig.in has to include header files and duplicate the dv-sockser func. The tconfig header is meant to be simple and contain a target defines.
2015-03-10[ARM] PR ld/16572: Remove EF_ARM_HASENTRY flagJiong Wang2-1/+5
bfd/ 2015-03-10 Yuri Gribov <y.gribov@samsung.arm> PR ld/16572 * elf32-arm.c (elf32_arm_final_link_relocate): Remove support for ELF_ARM_HASENTRY. (elf32_arm_print_private_bfd_data): Likewise. binutils/ 2015-03-10 Yuri Gribov <y.gribov@samsung.arm> PR ld/16572 * readelf.c: Remove support for ELF_ARM_HASENTRY. include/ 2015-03-10 Matthew Wahab <matthew.wahab@arm.com> PR ld/16572 * elf/arm.h (EF_ARM_HASENTRY): Remove.
2015-02-26Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support.Marcus Shawcroft2-1/+5
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