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2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu1-3/+21
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu1-1/+50
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu1-2/+9
2016-04-05[ARC] 24 bit reloc and overflow detection fix.Claudiu Zissulescu1-1/+16
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu1-0/+72
2016-03-22make more variables constTrevor Saunders2-2/+2
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess1-0/+1
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess1-9/+9
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess1-0/+1
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess1-5/+0
2016-03-08[ARC] Allow non-instruction relocations within .text sectionsClaudiu Zissulescu1-2/+2
2016-03-07Add const qualifiers at various places.Trevor Saunders8-17/+17
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab1-1/+2
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang1-1/+2
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu1-0/+8
2016-02-09Fix compile time warnings building the binutils with a gcc6 compiler.Nick Clifton3-7/+8
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton1-5/+10
2016-01-19Add PIC and TLS support to the ARC target.Miranda Cupertino1-0/+16
2016-01-06MIPS/include: opcode/mips.h: Add a summary of MIPS16 operand codesMaciej W. Rozycki1-0/+6
2016-01-01Copyright update for binutilsAlan Modra68-69/+68
2016-01-01binutils ChangeLog rotationAlan Modra1-0/+0
2015-12-30Fix assorted ChangeLog errorsAlan Modra1-8/+127
2015-12-24Add assembler support for ARMv8-M BaselineThomas Preud'homme2-21/+57
2015-12-24Add assembler support for ARMv8-M MainlineThomas Preud'homme2-17/+46
2015-12-24Consolidate Thumb-1/Thumb-2 ISA detectionThomas Preud'homme2-3/+8
2015-12-17[Patch ARM] Fix build attributes for armv8-a in case of assembler files that ...Ramana Radhakrishnan1-2/+3
2015-12-15[ARM] Enable CRC by default for ARMv8.1 and later.Matthew Wahab2-3/+11
2015-12-15Add support for RX V2 Instruction SetYoshinori Sato2-0/+23
2015-12-14[AArch64][PATCH 11/14] Add support for the 2H vector type.Matthew Wahab2-0/+6
2015-12-11[AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab2-0/+14
2015-12-11[AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab2-0/+7
2015-12-11[AArch64][Patch 1/5] Support the ARMv8.2 Statistical Profiling Extension.Matthew Wahab2-0/+5
2015-12-10[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.Matthew Wahab2-0/+7
2015-12-10[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.Matthew Wahab2-1/+8
2015-12-10[AArch64][PATCH 1/2] Add support for RAS instruction ESB.Matthew Wahab2-0/+7
2015-12-10[AArch64] Fix ARMv8.1 and ARMv8.2 feature settings.Matthew Wahab2-2/+13
2015-12-04Fix failures in the GAS testsuite for the ARC architecture.Claudiu Zissulescu2-1/+5
2015-11-27[AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab2-0/+5
2015-11-27[AArch64] Add feature flags and command line for ARMv8.2 FP16 support.Matthew Wahab2-0/+8
2015-11-20[AArch64] Add support for ARMv8.1 Virtulization Host Extensions.Matthew Wahab2-0/+7
2015-11-19[ARM] Add ARMv8.2 architecture feature and command line option.Matthew Wahab2-0/+8
2015-11-19[AArch64] Add ARMv8.2 command line option and feature flag.Matthew Wahab2-1/+14
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner2-0/+12
2015-11-02Disassemble RX NOP instructions as such.Nick Clifton2-0/+8
2015-11-02Fix disassembly of RX zero-offset register indirect instructions.Nick Clifton2-0/+5
2015-10-28Pass noaliases_p to aarch64_decode_insnYao Qi2-1/+5
2015-10-07Avoid using 'template' C++ keywordYao Qi2-1/+6
2015-10-07Wrap include/opcode/aarch64.h in extern "C" for C++Yao Qi2-0/+12
2015-10-07New ARC implementation.Nick Clifton3-258/+592
2015-10-02Make aarch64_zero_register_p declaration starts from column oneYao Qi2-2/+7
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