Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2015-01-16 | S/390: Add support for IBM z13. | Andreas Krebbel | 2 | -3/+24 |
2015-01-02 | ChangeLog rotatation and copyright year update | Alan Modra | 66 | -66/+70 |
2014-12-27 | Limit moxie sto/ldo offsets to 16 bits | Anthony Green | 2 | -4/+9 |
2014-12-06 | Add Visium support to opcodes | Eric Botcazou | 2 | -0/+341 |
2014-11-28 | Remove broken nios2 assembler dwim support. | Sandra Loosemore | 2 | -6/+7 |
2014-11-21 | Support ARM Cortex-M7 | Terry Guo | 1 | -2/+7 |
2014-11-06 | Add mach parameter to nios2_find_opcode_hash. | Sandra Loosemore | 2 | -3/+8 |
2014-10-31 | MIPS: Add Octeon 3 support | Naveen H.S | 1 | -0/+5 |
2014-10-23 | Refactoring/cleanup of nios2 opcodes and assembler code. | Sandra Loosemore | 3 | -388/+551 |
2014-10-17 | opcodes, elf: annotate instructions with HWCAP2_VIS3B. | Jose E. Marchesi | 2 | -1/+5 |
2014-10-09 | This is a series of patches that add support for the SPARC M7 cpu to | Jose E. Marchesi | 2 | -1/+39 |
2014-09-16 | NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt. | Kuan-Lin Chen | 2 | -4/+10 |
2014-09-15 | Add support for MIPS R6. | Andrew Bennett | 2 | -8/+113 |
2014-09-03 | [PATCH/AArch64] Implement LSE feature | Jiong Wang | 2 | -2/+15 |
2014-08-26 | MIPS: Make the CODE10 operand code consistent between ISAs | Maciej W. Rozycki | 2 | -3/+9 |
2014-07-29 | [MIPS] Rename COPROC related macros | Matthew Fortune | 2 | -4/+11 |
2014-07-01 | Add support for the AVR Tiny series of microcontrollers. | Barney Stratford | 2 | -17/+37 |
2014-05-20 | Fix MSP430 assembler to support #hi(<symbol>). | Nick Clifton | 2 | -1/+6 |
2014-05-07 | Add MIPS r3 and r5 support. | Andrew Bennett | 2 | -9/+54 |
2014-05-01 | include/opcode/ | Richard Sandiford | 2 | -10/+31 |
2014-04-23 | Add support for the MIPS eXtended Physical Address (XPA) ASE. | Andrew Bennett | 1 | -0/+2 |
2014-04-22 | Remove support for the (deprecated) openrisc and or32 configurations and replace | Christian Svensson | 2 | -181/+4 |
2014-03-05 | Update copyright years | Alan Modra | 65 | -86/+69 |
2013-12-16 | Range of element index is too large on MIPS MSA element selection instructions. | Andrew Bennett | 2 | -8/+13 |
2013-12-13 | Add support for Andes NDS32: | Kuan-Lin Chen | 2 | -0/+834 |
2013-12-07 | strip off +x bits on non-executable/script files | Mike Frysinger | 2 | -0/+4 |
2013-11-20 | gas/testsuite/ | Yufeng Zhang | 2 | -1/+6 |
2013-11-18 | Add support for armv7ve to gas. | Yufeng Zhang | 2 | -5/+9 |
2013-11-18 | Revert "Add support for AArch64 trace unit registers." | Yufeng Zhang | 2 | -2/+9 |
2013-11-15 | gas/ | Yufeng Zhang | 2 | -0/+7 |
2013-11-11 | 2013-11-11 Catherine Moore <clm@codesourcery.com> | Catherine Moore | 1 | -2/+2 |
2013-11-05 | gas/ | Yufeng Zhang | 2 | -1/+16 |
2013-11-05 | gas/ | Yufeng Zhang | 2 | -0/+7 |
2013-10-14 | 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> | Chao-ying Fu | 2 | -7/+89 |
2013-10-11 | * Removed short_hand field from opcode table and | Sean Keys | 1 | -36/+16 |
2013-08-23 | PR binutils/15834 | Nick Clifton | 2 | -3/+8 |
2013-08-19 | include/opcode/ | Richard Sandiford | 2 | -4/+6 |
2013-08-19 | include/opcode/ | Richard Sandiford | 2 | -2/+4 |
2013-08-19 | include/opcode/ | Richard Sandiford | 2 | -0/+18 |
2013-08-05 | gas/ | Eric Botcazou | 1 | -0/+1 |
2013-08-04 | include/opcode/ | Richard Sandiford | 2 | -6/+59 |
2013-08-03 | include/opcode/ | Richard Sandiford | 2 | -11/+30 |
2013-08-01 | include/opcode/ | Richard Sandiford | 2 | -121/+88 |
2013-08-01 | include/opcode/ | Richard Sandiford | 2 | -10/+6 |
2013-07-24 | Support Intel MPX | H.J. Lu | 2 | -0/+7 |
2013-07-14 | include/opcode/ | Richard Sandiford | 2 | -0/+14 |
2013-07-14 | include/opcode/ | Richard Sandiford | 2 | -0/+298 |
2013-07-14 | include/opcode/ | Richard Sandiford | 2 | -0/+6 |
2013-07-07 | include/opcode/ | Richard Sandiford | 2 | -90/+28 |
2013-07-07 | include/opcode/ | Richard Sandiford | 2 | -10/+13 |