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2002-02-18 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.Jan Hubicka2-5/+9
2002-02-11 * i386.h (push,pop): Allow 16bit operands in 64bit mode.Jan Hubicka2-45/+70
(xchg): Fix. (in, out): Disable 64bit operands. (call, jmp): Avoid REX prefixes. (jcxz): Prohibit in 64bit mode (jrcxz, loop): Add 64bit variants. (movq): Fix patterns. (movmskps, pextrw, pinstrw): Add 64bit variants.
2002-01-31Add support for OpenRISC 32-bit embedded processorNick Clifton2-0/+207
2002-01-282002-01-27 David O'Brien <obrien@FreeBSD.org>David O'Brien1-8/+8
* cgen.h (BFD_VERSION): Use BFD_VERSION_DATE instead. Approved by: Nick Clifton <nickc@cambridge.redhat.com> <m3k7u2g5uc.fsf@north-pole.nickc.cambridge.redhat.com>
2002-01-22[ include/opcode/ChangeLog ]Graydon Hoare2-0/+27
2002-01-22 Graydon Hoare <graydon@redhat.com> * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure. (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field. [ opcodes/ChangeLog ] 2002-01-22 Graydon Hoare <graydon@redhat.com> * fr30-asm.c: Regenerate. * fr30-desc.c: Likewise. * fr30-desc.h: Likewise. * fr30-dis.c: Likewise. * fr30-ibld.c: Likewise. * fr30-opc.c: Likewise. * fr30-opc.h: Likewise. * m32r-asm.c: Likewise. * m32r-desc.c: Likewise. * m32r-desc.h: Likewise. * m32r-dis.c: Likewise. * m32r-ibld.c: Likewise. * m32r-opc.c: Likewise. * m32r-opc.h: Likewise. * m32r-opinst.c: Likewise. * openrisc-asm.c: Likewise. * openrisc-desc.c: Likewise. * openrisc-desc.h: Likewise. * openrisc-dis.c: Likewise. * openrisc-ibld.c: Likewise. * openrisc-opc.c: Likewise. * openrisc-opc.h: Likewise. * xstormy16-desc.c: Likewise. [ cgen/ChangeLog ] 2002-01-22 Graydon Hoare <graydon@redhat.com> * desc-cpu.scm (ifld-number-cache): Add. (ifld-number): Add. (gen-maybe-multi-ifld-of-op): Add. (gen-maybe-multi-ifld): Add. (gen-multi-ifield-nodes): Add. (cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-21comment typo fixesAlan Modra2-2/+6
2002-01-03[gas/ChangeLog]Matthew Green2-2/+7
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific. [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific. (PPC_OPCODE_BOOKE64): Likewise.
2001-12-31 * hppa.h (call, ret): Move to end of table.Jeff Law2-92/+112
(addb, addib): PA2.0 variants should have been PA2.0W. (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler happy. (fldw, fldd, fstw, fstd, bb): Likewise. (short loads/stores): Tweak format specifier slightly to keep disassembler happy. (indexed loads/stores): Likewise. (absolute loads/stores): Likewise.
2001-12-04* d10v.h (OPERAND_NOSP): New macro.Alexandre Oliva2-0/+9
2001-11-29Copyright 2001Alexandre Oliva1-1/+1
2001-11-29* d10v.h (OPERAND_SP): New macro.Alexandre Oliva2-0/+7
2001-11-15binutils/ChangeLogAlan Modra2-1/+7
* doc/binutils.texi (objdump): Document ppc -M options. gas/ChangeLog * config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size) to operand->insert. (md_assemble): Likewise. gas/testsuite/ChangeLog * gas/ppc/booke.d: Modify reloc and target matches for powerpc64. include/opcode/ChangeLog * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param. opcodes/ChangeLog * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC. (insert_bat, extract_bat, insert_bba, extract_bba, insert_bd, extract_bd, insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo, insert_bo, extract_bo, insert_boe, extract_boe, insert_ds, extract_ds, insert_de, extract_de, insert_des, extract_des, insert_li, extract_li, insert_mbe, extract_mbe, insert_mb6, extract_mb6, insert_nb, extract_nb, insert_nsi, extract_nsi, insert_ral, insert_ram, insert_ras, insert_rbs, extract_rbs, insert_sh6, extract_sh6, insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param. (extract_bd, extract_bdm, extract_bdp, extract_ds, extract_des, extract_li, extract_nsi): Implement sign extension without conditional. (insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints. (extract_bdm, extract_bdp): Correct 32 bit validation. (AT1_MASK, AT2_MASK): Define. (BBOAT_MASK): Define. (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define. (BOFM64, BOFP64, BOTM64, BOTP64): Define. (BODNZM64, BODNZP64, BODZM64, BODZP64): Define. (PPCCOM32, PPCCOM64): Define. (powerpc_opcodes): Modify existing 32 bit insns with branch hints and add new patterns to implement 64 bit branches with hints. Move booke instructions so they match before ppc64. * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for 64 bit default targets, and parse "32" and "64" in options. Formatting fixes. (print_insn_powerpc): Pass dialect to operand->extract.
2001-11-13Fix tic54x testsuite failures and Lmem disassembly bugs.Timothy Wall2-16/+17
2001-11-13 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" toAlan Modra2-3/+12
accept WordReg. * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand category instead of Ew.
2001-11-10 * avr.h: Update for new devices.Denis Chertykov1-4/+8
2001-11-052001-11-04 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-1/+5
* mips.h (OPCODE_IS_MEMBER): Remove extra space.
2001-10-30Add MMIX supportNick Clifton2-0/+189
2001-10-182001-10-18 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-1/+7
* mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end of the expression, to make source code merging easier.
2001-10-182001-10-17 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-1/+6
* mips.h: Sort coprocessor instruction argument characters in comment, add a few more words of description for "H".
2001-10-18[gas/testsuite/ChangeLog]Chris Demetriou2-1/+10
2001-10-17 Chris Demetriou <cgd@broadcom.com> * gas/mips/mips.exp (sb1-ext-ps): New test to test SB-1 core's paired-single extensions to the MIPS64 ISA. * gas/mips/sb1-ext-ps.d: New file. * gas/mips/sb1-ext-ps.s: New file. [include/opcode/ChangeLog] 2001-10-17 Chris Demetriou <cgd@broadcom.com> * mips.h (INSN_SB1): New cpu-specific instruction bit. (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1 if cpu is CPU_SB1. [opcodes/ChangeLog] 2001-10-17 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Make the ISA used to disassemble SB-1 binaries include instructions specific to the SB-1. * mips-opc.c (SB1): New definition. (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps", "recip.ps", "rsqrt.ps", and "sqrt.ps".
2001-10-17[gas/ChangeLog]Matthew Green2-1/+5
* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400, -m7410, -m7450 and -m7455 options. [gas/testsuite/ChangeLog] * gas/ppc/altivec.s: New test for AltiVec. * gas/ppc/altivec.d: New file. * gas/ppc/ppc.exp: Test altivec.s [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE64): Fix typo. [opcodes/ChangeLog] * ppc-opc.c (STRM): New AltiVec operand. (XDSS): New AltiVec instruction form. (mtvscr): Correct operand list. (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
2001-10-13oops, fix an error in the previous entry.Matthew Green1-2/+3
2001-10-13[gas/ChangeLog]Matthew Green2-1/+15
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455 flags, equivalent to -m7400. New -maltivec to enable AltiVec instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable 64-bit and 32-bit BookE support, respectively. Change -m403 and -m405 to set PPC403 option. (md_show_usage): Adjust for new options. * doc/all.texi: Set PPC. * doc/as.texinfo: Add PPC support and pull in c-ppc.texi. * doc/c-ppc.texi: New file. * doc/Makefile.am (CPU_DOCS): Add c-ppc.texi. * doc/Makefile.in: Regenerate. [gas/testsuite/ChangeLog] * gas/ppc/booke.s: New test for Motorola BookE. * gas/ppc/booke.d: New file. * gas/ppc/ppc.exp: Test booke.s. [include/opcode/ChangeLog] * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for BookE and PowerPC403 instructions. [opcodes/ChangeLog] * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New instruction field instruction/extraction functions for new BookE DE form instructions. (CT): New macro for CT field in an X form instruction. (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form instructions. (PPC64): Don't include PPC_OPCODE_PPC. (403): New opcode macro for PPC403 processors. (BOOKE): New opcode macro for BookE processors. (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions. (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise. (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise. (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise. (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise. (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise. (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise. (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise. (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise. (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise. (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise. (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise. (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise. (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise. * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look for a disassembler option of `booke', `booke32' or `booke64' to enable BookE support in the disassembler.
2001-09-27Remove spurious commentNick Clifton2-2/+5
2001-09-21fix compile time warning messagesNick Clifton2-1/+5
2001-09-05 * alpha.h (struct alpha_operand): Pack elements into bitfields.Richard Henderson2-4/+8
2001-08-31mips3264 supportEric Christopher2-1/+4
2001-08-27 * ppc.h (PPC_OPERAND_DS): Define.Alan Modra2-1/+7
2001-08-26For include/opcode:Andreas Jaeger4-40/+54
* d30v.h: Fix declaration of reg_name_cnt. * d10v.h: Fix declaration of d10v_reg_name_cnt. * arc.h: Add prototypes from opcodes/arc-opc.c. For opcodes: * tic54x-dis.c: Add unused attributes where needed. * z8k-dis.c (output_instr): Add unused attribute. * h8300-dis.c: Add missing prototypes. (bfd_h8_disassemble): Make static. * cris-dis.c: Add missing prototype. * h8500-dis.c: Likewise. * m68hc11-dis.c: Likewise. * pj-dis.c: Likewise. * tic54x-dis.c: Likewise. * v850-dis.c: Likewise. * vax-dis.c: Likewise. * w65-dis.c: Likewise. * z8k-dis.c: Likewise. * d10v-dis.c: Add missing prototype. (dis_long): Remove unused variable. (dis_2_short): Likewise. * sh-dis.c: Add missing prototypes. * v850-opc.c: Likewise. Add unused attributes where needed. * ns32k-dis.c: Add missing prototypes. (bit_extract_simple): Remove unused variable.
2001-08-16Add support for MIPS R1[02]000 performance counter opcodes.Thiemo Seufer2-1/+10
2001-08-10 * opcode/mips.h (INSN_GP32): Remove.Richard Sandiford1-11/+5
(OPCODE_IS_MEMBER): Remove gp32 parameter. (M_MOVE): New macro identifier.
2001-08-10Revert 2001-08-08 changes.Alan Modra2-1/+4
2001-08-08 * ppc.h (struct powerpc_operand): New field `reloc'.Alan Modra2-0/+6
* ppc-opc.c: Include "bfd.h". (powerpc_operands): Add new field for reloc type.
2001-08-012001-08-01 Aldy Hernandez <aldyh@redhat.com>Aldy Hernandez1-1/+1
* include/opcode/mips.h (INSN_ISA_MASK): Nuke bits 12-15.
2001-07-122001-07-12 Jeff Johnston <jjohnstn@redhat.com>Jeff Johnston1-0/+10
* opcode/cgen.h (CGEN_INSN): Add regex support. (build_insn_regex): Declare.
2001-07-12* some support for funny-endian 16/32-bit insn setsFrank Ch. Eigler2-0/+11
[cgen/ChangeLog] 2001-07-11 Frank Ch. Eigler <fche@redhat.com> * desc-cpu.scm (-gen-mach-table-defns): Emit fourth field: the mach->cpu insn-chunk-bitsize. (-gen-cpu-open): In @arch@_cgen_rebuild_tables, process above new field toward CGEN_CPU_TABLE->insn_chunk_bitsize. * mach.scm (<cpu>): New field insn-chunk-bitsize. (-cpu-parse, -cpu-read): Parse/initialize it. * doc/rtl.texi (define-cpu): Document it. [opcodes/ChangeLog] 2001-07-11 Frank Ch. Eigler <fche@redhat.com> * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of bfd_get_bits. * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect non-zero CGEN_CPU_DESC->insn_chunk_bitsize. [include/opcode/ChangeLog] 2001-07-11 Frank Ch. Eigler <fche@redhat.com> * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field. (cgen_cpu_desc): Ditto.
2001-07-062001-07-07 Ben Elliston <bje@redhat.com>Ben Elliston2-313/+331
* m88k.h: Clean up and reformat. Remove unused code.
2001-06-14Index: opcodes/ChangeLogGeoffrey Keating2-0/+9
2001-06-13 Geoffrey Keating <geoffk@redhat.com> * cgen-asm.c (cgen_parse_keyword): When looking for the boundaries of a keyword, allow any special characters that are actually in one of the allowed keyword. * cgen-opc.c (cgen_keyword_add): Add any special characters to the nonalpha_chars field. Index: cgen/ChangeLog 2001-06-13 Geoffrey Keating <geoffk@redhat.com> * desc.scm (<keyword> 'gen-defn): Add extra zero into CGEN_KEYWORD_ENTRY initializers. Index: include/opcode/ChangeLog 2001-06-13 Geoffrey Keating <geoffk@redhat.com> * cgen.h (cgen_keyword): Add nonalpha_chars field.
2001-05-28Fix some entries.Alan Modra1-1/+1
2001-05-23Add MIPS r12k supportNick Clifton2-0/+5
2001-05-232001-05-23 John Healy <jhealy@redhat.com>John Healy2-1/+5
* cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
2001-05-15Fix MIPS disassembler so that it produces reassemblable code.Nick Clifton2-0/+5
2001-05-12Correct cvtps2dq, movdq2q, movq2dq, and movq problems.Alan Modra2-3/+9
2001-05-04Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq.Alan Modra2-4/+9
2001-04-05 * cris.h (enum cris_insn_version_usage): Correct comment forHans-Peter Nilsson2-2/+7
cris_ver_v3p.
2001-03-24Small tweaks to sse2 instructions.Alan Modra2-2/+8
2001-03-22 * cris.h (ADD_PC_INCR_OPCODE): New macro.Hans-Peter Nilsson2-0/+6
2001-03-222001-03-21 Kazu Hirata <kazu@hxi.com>Kazu Hirata2-7/+7
* h8300.h: Fix formatting.
2001-03-22paddq and psubq support.Alan Modra2-0/+8
2001-03-19Fix register name printed in warning message.Alan Modra2-0/+7
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