Age | Commit message (Collapse) | Author | Files | Lines |
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* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
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PR 4448
* config/tc-ppc.c (ppc_insert_operand): Don't increase min for
PPC_OPERAND_PLUS1.
include/opcode/
* ppc.h (PPC_OPERAND_PLUS1): Update comment.
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* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
(num_powerpc_operands): Declare.
(PPC_OPERAND_SIGNED et al): Redefine as hex.
(PPC_OPERAND_PLUS1): Define.
opcodes/
* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
change.
* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
references to following deleted functions.
(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
(insert_ds, extract_ds, insert_de, extract_de): Delete.
(insert_des, extract_des, insert_li, extract_li): Delete.
(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
(num_powerpc_operands): New constant.
(XSPRG_MASK): Remove entire SPRG field.
(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
* messages.c (as_internal_value_out_of_range): Extend to report
errors for values with invalid low bits set.
* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
fields. Check that operands and opcode fields are disjoint.
(ppc_insert_operand): Check operands using mask rather than bit
count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust
insertion code.
(md_apply_fix): Adjust for struct powerpc_operand change.
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* ppc.h (PPC_OPCODE_POWER6): Define.
Adjust whitespace.
gas/
* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
(md_show_usage): Document it.
(ppc_setup_opcodes): Test power6 opcode flag bits.
* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
* ppc-dis.c (powerpc_dialect): Handle power6 option.
(print_ppc_disassembler_options): Mention power6.
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* config/tc-ppc.c (parse_cpu): Add -me300 support.
(md_show_usage): Likewise.
* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
* ppc-dis.c (powerpc_dialect): Handle e300.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPCE300): Define.
(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
* doc/binutils.texi (objdump): Document -M e300.
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* ppc-opc.c (L): Make this field not optional.
include/opcode/
* ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
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* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
PPC_OPERANDS_GPR_0.
* ppc-opc.c (RA0): Define.
(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
(RAOPT): Rename from RAO. Update all uses.
(powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi",
"stsdx", "stsdi", "lmd" and "stmd" insns.
include/opcode/
* ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines.
gas/testsuite/
Update gas/ppc/.
ld/testsuite/
Update ld-powerpc/.
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PPC_OPCODE_* defines.
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From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
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* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
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* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
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* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400,
-m7410, -m7450 and -m7455 options.
[gas/testsuite/ChangeLog]
* gas/ppc/altivec.s: New test for AltiVec.
* gas/ppc/altivec.d: New file.
* gas/ppc/ppc.exp: Test altivec.s
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
[opcodes/ChangeLog]
* ppc-opc.c (STRM): New AltiVec operand.
(XDSS): New AltiVec instruction form.
(mtvscr): Correct operand list.
(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
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* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
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* ppc-opc.c: Include "bfd.h".
(powerpc_operands): Add new field for reloc type.
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(PPC_OPERAND_VR): New operand flag for vector registers.
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