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path: root/include/opcode/arc.h
AgeCommit message (Expand)AuthorFilesLines
2020-01-07[ARC] Add finer details for LLOCK and SCONDShahab Vahedi1-0/+2
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-08-30[ARC] [COMMITTED] Fix FASTMATH field.Claudiu Zissulescu1-1/+1
2019-07-24[ARC] Update ARC opcode tableClaudiu Zissulescu1-0/+2
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-08-06[ARC] Update handling AUX-registers.claziss1-0/+1
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-07-19[ARC] Add SJLI instruction.Claudiu Zissulescu1-0/+1
2017-05-23[ARC] Update MAX_INSN_FLGS.claziss1-1/+1
2017-05-10[ARC] Object attributes.Claudiu Zissulescu1-62/+26
2017-03-27Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.Rinat Zelig1-6/+8
2017-03-21arc/nps400: Add cp16/cp32 instructions to opcodes libraryRinat Zelig1-0/+1
2017-02-06[ARC] Provide an interface to decode ARC instructions.Claudiu Zissulescu1-1/+23
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-29[ARC] Add checking for LP_COUNT reg usage, improve error reporting.Claudiu Zissulescu1-0/+5
2016-11-03arc: Implement NPS-400 dcmac instructionGraham Markall1-0/+1
2016-11-03arc: Change max instruction length to 64-bitsAndrew Burgess1-28/+7
2016-11-03opcodes/arc: Make some macros 64-bit safeGraham Markall1-26/+28
2016-11-03arc: Replace ARC_SHORT macro with arc_opcode_len functionGraham Markall1-4/+3
2016-10-14[ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu1-0/+1
2016-09-26[ARC] ISA alignment.Claudiu Zissulescu1-1/+3
2016-07-27Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall1-59/+135
2016-06-23[ARC] Misc minor edits/fixesGraham Markall1-3/+3
2016-06-22addmore extern CTrevor Saunders1-0/+8
2016-06-21Arc assembler: Convert nps400 from a machine type to an extension.Graham Markall1-1/+2
2016-06-14[ARC] Add deep packet inspection instructions for npsGraham Markall1-0/+1
2016-06-02Add support for 48 and 64 bit ARC instructions.Andrew Burgess1-1/+25
2016-05-23[ARC] Update instruction type and delay slot info.Claudiu Zissulescu1-1/+5
2016-05-23[ARC] Rename "class" named attributes.Claudiu Zissulescu1-2/+2
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu1-2/+10
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess1-1/+1
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess1-0/+2
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess1-0/+3
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu1-3/+21
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu1-1/+50
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu1-2/+9
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu1-0/+72
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess1-0/+1
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess1-9/+9
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess1-0/+1
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess1-5/+0
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu1-0/+8
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-04Fix failures in the GAS testsuite for the ARC architecture.Claudiu Zissulescu1-1/+1
2015-10-07New ARC implementation.Nick Clifton1-258/+350
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2010-04-15Upgrade header files to use GPLv3Nick Clifton1-4/+3
2005-05-10Update the address and phone number of the FSF organizationNick Clifton1-2/+2
2003-08-07Convert to C90.Alan Modra1-26/+26
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